Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/124511/?format=api
{ "id": 124511, "url": "http://patches.dpdk.org/api/patches/124511/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230224094014.3246764-6-ktejasree@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230224094014.3246764-6-ktejasree@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230224094014.3246764-6-ktejasree@marvell.com", "date": "2023-02-24T09:40:08", "name": "[v2,05/11] crypto/cnxk: set ctx for AE", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "823cb166adfb60ca6a6c2e34bf95379d874c2942", "submitter": { "id": 1789, "url": "http://patches.dpdk.org/api/people/1789/?format=api", "name": "Tejasree Kondoj", "email": "ktejasree@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230224094014.3246764-6-ktejasree@marvell.com/mbox/", "series": [ { "id": 27169, "url": "http://patches.dpdk.org/api/series/27169/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27169", "date": "2023-02-24T09:40:03", "name": "fixes and improvements to cnxk crypto PMD", "version": 2, "mbox": "http://patches.dpdk.org/series/27169/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/124511/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/124511/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3BE9E41D5F;\n\tFri, 24 Feb 2023 10:40:55 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 43168427F5;\n\tFri, 24 Feb 2023 10:40:32 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id A8A0E41151\n for <dev@dpdk.org>; Fri, 24 Feb 2023 10:40:29 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 31O6o4W9001318 for <dev@dpdk.org>; Fri, 24 Feb 2023 01:40:29 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3nxfkwb2gx-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 24 Feb 2023 01:40:28 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Fri, 24 Feb 2023 01:40:26 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Fri, 24 Feb 2023 01:40:26 -0800", "from hyd1554.marvell.com (unknown [10.29.57.11])\n by maili.marvell.com (Postfix) with ESMTP id 577B35B692C;\n Fri, 24 Feb 2023 01:40:25 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=UsHqTZtUJCX7pJCUY0s6C1wnWwMa9qOc670Ut8TWQD8=;\n b=VDNCGluebZzOe3NA3M9b2LYXrELMcXtWqz9HERsVCpZrVb3ag2duf7MHSJoTcd9HrFJf\n FTo8rmMI1yKZrvzfBv7idhBlYGsly49mTfmkWX/y1JgVQmGqgqzoLRKQKnBY5HLuepDp\n EfevozlTubmBBp034625nfXwNBEc69+WX5GN1xRDuIXZ2FEsV7uoOr3eeXI0mzWR3t8q\n tJtjIIkxQaudhVQ8SuEjXlrTOAVqfdaumGs2hECtHd85XYBJqtQQCLQJmgkUdqa3vJp0\n ExHJC9jcJ9XJesg9k/bnLC58zzCHZPgUPx960uIhnBA+ZJ3qzJuHB1iVdv5kCzuurXdC dw==", "From": "Tejasree Kondoj <ktejasree@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Gowrishankar Muthukrishnan\n <gmuthukrishn@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH v2 05/11] crypto/cnxk: set ctx for AE", "Date": "Fri, 24 Feb 2023 15:10:08 +0530", "Message-ID": "<20230224094014.3246764-6-ktejasree@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230224094014.3246764-1-ktejasree@marvell.com>", "References": "<20230224094014.3246764-1-ktejasree@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "Gf-hIGAgUY3RUCC_4fEXah9gIMe62e04", "X-Proofpoint-ORIG-GUID": "Gf-hIGAgUY3RUCC_4fEXah9gIMe62e04", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.170.22\n definitions=2023-02-24_05,2023-02-23_01,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Set ctx_val to 1 for asymmetric ops.\n\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 18 ++++---------\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 16 +++--------\n drivers/crypto/cnxk/cnxk_ae.h | 21 +++++++++++++++\n drivers/crypto/cnxk/cnxk_cryptodev_ops.c | 33 ++++++++++++++++-------\n 4 files changed, 53 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 92f7002db9..d1a43eaf13 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -158,10 +158,8 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct\n \n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tasym_op = op->asym;\n-\t\t\tae_sess = (struct cnxk_ae_sess *)\n-\t\t\t\t\tasym_op->session->sess_private_data;\n-\t\t\tret = cnxk_ae_enqueue(qp, op, infl_req, &inst[0],\n-\t\t\t\t\t ae_sess);\n+\t\t\tae_sess = (struct cnxk_ae_sess *)asym_op->session;\n+\t\t\tret = cnxk_ae_enqueue(qp, op, infl_req, &inst[0], ae_sess);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n \t\t\tw7 = ae_sess->cpt_inst_w7;\n@@ -330,10 +328,9 @@ cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused, vo\n \t\t\treturn -EINVAL;\n \t} else if (op_type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n \t\tif (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\tstruct rte_cryptodev_asym_session *asym_sess = sess;\n \t\t\tstruct cnxk_ae_sess *priv;\n \n-\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv = (struct cnxk_ae_sess *)sess;\n \t\t\tpriv->qp = qp;\n \t\t\tpriv->cpt_inst_w2 = w2;\n \t\t} else\n@@ -381,11 +378,9 @@ cn10k_ca_meta_info_extract(struct rte_crypto_op *op, struct cnxk_cpt_qp **qp, ui\n \t\t}\n \t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\tstruct rte_cryptodev_asym_session *asym_sess;\n \t\t\tstruct cnxk_ae_sess *priv;\n \n-\t\t\tasym_sess = op->asym->session;\n-\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv = (struct cnxk_ae_sess *)op->asym->session;\n \t\t\t*qp = priv->qp;\n \t\t\t*w2 = priv->cpt_inst_w2;\n \t\t} else\n@@ -890,10 +885,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t\t} else if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n \t\t\tstruct rte_crypto_asym_op *op = cop->asym;\n \t\t\tuintptr_t *mdata = infl_req->mdata;\n-\t\t\tstruct cnxk_ae_sess *sess;\n-\n-\t\t\tsess = (struct cnxk_ae_sess *)\n-\t\t\t\t\top->session->sess_private_data;\n+\t\t\tstruct cnxk_ae_sess *sess = (struct cnxk_ae_sess *)op->session;\n \n \t\t\tcnxk_ae_post_process(cop, sess, (uint8_t *)mdata[0]);\n \t\t}\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 11541b6ab9..34d40b07d4 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -105,13 +105,10 @@ cn9k_cpt_inst_prep(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n \t\t}\n \t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n-\t\tstruct rte_crypto_asym_op *asym_op;\n \t\tstruct cnxk_ae_sess *sess;\n \n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\tasym_op = op->asym;\n-\t\t\tsess = (struct cnxk_ae_sess *)\n-\t\t\t\t\tasym_op->session->sess_private_data;\n+\t\t\tsess = (struct cnxk_ae_sess *)op->asym->session;\n \t\t\tret = cnxk_ae_enqueue(qp, op, infl_req, inst, sess);\n \t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n \t\t} else {\n@@ -345,7 +342,7 @@ cn9k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n \t\t\tstruct rte_cryptodev_asym_session *asym_sess = sess;\n \t\t\tstruct cnxk_ae_sess *priv;\n \n-\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess;\n \t\t\tpriv->qp = qp;\n \t\t\tpriv->cpt_inst_w2 = w2;\n \t\t} else\n@@ -393,11 +390,9 @@ cn9k_ca_meta_info_extract(struct rte_crypto_op *op,\n \t\t}\n \t} else if (op->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n-\t\t\tstruct rte_cryptodev_asym_session *asym_sess;\n \t\t\tstruct cnxk_ae_sess *priv;\n \n-\t\t\tasym_sess = op->asym->session;\n-\t\t\tpriv = (struct cnxk_ae_sess *)asym_sess->sess_private_data;\n+\t\t\tpriv = (struct cnxk_ae_sess *)op->asym->session;\n \t\t\t*qp = priv->qp;\n \t\t\tinst->w2.u64 = priv->cpt_inst_w2;\n \t\t} else\n@@ -609,10 +604,7 @@ cn9k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp, struct rte_crypto_op *cop,\n \t\t} else if (cop->type == RTE_CRYPTO_OP_TYPE_ASYMMETRIC) {\n \t\t\tstruct rte_crypto_asym_op *op = cop->asym;\n \t\t\tuintptr_t *mdata = infl_req->mdata;\n-\t\t\tstruct cnxk_ae_sess *sess;\n-\n-\t\t\tsess = (struct cnxk_ae_sess *)\n-\t\t\t\t\top->session->sess_private_data;\n+\t\t\tstruct cnxk_ae_sess *sess = (struct cnxk_ae_sess *)op->session;\n \n \t\t\tcnxk_ae_post_process(cop, sess, (uint8_t *)mdata[0]);\n \t\t}\ndiff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h\nindex 698c10129e..b7c13a9e01 100644\n--- a/drivers/crypto/cnxk/cnxk_ae.h\n+++ b/drivers/crypto/cnxk/cnxk_ae.h\n@@ -13,7 +13,10 @@\n \n #include \"cnxk_cryptodev_ops.h\"\n \n+#define ASYM_SESS_SIZE sizeof(struct rte_cryptodev_asym_session)\n+\n struct cnxk_ae_sess {\n+\tuint8_t rte_sess[ASYM_SESS_SIZE];\n \tenum rte_crypto_asym_xform_type xfrm_type;\n \tunion {\n \t\tstruct rte_crypto_rsa_xform rsa_ctx;\n@@ -25,6 +28,24 @@ struct cnxk_ae_sess {\n \tuint64_t cpt_inst_w7;\n \tuint64_t cpt_inst_w2;\n \tstruct cnxk_cpt_qp *qp;\n+\tstruct roc_cpt_lf *lf;\n+\tstruct hw_ctx_s {\n+\t\tunion {\n+\t\t\tstruct {\n+\t\t\t\tuint64_t rsvd : 48;\n+\n+\t\t\t\tuint64_t ctx_push_size : 7;\n+\t\t\t\tuint64_t rsvd1 : 1;\n+\n+\t\t\t\tuint64_t ctx_hdr_size : 2;\n+\t\t\t\tuint64_t aop_valid : 1;\n+\t\t\t\tuint64_t rsvd2 : 1;\n+\t\t\t\tuint64_t ctx_size : 4;\n+\t\t\t} s;\n+\t\t\tuint64_t u64;\n+\t\t} w0;\n+\t\tuint8_t rsvd[256];\n+\t} hw_ctx __plt_aligned(ROC_ALIGN);\n };\n \n static __rte_always_inline void\ndiff --git a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\nindex 27f2846f74..f03646fe1a 100644\n--- a/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cnxk_cryptodev_ops.c\n@@ -760,14 +760,14 @@ cnxk_ae_session_size_get(struct rte_cryptodev *dev __rte_unused)\n }\n \n void\n-cnxk_ae_session_clear(struct rte_cryptodev *dev,\n-\t\t struct rte_cryptodev_asym_session *sess)\n+cnxk_ae_session_clear(struct rte_cryptodev *dev, struct rte_cryptodev_asym_session *sess)\n {\n-\tstruct cnxk_ae_sess *priv;\n+\tstruct cnxk_ae_sess *priv = (struct cnxk_ae_sess *)sess;\n \n-\tpriv = (struct cnxk_ae_sess *) sess->sess_private_data;\n-\tif (priv == NULL)\n-\t\treturn;\n+\t/* Trigger CTX flush + invalidate to remove from CTX_CACHE */\n+\troc_cpt_lf_ctx_flush(priv->lf, &priv->hw_ctx, true);\n+\n+\tplt_delay_ms(1);\n \n \t/* Free resources allocated in session_cfg */\n \tcnxk_ae_free_session_parameters(priv);\n@@ -777,23 +777,36 @@ cnxk_ae_session_clear(struct rte_cryptodev *dev,\n }\n \n int\n-cnxk_ae_session_cfg(struct rte_cryptodev *dev,\n-\t\t struct rte_crypto_asym_xform *xform,\n+cnxk_ae_session_cfg(struct rte_cryptodev *dev, struct rte_crypto_asym_xform *xform,\n \t\t struct rte_cryptodev_asym_session *sess)\n {\n-\tstruct cnxk_ae_sess *priv =\n-\t\t\t(struct cnxk_ae_sess *) sess->sess_private_data;\n+\tstruct cnxk_ae_sess *priv = (struct cnxk_ae_sess *)sess;\n \tstruct cnxk_cpt_vf *vf = dev->data->dev_private;\n \tstruct roc_cpt *roc_cpt = &vf->cpt;\n \tunion cpt_inst_w7 w7;\n+\tstruct hw_ctx_s *hwc;\n \tint ret;\n \n \tret = cnxk_ae_fill_session_parameters(priv, xform);\n \tif (ret)\n \t\treturn ret;\n \n+\tpriv->lf = roc_cpt->lf[0];\n+\n \tw7.u64 = 0;\n \tw7.s.egrp = roc_cpt->eng_grp[CPT_ENG_TYPE_AE];\n+\n+\tif (vf->cpt.cpt_revision == ROC_CPT_REVISION_ID_106XX) {\n+\t\thwc = &priv->hw_ctx;\n+\t\thwc->w0.s.aop_valid = 1;\n+\t\thwc->w0.s.ctx_hdr_size = 0;\n+\t\thwc->w0.s.ctx_size = 1;\n+\t\thwc->w0.s.ctx_push_size = 1;\n+\n+\t\tw7.s.cptr = (uint64_t)hwc;\n+\t\tw7.s.ctx_val = 1;\n+\t}\n+\n \tpriv->cpt_inst_w7 = w7.u64;\n \tpriv->cnxk_fpm_iova = vf->cnxk_fpm_iova;\n \tpriv->ec_grp = vf->ec_grp;\n", "prefixes": [ "v2", "05/11" ] }