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GET /api/patches/124351/?format=api
{ "id": 124351, "url": "http://patches.dpdk.org/api/patches/124351/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230222122628.29627-1-jiaweiw@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230222122628.29627-1-jiaweiw@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230222122628.29627-1-jiaweiw@nvidia.com", "date": "2023-02-22T12:26:25", "name": "[v2,0/3] Add Tx queue mapping of aggregated ports in MLX5 PMD", "commit_ref": null, "pull_url": null, "state": null, "archived": false, "hash": null, "submitter": { "id": 1939, "url": "http://patches.dpdk.org/api/people/1939/?format=api", "name": "Jiawei Wang", "email": "jiaweiw@nvidia.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230222122628.29627-1-jiaweiw@nvidia.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/124351/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/124351/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 85E4C41D3C;\n\tWed, 22 Feb 2023 13:26:58 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2416040693;\n\tWed, 22 Feb 2023 13:26:58 +0100 (CET)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2066.outbound.protection.outlook.com [40.107.220.66])\n by mails.dpdk.org (Postfix) with ESMTP id 7E7EF40689\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Jiawei Wang <jiaweiw@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <orika@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[PATCH v2 0/3] Add Tx queue mapping of aggregated ports in MLX5 PMD", "Date": "Wed, 22 Feb 2023 14:26:25 +0200", "Message-ID": "<20230222122628.29627-1-jiaweiw@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20230203052107.48293-1-jiaweiw@nvidia.com>", "References": "<20230203052107.48293-1-jiaweiw@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.37]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT049:EE_|BL0PR12MB4993:EE_", "X-MS-Office365-Filtering-Correlation-Id": "e2c4a6dc-2e7d-4cdf-cd3e-08db14d01533", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n Zd3SkpQr1YtbhF0fSQUgyTEnt4BS5dgEgdk4titFilLxznz8wDPDmTGcYqjXpjPnjZf/+gfQeqXO4yaea4o30RYgf47hNkkDxwpJSXZwVzGGlkEYttIgUdzTXLIN7vJZBolt81tyi5dTsg3EeqttdLPP1fnArWCkHwJfHHl5MmLoQpbJiUS8vVCFS1pbjNg95U3Cu5BeaR0QLG//+GELjHClepnpy3sKVb7r/pk9gVJUlP8rO8Em8Pc7XFSkd6bC86/gD1Rei0f41DUf5+91OfTI+XaLZiw26f38A4z74wlQy0UkYHoN8xgr77sT0LQLkHEgYa0glYiMUvAbDUHiBYN872LgIjhktDT6dg6eTMY6QGAze+kaP5oRT50Gd3CT2Di/aYRqPKqhNrfkYgmVjON+h6jI5YbvEAWEmiruADtK+P0EZWxNa6gXDKM2g3/Ym5rRTOy3C/IV5mJZ7e7EQwHphImHskd+6ow+2uUBHHuXEoivZxKeby9NXSO9YUfaIoW59mV85mREbkX6iG/Dxe3mlYYfE9q+Fp247wntWtpJ2ln07chGUaDRK5ZsoR5VfLAsth2ZGIq++dt3n10+4Q2oh7CO/DdqZeUc56A0bK0+xrId0fDUyCS2WuI4U5dbH02uSJkAUq1eIYrzPvr1i+RzkS+QRydmYlwW3sR+cCgVPf+IebvwZg2psDGEry5EUGNHP2TR4f4Qp/Ag56XJu1SIHvstZTcna9RGczPBQVlA0TYeUoKQyA+JsCuO26pX", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230025)(4636009)(376002)(136003)(39860400002)(396003)(346002)(451199018)(36840700001)(46966006)(83380400001)(40480700001)(54906003)(110136005)(6636002)(26005)(55016003)(316002)(36756003)(966005)(336012)(7696005)(16526019)(107886003)(1076003)(6666004)(2616005)(186003)(478600001)(47076005)(426003)(6286002)(8936002)(356005)(86362001)(5660300002)(2906002)(36860700001)(82310400005)(34020700004)(41300700001)(82740400003)(4326008)(8676002)(7636003)(70206006)(70586007);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "22 Feb 2023 12:26:54.2495 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n e2c4a6dc-2e7d-4cdf-cd3e-08db14d01533", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT049.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BL0PR12MB4993", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch implements RTE_FLOW_ITEM_TYPE_AGGR_AFFINITY\nsupport in MLX5 PMD.\n\nThis patch adds the MLX5 PMD support for two device ops:\n - map_aggr_tx_affinity\n - count_aggr_ports\n\nThis patch series relies on the preceding RTE API:\nhttp://patches.dpdk.org/project/dpdk/list/?series=27064\n\nv2:\n * update the PMD code based on the new RTE API.\n\nJiawei Wang (3):\n net/mlx5: add lag Rx port affinity in PRM\n net/mlx5: add aggregated affinity item support\n net/mlx5: enhance the Tx queue affinity\n\n doc/guides/nics/features/default.ini | 1 +\n doc/guides/nics/features/mlx5.ini | 1 +\n doc/guides/nics/mlx5.rst | 6 ++\n drivers/common/mlx5/mlx5_devx_cmds.c | 3 +\n drivers/common/mlx5/mlx5_devx_cmds.h | 1 +\n drivers/common/mlx5/mlx5_prm.h | 15 ++--\n drivers/net/mlx5/linux/mlx5_os.c | 6 ++\n drivers/net/mlx5/mlx5.c | 49 ++++++-------\n drivers/net/mlx5/mlx5.h | 3 +\n drivers/net/mlx5/mlx5_devx.c | 24 ++++---\n drivers/net/mlx5/mlx5_flow.h | 3 +\n drivers/net/mlx5/mlx5_flow_dv.c | 100 ++++++++++++++++++++++++++-\n drivers/net/mlx5/mlx5_flow_hw.c | 14 ++++\n drivers/net/mlx5/mlx5_tx.h | 4 ++\n drivers/net/mlx5/mlx5_txq.c | 38 ++++++++++\n 15 files changed, 221 insertions(+), 47 deletions(-)", "diff": null, "prefixes": [ "v2", "0/3" ] }