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GET /api/patches/123552/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 123552,
    "url": "http://patches.dpdk.org/api/patches/123552/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230209084541.2712723-11-mingxia.liu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230209084541.2712723-11-mingxia.liu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230209084541.2712723-11-mingxia.liu@intel.com",
    "date": "2023-02-09T08:45:30",
    "name": "[v5,10/21] net/cpfl: support basic Tx data path",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6693dea5e6ca08a06effb39f3b8f58388b7a3db3",
    "submitter": {
        "id": 2514,
        "url": "http://patches.dpdk.org/api/people/2514/?format=api",
        "name": "Liu, Mingxia",
        "email": "mingxia.liu@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230209084541.2712723-11-mingxia.liu@intel.com/mbox/",
    "series": [
        {
            "id": 26914,
            "url": "http://patches.dpdk.org/api/series/26914/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26914",
            "date": "2023-02-09T08:45:20",
            "name": "add support for cpfl PMD in DPDK",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/26914/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/123552/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/123552/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4784D41C4D;\n\tThu,  9 Feb 2023 10:44:06 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 26F4442D53;\n\tThu,  9 Feb 2023 10:43:21 +0100 (CET)",
            "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id B215842D44\n for <dev@dpdk.org>; Thu,  9 Feb 2023 10:43:18 +0100 (CET)",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 09 Feb 2023 01:43:13 -0800",
            "from dpdk-mingxial-01.sh.intel.com ([10.67.119.167])\n by orsmga008.jf.intel.com with ESMTP; 09 Feb 2023 01:43:08 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1675935799; x=1707471799;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Tk/rhU5M5XNLuQNo1XiIJJOfjmNrZCdRrMymfclzrww=;\n b=CNtbUNrDTTi4VGUtwuaeDRN9YXQNucAaz1+gitNenftNS2V3CDnM2bAO\n r/iF+IJPKhz3DoOIb/bohx/PJtmqWf6S5W5sW7gnYdLzYNqI6EQF9RWOQ\n yhr/5sffa8404zxEXDf1AL+22L5wHoltcxkzPH1PHhmaRSRDhVchb4pmJ\n PYIfPp5+4JqkrIerL/EYgz9rU724bDUnI6b800xREOL0+PTizxoaZE1td\n mAxbOQCog+yaSrjoi1aUZ02RY50NMTQ5vUCUKIOCqnjmGa4EEuBDcz+eF\n sIGR+zgFPeN58PJUTkbyNs+r7Hin00VraxTyD9MVlThp4wczdisasXout A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10615\"; a=\"309712353\"",
            "E=Sophos;i=\"5.97,283,1669104000\"; d=\"scan'208\";a=\"309712353\"",
            "E=McAfee;i=\"6500,9779,10615\"; a=\"697964690\"",
            "E=Sophos;i=\"5.97,283,1669104000\"; d=\"scan'208\";a=\"697964690\""
        ],
        "X-ExtLoop1": "1",
        "From": "Mingxia Liu <mingxia.liu@intel.com>",
        "To": "dev@dpdk.org, qi.z.zhang@intel.com, jingjing.wu@intel.com,\n beilei.xing@intel.com",
        "Cc": "Mingxia Liu <mingxia.liu@intel.com>",
        "Subject": "[PATCH v5 10/21] net/cpfl: support basic Tx data path",
        "Date": "Thu,  9 Feb 2023 08:45:30 +0000",
        "Message-Id": "<20230209084541.2712723-11-mingxia.liu@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20230209084541.2712723-1-mingxia.liu@intel.com>",
        "References": "<20230118075738.904616-1-mingxia.liu@intel.com>\n <20230209084541.2712723-1-mingxia.liu@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add basic Tx support in split queue mode and single queue mode.\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\n---\n drivers/net/cpfl/cpfl_ethdev.c |  3 +++\n drivers/net/cpfl/cpfl_rxtx.c   | 20 ++++++++++++++++++++\n drivers/net/cpfl/cpfl_rxtx.h   |  1 +\n 3 files changed, 24 insertions(+)",
    "diff": "diff --git a/drivers/net/cpfl/cpfl_ethdev.c b/drivers/net/cpfl/cpfl_ethdev.c\nindex cdbe0eede2..b24fae8f3f 100644\n--- a/drivers/net/cpfl/cpfl_ethdev.c\n+++ b/drivers/net/cpfl/cpfl_ethdev.c\n@@ -97,6 +97,8 @@ cpfl_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tdev_info->max_mtu = vport->max_mtu;\n \tdev_info->min_mtu = RTE_ETHER_MIN_MTU;\n \n+\tdev_info->tx_offload_capa = RTE_ETH_TX_OFFLOAD_MULTI_SEGS;\n+\n \tdev_info->default_txconf = (struct rte_eth_txconf) {\n \t\t.tx_free_thresh = CPFL_DEFAULT_TX_FREE_THRESH,\n \t\t.tx_rs_thresh = CPFL_DEFAULT_TX_RS_THRESH,\n@@ -256,6 +258,7 @@ cpfl_dev_start(struct rte_eth_dev *dev)\n \t}\n \n \tcpfl_set_rx_function(dev);\n+\tcpfl_set_tx_function(dev);\n \n \tret = idpf_vc_vport_ena_dis(vport, true);\n \tif (ret != 0) {\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.c b/drivers/net/cpfl/cpfl_rxtx.c\nindex d583079fb6..9c59b74c90 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.c\n+++ b/drivers/net/cpfl/cpfl_rxtx.c\n@@ -752,3 +752,23 @@ cpfl_set_rx_function(struct rte_eth_dev *dev)\n \t\tdev->rx_pkt_burst = idpf_dp_singleq_recv_pkts;\n \t}\n }\n+\n+void\n+cpfl_set_tx_function(struct rte_eth_dev *dev)\n+{\n+\tstruct idpf_vport *vport = dev->data->dev_private;\n+\n+\tif (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) {\n+\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t    \"Using Split Scalar Tx (port %d).\",\n+\t\t\t    dev->data->port_id);\n+\t\tdev->tx_pkt_burst = idpf_dp_splitq_xmit_pkts;\n+\t\tdev->tx_pkt_prepare = idpf_dp_prep_pkts;\n+\t} else {\n+\t\tPMD_DRV_LOG(NOTICE,\n+\t\t\t    \"Using Single Scalar Tx (port %d).\",\n+\t\t\t    dev->data->port_id);\n+\t\tdev->tx_pkt_burst = idpf_dp_singleq_xmit_pkts;\n+\t\tdev->tx_pkt_prepare = idpf_dp_prep_pkts;\n+\t}\n+}\ndiff --git a/drivers/net/cpfl/cpfl_rxtx.h b/drivers/net/cpfl/cpfl_rxtx.h\nindex a5dd388e1f..5f8144e55f 100644\n--- a/drivers/net/cpfl/cpfl_rxtx.h\n+++ b/drivers/net/cpfl/cpfl_rxtx.h\n@@ -38,4 +38,5 @@ int cpfl_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n void cpfl_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n void cpfl_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n void cpfl_set_rx_function(struct rte_eth_dev *dev);\n+void cpfl_set_tx_function(struct rte_eth_dev *dev);\n #endif /* _CPFL_RXTX_H_ */\n",
    "prefixes": [
        "v5",
        "10/21"
    ]
}