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GET /api/patches/122249/?format=api
{ "id": 122249, "url": "http://patches.dpdk.org/api/patches/122249/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230118071440.902155-4-mingxia.liu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230118071440.902155-4-mingxia.liu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230118071440.902155-4-mingxia.liu@intel.com", "date": "2023-01-18T07:14:37", "name": "[v3,3/6] common/idpf: support single q scatter RX datapath", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "19460d913497ac7abdfb5c9b04aeb9daacb54ef2", "submitter": { "id": 2514, "url": "http://patches.dpdk.org/api/people/2514/?format=api", "name": "Liu, Mingxia", "email": "mingxia.liu@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230118071440.902155-4-mingxia.liu@intel.com/mbox/", "series": [ { "id": 26587, "url": "http://patches.dpdk.org/api/series/26587/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26587", "date": "2023-01-18T07:14:34", "name": "add idpf pmd enhancement features", "version": 3, "mbox": "http://patches.dpdk.org/series/26587/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/122249/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/122249/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DFBB34240B;\n\tWed, 18 Jan 2023 09:10:41 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D997B42D4A;\n\tWed, 18 Jan 2023 09:10:28 +0100 (CET)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 73B0942C4D\n for <dev@dpdk.org>; Wed, 18 Jan 2023 09:10:25 +0100 (CET)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Jan 2023 00:10:25 -0800", "from dpdk-mingxial-01.sh.intel.com ([10.67.119.167])\n by orsmga004.jf.intel.com with ESMTP; 18 Jan 2023 00:10:23 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1674029425; x=1705565425;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=6yi6ECni9tlBuICXgya15Wrl2cpxwVJ5D4JEUrjp4Ms=;\n b=Y3z1U7uQaAZ7ttSpqnck2quZrXWb97Tf/LOrbDpH2Wc6Ygv8YhYPS/JV\n Tq69ZhwnKs3BAvmf4P/QoQDey9dYfJ458Mq+8BiiZ0c4sjGqx+MnOZxgE\n XmiwYRx7I/NgAohh8oV/HRHLUHvDLZfkQdXJa9WhAHQu1n7ScUXcBHwGq\n /ElwjVSPXwheGhZbhzCizCbLFte/178NM1GBjJu5/HUkjDPtrQlqqabKe\n 7m0nKfwwjbfkRajG1G2XS7B7/958q+AfLHHFtL7Lka9UDbfQkj0nrbGnb\n J6MmBPIuoDayV1CvXBItSnStuZWDdeeKTjJxfOzAvJ5xacnZOqe5tCs0W w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10593\"; a=\"411166162\"", "E=Sophos;i=\"5.97,224,1669104000\"; d=\"scan'208\";a=\"411166162\"", "E=McAfee;i=\"6500,9779,10593\"; a=\"783577528\"", "E=Sophos;i=\"5.97,224,1669104000\"; d=\"scan'208\";a=\"783577528\"" ], "X-ExtLoop1": "1", "From": "Mingxia Liu <mingxia.liu@intel.com>", "To": "dev@dpdk.org", "Cc": "jingjing.wu@intel.com, beilei.xing@intel.com,\n Mingxia Liu <mingxia.liu@intel.com>, Wenjun Wu <wenjun1.wu@intel.com>", "Subject": "[PATCH v3 3/6] common/idpf: support single q scatter RX datapath", "Date": "Wed, 18 Jan 2023 07:14:37 +0000", "Message-Id": "<20230118071440.902155-4-mingxia.liu@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230118071440.902155-1-mingxia.liu@intel.com>", "References": "<20230111071545.504706-1-mingxia.liu@intel.com>\n <20230118071440.902155-1-mingxia.liu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch add single q recv scatter rx function.\n\nSigned-off-by: Mingxia Liu <mingxia.liu@intel.com>\nSigned-off-by: Wenjun Wu <wenjun1.wu@intel.com>\n---\n drivers/common/idpf/idpf_common_rxtx.c | 134 +++++++++++++++++++++++++\n drivers/common/idpf/idpf_common_rxtx.h | 3 +\n drivers/common/idpf/version.map | 1 +\n drivers/net/idpf/idpf_ethdev.c | 3 +-\n drivers/net/idpf/idpf_rxtx.c | 26 ++++-\n drivers/net/idpf/idpf_rxtx.h | 2 +\n 6 files changed, 166 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/common/idpf/idpf_common_rxtx.c b/drivers/common/idpf/idpf_common_rxtx.c\nindex 7a5dc3f04c..9dbf0f4764 100644\n--- a/drivers/common/idpf/idpf_common_rxtx.c\n+++ b/drivers/common/idpf/idpf_common_rxtx.c\n@@ -1146,6 +1146,140 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \treturn nb_rx;\n }\n \n+uint16_t\n+idpf_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t uint16_t nb_pkts)\n+{\n+\tstruct idpf_rx_queue *rxq = rx_queue;\n+\tvolatile union virtchnl2_rx_desc *rx_ring = rxq->rx_ring;\n+\tvolatile union virtchnl2_rx_desc *rxdp;\n+\tunion virtchnl2_rx_desc rxd;\n+\tstruct idpf_adapter *ad;\n+\tstruct rte_mbuf *first_seg = rxq->pkt_first_seg;\n+\tstruct rte_mbuf *last_seg = rxq->pkt_last_seg;\n+\tstruct rte_mbuf *rxm;\n+\tstruct rte_mbuf *nmb;\n+\tstruct rte_eth_dev *dev;\n+\tconst uint32_t *ptype_tbl = rxq->adapter->ptype_tbl;\n+\tuint16_t nb_hold = 0, nb_rx = 0;\n+\tuint16_t rx_id = rxq->rx_tail;\n+\tuint16_t rx_packet_len;\n+\tuint16_t rx_status0;\n+\tuint64_t pkt_flags;\n+\tuint64_t dma_addr;\n+\tuint64_t ts_ns;\n+\n+\tad = rxq->adapter;\n+\n+\tif (unlikely(!rxq) || unlikely(!rxq->q_started))\n+\t\treturn nb_rx;\n+\n+\twhile (nb_rx < nb_pkts) {\n+\t\trxdp = &rx_ring[rx_id];\n+\t\trx_status0 = rte_le_to_cpu_16(rxdp->flex_nic_wb.status_error0);\n+\n+\t\t/* Check the DD bit first */\n+\t\tif (!(rx_status0 & (1 << VIRTCHNL2_RX_FLEX_DESC_STATUS0_DD_S)))\n+\t\t\tbreak;\n+\n+\t\tnmb = rte_mbuf_raw_alloc(rxq->mp);\n+\t\tif (unlikely(!nmb)) {\n+\t\t\trte_atomic64_inc(&(rxq->rx_stats.mbuf_alloc_failed));\n+\t\t\tRX_LOG(DEBUG, \"RX mbuf alloc failed port_id=%u \"\n+\t\t\t \"queue_id=%u\", rxq->port_id, rxq->queue_id);\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\trxd = *rxdp;\n+\n+\t\tnb_hold++;\n+\t\trxm = rxq->sw_ring[rx_id];\n+\t\trxq->sw_ring[rx_id] = nmb;\n+\t\trx_id++;\n+\t\tif (unlikely(rx_id == rxq->nb_rx_desc))\n+\t\t\trx_id = 0;\n+\n+\t\t/* Prefetch next mbuf */\n+\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\n+\t\t/* When next RX descriptor is on a cache line boundary,\n+\t\t * prefetch the next 4 RX descriptors and next 8 pointers\n+\t\t * to mbufs.\n+\t\t */\n+\t\tif ((rx_id & 0x3) == 0) {\n+\t\t\trte_prefetch0(&rx_ring[rx_id]);\n+\t\t\trte_prefetch0(rxq->sw_ring[rx_id]);\n+\t\t}\n+\t\tdma_addr =\n+\t\t\trte_cpu_to_le_64(rte_mbuf_data_iova_default(nmb));\n+\t\trxdp->read.hdr_addr = 0;\n+\t\trxdp->read.pkt_addr = dma_addr;\n+\t\trx_packet_len = (rte_cpu_to_le_16(rxd.flex_nic_wb.pkt_len) &\n+\t\t\t\t VIRTCHNL2_RX_FLEX_DESC_PKT_LEN_M);\n+\t\trxm->data_len = rx_packet_len;\n+\t\trxm->data_off = RTE_PKTMBUF_HEADROOM;\n+\n+\t\t/**\n+\t\t * If this is the first buffer of the received packet, set the\n+\t\t * pointer to the first mbuf of the packet and initialize its\n+\t\t * context. Otherwise, update the total length and the number\n+\t\t * of segments of the current scattered packet, and update the\n+\t\t * pointer to the last mbuf of the current packet.\n+\t\t */\n+\t\tif (!first_seg) {\n+\t\t\tfirst_seg = rxm;\n+\t\t\tfirst_seg->nb_segs = 1;\n+\t\t\tfirst_seg->pkt_len = rx_packet_len;\n+\t\t} else {\n+\t\t\tfirst_seg->pkt_len =\n+\t\t\t\t(uint16_t)(first_seg->pkt_len +\n+\t\t\t\t\t rx_packet_len);\n+\t\t\tfirst_seg->nb_segs++;\n+\t\t\tlast_seg->next = rxm;\n+\t\t}\n+\n+\t\tif (!(rx_status0 & (1 << VIRTCHNL2_RX_FLEX_DESC_STATUS0_EOF_S))) {\n+\t\t\tlast_seg = rxm;\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\trxm->next = NULL;\n+\n+\t\tfirst_seg->port = rxq->port_id;\n+\t\tfirst_seg->ol_flags = 0;\n+\t\tpkt_flags = idpf_rxd_to_pkt_flags(rx_status0);\n+\t\tfirst_seg->packet_type =\n+\t\t\tptype_tbl[(uint8_t)(rte_cpu_to_le_16(rxd.flex_nic_wb.ptype_flex_flags0) &\n+\t\t\t\tVIRTCHNL2_RX_FLEX_DESC_PTYPE_M)];\n+\n+\t\tif (idpf_timestamp_dynflag > 0 &&\n+\t\t (rxq->offloads & IDPF_RX_OFFLOAD_TIMESTAMP) != 0) {\n+\t\t\t/* timestamp */\n+\t\t\tts_ns = idpf_tstamp_convert_32b_64b(ad,\n+\t\t\t\trxq->hw_register_set,\n+\t\t\t\trte_le_to_cpu_32(rxd.flex_nic_wb.flex_ts.ts_high));\n+\t\t\trxq->hw_register_set = 0;\n+\t\t\t*RTE_MBUF_DYNFIELD(rxm,\n+\t\t\t\t\t idpf_timestamp_dynfield_offset,\n+\t\t\t\t\t rte_mbuf_timestamp_t *) = ts_ns;\n+\t\t\tfirst_seg->ol_flags |= idpf_timestamp_dynflag;\n+\t\t}\n+\n+\t\tfirst_seg->ol_flags |= pkt_flags;\n+\t\trte_prefetch0(RTE_PTR_ADD(first_seg->buf_addr,\n+\t\t\t\t\t first_seg->data_off));\n+\t\trx_pkts[nb_rx++] = first_seg;\n+\t\tfirst_seg = NULL;\n+\t}\n+\trxq->rx_tail = rx_id;\n+\trxq->pkt_first_seg = first_seg;\n+\trxq->pkt_last_seg = last_seg;\n+\n+\tidpf_update_rx_tail(rxq, nb_hold, rx_id);\n+\n+\treturn nb_rx;\n+}\n+\n static inline int\n idpf_xmit_cleanup(struct idpf_tx_queue *txq)\n {\ndiff --git a/drivers/common/idpf/idpf_common_rxtx.h b/drivers/common/idpf/idpf_common_rxtx.h\nindex 98f492a8c1..aac61ea2cb 100644\n--- a/drivers/common/idpf/idpf_common_rxtx.h\n+++ b/drivers/common/idpf/idpf_common_rxtx.h\n@@ -260,6 +260,9 @@ __rte_internal\n uint16_t idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\t uint16_t nb_pkts);\n __rte_internal\n+uint16_t idpf_singleq_recv_scatter_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t uint16_t nb_pkts);\n+__rte_internal\n uint16_t idpf_splitq_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t\t\t uint16_t nb_pkts);\n __rte_internal\ndiff --git a/drivers/common/idpf/version.map b/drivers/common/idpf/version.map\nindex 36a3a90d39..591af6b046 100644\n--- a/drivers/common/idpf/version.map\n+++ b/drivers/common/idpf/version.map\n@@ -32,6 +32,7 @@ INTERNAL {\n \tidpf_reset_split_tx_descq;\n \tidpf_rx_queue_release;\n \tidpf_singleq_recv_pkts;\n+\tidpf_singleq_recv_scatter_pkts;\n \tidpf_singleq_recv_pkts_avx512;\n \tidpf_singleq_rx_vec_setup;\n \tidpf_splitq_rx_vec_setup;\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex 037cabb04e..2ab31792ba 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -119,7 +119,8 @@ idpf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \t\tRTE_ETH_RX_OFFLOAD_UDP_CKSUM |\n \t\tRTE_ETH_RX_OFFLOAD_TCP_CKSUM |\n \t\tRTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |\n-\t\tRTE_ETH_RX_OFFLOAD_TIMESTAMP;\n+\t\tRTE_ETH_RX_OFFLOAD_TIMESTAMP\t\t|\n+\t\tRTE_ETH_RX_OFFLOAD_SCATTER;\n \n \tdev_info->tx_offload_capa =\n \t\tRTE_ETH_TX_OFFLOAD_IPV4_CKSUM\t\t|\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex 6eeaab41cc..a865d14fea 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -503,6 +503,8 @@ int\n idpf_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n {\n \tstruct idpf_rx_queue *rxq;\n+\tuint16_t max_pkt_len;\n+\tuint32_t frame_size;\n \tint err;\n \n \tif (rx_queue_id >= dev->data->nb_rx_queues)\n@@ -516,6 +518,17 @@ idpf_rx_queue_init(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \t\treturn -EINVAL;\n \t}\n \n+\tframe_size = dev->data->mtu + IDPF_ETH_OVERHEAD;\n+\n+\tmax_pkt_len =\n+\t RTE_MIN((uint32_t)IDPF_SUPPORT_CHAIN_NUM * rxq->rx_buf_len,\n+\t\t frame_size);\n+\n+\trxq->max_pkt_len = max_pkt_len;\n+\tif ((dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_SCATTER) ||\n+\t frame_size > rxq->rx_buf_len)\n+\t\tdev->data->scattered_rx = 1;\n+\n \terr = idpf_register_ts_mbuf(rxq);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"fail to regidter timestamp mbuf %u\",\n@@ -801,13 +814,22 @@ idpf_set_rx_function(struct rte_eth_dev *dev)\n #endif /* CC_AVX512_SUPPORT */\n \t\t}\n \n+\t\tif (dev->data->scattered_rx) {\n+\t\t\tdev->rx_pkt_burst = idpf_singleq_recv_scatter_pkts;\n+\t\t\treturn;\n+\t\t}\n \t\tdev->rx_pkt_burst = idpf_singleq_recv_pkts;\n \t}\n #else\n-\tif (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT)\n+\tif (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SPLIT) {\n \t\tdev->rx_pkt_burst = idpf_splitq_recv_pkts;\n-\telse\n+\t} else {\n+\t\tif (dev->data->scattered_rx) {\n+\t\t\tdev->rx_pkt_burst = idpf_singleq_recv_scatter_pkts;\n+\t\t\treturn;\n+\t\t}\n \t\tdev->rx_pkt_burst = idpf_singleq_recv_pkts;\n+\t}\n #endif /* RTE_ARCH_X86 */\n }\n \ndiff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h\nindex 3a5084dfd6..41a7495083 100644\n--- a/drivers/net/idpf/idpf_rxtx.h\n+++ b/drivers/net/idpf/idpf_rxtx.h\n@@ -23,6 +23,8 @@\n #define IDPF_DEFAULT_TX_RS_THRESH\t32\n #define IDPF_DEFAULT_TX_FREE_THRESH\t32\n \n+#define IDPF_SUPPORT_CHAIN_NUM 5\n+\n int idpf_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,\n \t\t\tuint16_t nb_desc, unsigned int socket_id,\n \t\t\tconst struct rte_eth_rxconf *rx_conf,\n", "prefixes": [ "v3", "3/6" ] }