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GET /api/patches/122150/?format=api
{ "id": 122150, "url": "http://patches.dpdk.org/api/patches/122150/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230117072626.93796-11-beilei.xing@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230117072626.93796-11-beilei.xing@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230117072626.93796-11-beilei.xing@intel.com", "date": "2023-01-17T07:26:17", "name": "[v3,08/15] common/idpf: support get packet type", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "09f492712e6d9fa0c63bc2381aaec41478ee9966", "submitter": { "id": 410, "url": "http://patches.dpdk.org/api/people/410/?format=api", "name": "Xing, Beilei", "email": "beilei.xing@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230117072626.93796-11-beilei.xing@intel.com/mbox/", "series": [ { "id": 26570, "url": "http://patches.dpdk.org/api/series/26570/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26570", "date": "2023-01-17T07:26:17", "name": null, "version": 3, "mbox": "http://patches.dpdk.org/series/26570/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/122150/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/122150/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9982C423FA;\n\tTue, 17 Jan 2023 08:52:15 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 35D0B42D63;\n\tTue, 17 Jan 2023 08:51:11 +0100 (CET)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 5396842D36\n for <dev@dpdk.org>; Tue, 17 Jan 2023 08:51:09 +0100 (CET)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Jan 2023 23:51:08 -0800", "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by fmsmga002.fm.intel.com with ESMTP; 16 Jan 2023 23:51:06 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1673941869; x=1705477869;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Kr6VkxCLfmzyVm68vs/2q64VE3cweGA8PtEVd6NLQ3E=;\n b=J0WE2qMb70E4iURT49bTkxgVe0gf9QQUhfaSsKuNSvr4tEZzJdzXJSNu\n 8AsmuWFpH00NI6956CTHMvx2RBTKAGFsb5GV48PM0x290SvhI6ftVQSIT\n zoyaBjwv3jUk3gJjCpqUIz8Y9uPdWhiKZN3VSW1LJUdAQewmSfPLYeQHg\n 36j/ZhN7ABdr9QiYY5E9wCzOw10nCN6dNP8uj7fyX9NpyqAgmqXfu5WR8\n Mq9aY93dNZOhRfXd/HX5nxWPwDQX5eLWMFyyBUhlyUo3FGq1acufXUOzk\n sWLPwO7GeBjyuP/IibCVurMDfrl6kVqIWsPOLwx+OP1mgXAU9yY40HJQK Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10592\"; a=\"312497051\"", "E=Sophos;i=\"5.97,222,1669104000\"; d=\"scan'208\";a=\"312497051\"", "E=McAfee;i=\"6500,9779,10592\"; a=\"767174528\"", "E=Sophos;i=\"5.97,222,1669104000\"; d=\"scan'208\";a=\"767174528\"" ], "X-ExtLoop1": "1", "From": "beilei.xing@intel.com", "To": "jingjing.wu@intel.com", "Cc": "dev@dpdk.org,\n\tqi.z.zhang@intel.com,\n\tBeilei Xing <beilei.xing@intel.com>", "Subject": "[PATCH v3 08/15] common/idpf: support get packet type", "Date": "Tue, 17 Jan 2023 07:26:17 +0000", "Message-Id": "<20230117072626.93796-11-beilei.xing@intel.com>", "X-Mailer": "git-send-email 2.26.2", "In-Reply-To": "<20230117072626.93796-1-beilei.xing@intel.com>", "References": "\n <https://patches.dpdk.org/project/dpdk/cover/20230106091627.13530-1-beilei.xing@intel.com/>\n <20230117072626.93796-1-beilei.xing@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nMove ptype_tbl field to idpf_adapter structure.\nMove get_pkt_type to common module.\n\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/common/idpf/idpf_common_device.c | 216 +++++++++++++++++++++\n drivers/common/idpf/idpf_common_device.h | 7 +\n drivers/common/idpf/idpf_common_virtchnl.h | 10 +-\n drivers/common/idpf/meson.build | 2 +\n drivers/net/idpf/idpf_ethdev.c | 6 -\n drivers/net/idpf/idpf_ethdev.h | 4 -\n drivers/net/idpf/idpf_rxtx.c | 4 +-\n drivers/net/idpf/idpf_rxtx.h | 4 -\n drivers/net/idpf/idpf_rxtx_vec_avx512.c | 3 +-\n drivers/net/idpf/idpf_vchnl.c | 213 --------------------\n 10 files changed, 233 insertions(+), 236 deletions(-)", "diff": "diff --git a/drivers/common/idpf/idpf_common_device.c b/drivers/common/idpf/idpf_common_device.c\nindex 422b0b0304..9647d4a62a 100644\n--- a/drivers/common/idpf/idpf_common_device.c\n+++ b/drivers/common/idpf/idpf_common_device.c\n@@ -96,6 +96,216 @@ idpf_init_mbx(struct idpf_hw *hw)\n \treturn ret;\n }\n \n+static int\n+idpf_get_pkt_type(struct idpf_adapter *adapter)\n+{\n+\tstruct virtchnl2_get_ptype_info *ptype_info;\n+\tuint16_t ptype_offset, i, j;\n+\tuint16_t ptype_recvd = 0;\n+\tint ret;\n+\n+\tret = idpf_vc_query_ptype_info(adapter);\n+\tif (ret != 0) {\n+\t\tDRV_LOG(ERR, \"Fail to query packet type information\");\n+\t\treturn ret;\n+\t}\n+\n+\tptype_info = rte_zmalloc(\"ptype_info\", IDPF_DFLT_MBX_BUF_SIZE, 0);\n+\t\tif (ptype_info == NULL)\n+\t\t\treturn -ENOMEM;\n+\n+\twhile (ptype_recvd < IDPF_MAX_PKT_TYPE) {\n+\t\tret = idpf_read_one_msg(adapter, VIRTCHNL2_OP_GET_PTYPE_INFO,\n+\t\t\t\t\tIDPF_DFLT_MBX_BUF_SIZE, (uint8_t *)ptype_info);\n+\t\tif (ret != 0) {\n+\t\t\tDRV_LOG(ERR, \"Fail to get packet type information\");\n+\t\t\tgoto free_ptype_info;\n+\t\t}\n+\n+\t\tptype_recvd += ptype_info->num_ptypes;\n+\t\tptype_offset = sizeof(struct virtchnl2_get_ptype_info) -\n+\t\t\t\t\t\tsizeof(struct virtchnl2_ptype);\n+\n+\t\tfor (i = 0; i < rte_cpu_to_le_16(ptype_info->num_ptypes); i++) {\n+\t\t\tbool is_inner = false, is_ip = false;\n+\t\t\tstruct virtchnl2_ptype *ptype;\n+\t\t\tuint32_t proto_hdr = 0;\n+\n+\t\t\tptype = (struct virtchnl2_ptype *)\n+\t\t\t\t\t((uint8_t *)ptype_info + ptype_offset);\n+\t\t\tptype_offset += IDPF_GET_PTYPE_SIZE(ptype);\n+\t\t\tif (ptype_offset > IDPF_DFLT_MBX_BUF_SIZE) {\n+\t\t\t\tret = -EINVAL;\n+\t\t\t\tgoto free_ptype_info;\n+\t\t\t}\n+\n+\t\t\tif (rte_cpu_to_le_16(ptype->ptype_id_10) == 0xFFFF)\n+\t\t\t\tgoto free_ptype_info;\n+\n+\t\t\tfor (j = 0; j < ptype->proto_id_count; j++) {\n+\t\t\t\tswitch (rte_cpu_to_le_16(ptype->proto_id[j])) {\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GRE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VXLAN:\n+\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L4_MASK;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GRENAT;\n+\t\t\t\t\tis_inner = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MAC:\n+\t\t\t\t\tif (is_inner) {\n+\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_INNER_L2_MASK;\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L2_ETHER;\n+\t\t\t\t\t} else {\n+\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER;\n+\t\t\t\t\t}\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VLAN:\n+\t\t\t\t\tif (is_inner) {\n+\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_INNER_L2_MASK;\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L2_ETHER_VLAN;\n+\t\t\t\t\t}\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PTP:\n+\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_TIMESYNC;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_LLDP:\n+\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_LLDP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ARP:\n+\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_ARP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PPPOE:\n+\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_PPPOE;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV4:\n+\t\t\t\t\tif (!is_ip) {\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;\n+\t\t\t\t\t\tis_ip = true;\n+\t\t\t\t\t} else {\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |\n+\t\t\t\t\t\t\t RTE_PTYPE_TUNNEL_IP;\n+\t\t\t\t\t\tis_inner = true;\n+\t\t\t\t\t}\n+\t\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6:\n+\t\t\t\t\tif (!is_ip) {\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;\n+\t\t\t\t\t\tis_ip = true;\n+\t\t\t\t\t} else {\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |\n+\t\t\t\t\t\t\t RTE_PTYPE_TUNNEL_IP;\n+\t\t\t\t\t\tis_inner = true;\n+\t\t\t\t\t}\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV4_FRAG:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6_FRAG:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_FRAG;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_FRAG;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_UDP:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_UDP;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_UDP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_TCP:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_TCP;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_TCP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_SCTP:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_SCTP;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_SCTP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ICMP:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_ICMP;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_ICMP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ICMPV6:\n+\t\t\t\t\tif (is_inner)\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_ICMP;\n+\t\t\t\t\telse\n+\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_ICMP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV2:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV2_CONTROL:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV3:\n+\t\t\t\t\tis_inner = true;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_L2TP;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NVGRE:\n+\t\t\t\t\tis_inner = true;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_NVGRE;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPC_TEID:\n+\t\t\t\t\tis_inner = true;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GTPC;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU_UL:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU_DL:\n+\t\t\t\t\tis_inner = true;\n+\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GTPU;\n+\t\t\t\t\tbreak;\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PAY:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6_EH:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PRE_MAC:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_POST_MAC:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ETHERTYPE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_SVLAN:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_CVLAN:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MPLS:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MMPLS:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_CTRL:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ECP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_EAPOL:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PPPOD:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IGMP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_AH:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ESP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IKE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NATT_KEEP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTP_EH:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPCV2:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ECPRI:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VRRP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_OSPF:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_TUN:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VXLAN_GPE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GENEVE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NSH:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_QUIC:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP_NODE:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP_SESSION:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_RTP:\n+\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NO_PROTO:\n+\t\t\t\tdefault:\n+\t\t\t\t\tcontinue;\n+\t\t\t\t}\n+\t\t\t\tadapter->ptype_tbl[ptype->ptype_id_10] = proto_hdr;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+free_ptype_info:\n+\trte_free(ptype_info);\n+\tclear_cmd(adapter);\n+\treturn ret;\n+}\n+\n int\n idpf_adapter_init(struct idpf_adapter *adapter)\n {\n@@ -135,6 +345,12 @@ idpf_adapter_init(struct idpf_adapter *adapter)\n \t\tgoto err_check_api;\n \t}\n \n+\tret = idpf_get_pkt_type(adapter);\n+\tif (ret != 0) {\n+\t\tDRV_LOG(ERR, \"Failed to set ptype table\");\n+\t\tgoto err_check_api;\n+\t}\n+\n \treturn 0;\n \n err_check_api:\ndiff --git a/drivers/common/idpf/idpf_common_device.h b/drivers/common/idpf/idpf_common_device.h\nindex d45c2b8777..997f01f3aa 100644\n--- a/drivers/common/idpf/idpf_common_device.h\n+++ b/drivers/common/idpf/idpf_common_device.h\n@@ -5,6 +5,7 @@\n #ifndef _IDPF_COMMON_DEVICE_H_\n #define _IDPF_COMMON_DEVICE_H_\n \n+#include <rte_mbuf_ptype.h>\n #include <base/idpf_prototype.h>\n #include <base/virtchnl2.h>\n #include <idpf_common_logs.h>\n@@ -19,6 +20,10 @@\n \n #define IDPF_DFLT_INTERVAL\t16\n \n+#define IDPF_GET_PTYPE_SIZE(p)\t\t\t\t\t\t\\\n+\t(sizeof(struct virtchnl2_ptype) +\t\t\t\t\\\n+\t (((p)->proto_id_count ? ((p)->proto_id_count - 1) : 0) * sizeof((p)->proto_id[0])))\n+\n struct idpf_adapter {\n \tstruct idpf_hw hw;\n \tstruct virtchnl2_version_info virtchnl_version;\n@@ -26,6 +31,8 @@ struct idpf_adapter {\n \tvolatile uint32_t pend_cmd; /* pending command not finished */\n \tuint32_t cmd_retval; /* return value of the cmd response from cp */\n \tuint8_t *mbx_resp; /* buffer to store the mailbox response from cp */\n+\n+\tuint32_t ptype_tbl[IDPF_MAX_PKT_TYPE] __rte_cache_min_aligned;\n };\n \n struct idpf_chunks_info {\ndiff --git a/drivers/common/idpf/idpf_common_virtchnl.h b/drivers/common/idpf/idpf_common_virtchnl.h\nindex 3c9f51e4cf..11dbc089cb 100644\n--- a/drivers/common/idpf/idpf_common_virtchnl.h\n+++ b/drivers/common/idpf/idpf_common_virtchnl.h\n@@ -26,6 +26,11 @@ __rte_internal\n int idpf_vc_config_irq_map_unmap(struct idpf_vport *vport,\n \t\t\t\t uint16_t nb_rxq, bool map);\n __rte_internal\n+int idpf_vc_query_ptype_info(struct idpf_adapter *adapter);\n+__rte_internal\n+int idpf_read_one_msg(struct idpf_adapter *adapter, uint32_t ops,\n+\t\t uint16_t buf_len, uint8_t *buf);\n+__rte_internal\n int idpf_switch_queue(struct idpf_vport *vport, uint16_t qid,\n \t\t bool rx, bool on);\n __rte_internal\n@@ -37,11 +42,6 @@ int idpf_vc_alloc_vectors(struct idpf_vport *vport, uint16_t num_vectors);\n __rte_internal\n int idpf_vc_dealloc_vectors(struct idpf_vport *vport);\n __rte_internal\n-int idpf_vc_query_ptype_info(struct idpf_adapter *adapter);\n-__rte_internal\n-int idpf_read_one_msg(struct idpf_adapter *adapter, uint32_t ops,\n-\t\t uint16_t buf_len, uint8_t *buf);\n-__rte_internal\n int idpf_execute_vc_cmd(struct idpf_adapter *adapter,\n \t\t\tstruct idpf_cmd_info *args);\n \ndiff --git a/drivers/common/idpf/meson.build b/drivers/common/idpf/meson.build\nindex d1578641ba..c6cc7a196b 100644\n--- a/drivers/common/idpf/meson.build\n+++ b/drivers/common/idpf/meson.build\n@@ -1,6 +1,8 @@\n # SPDX-License-Identifier: BSD-3-Clause\n # Copyright(c) 2022 Intel Corporation\n \n+deps += ['mbuf']\n+\n sources = files(\n 'idpf_common_device.c',\n 'idpf_common_virtchnl.c',\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex d0799087a5..84046f955a 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -602,12 +602,6 @@ idpf_adapter_ext_init(struct rte_pci_device *pci_dev, struct idpf_adapter_ext *a\n \t\tgoto err_adapter_init;\n \t}\n \n-\tret = idpf_get_pkt_type(adapter);\n-\tif (ret != 0) {\n-\t\tPMD_INIT_LOG(ERR, \"Failed to set ptype table\");\n-\t\tgoto err_get_ptype;\n-\t}\n-\n \tadapter->max_vport_nb = adapter->base.caps.max_vports;\n \n \tadapter->vports = rte_zmalloc(\"vports\",\ndiff --git a/drivers/net/idpf/idpf_ethdev.h b/drivers/net/idpf/idpf_ethdev.h\nindex 55be98a8ed..d30807ca41 100644\n--- a/drivers/net/idpf/idpf_ethdev.h\n+++ b/drivers/net/idpf/idpf_ethdev.h\n@@ -89,8 +89,6 @@ struct idpf_adapter_ext {\n \n \tuint16_t used_vecs_num;\n \n-\tuint32_t ptype_tbl[IDPF_MAX_PKT_TYPE] __rte_cache_min_aligned;\n-\n \tbool rx_vec_allowed;\n \tbool tx_vec_allowed;\n \tbool rx_use_avx512;\n@@ -107,6 +105,4 @@ TAILQ_HEAD(idpf_adapter_list, idpf_adapter_ext);\n #define IDPF_ADAPTER_TO_EXT(p)\t\t\t\t\t\\\n \tcontainer_of((p), struct idpf_adapter_ext, base)\n \n-int idpf_get_pkt_type(struct idpf_adapter_ext *adapter);\n-\n #endif /* _IDPF_ETHDEV_H_ */\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex 918d156e03..0c9c7fee29 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1407,7 +1407,7 @@ idpf_splitq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \trx_id_bufq1 = rxq->bufq1->rx_next_avail;\n \trx_id_bufq2 = rxq->bufq2->rx_next_avail;\n \trx_desc_ring = rxq->rx_ring;\n-\tptype_tbl = ad->ptype_tbl;\n+\tptype_tbl = rxq->adapter->ptype_tbl;\n \n \tif ((rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) != 0)\n \t\trxq->hw_register_set = 1;\n@@ -1812,7 +1812,7 @@ idpf_singleq_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n \n \trx_id = rxq->rx_tail;\n \trx_ring = rxq->rx_ring;\n-\tptype_tbl = ad->ptype_tbl;\n+\tptype_tbl = rxq->adapter->ptype_tbl;\n \n \tif ((rxq->offloads & RTE_ETH_RX_OFFLOAD_TIMESTAMP) != 0)\n \t\trxq->hw_register_set = 1;\ndiff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h\nindex 9417651b3f..cac6040943 100644\n--- a/drivers/net/idpf/idpf_rxtx.h\n+++ b/drivers/net/idpf/idpf_rxtx.h\n@@ -82,10 +82,6 @@\n #define IDPF_TX_OFFLOAD_NOTSUP_MASK \\\n \t\t(RTE_MBUF_F_TX_OFFLOAD_MASK ^ IDPF_TX_OFFLOAD_MASK)\n \n-#define IDPF_GET_PTYPE_SIZE(p) \\\n-\t(sizeof(struct virtchnl2_ptype) + \\\n-\t(((p)->proto_id_count ? ((p)->proto_id_count - 1) : 0) * sizeof((p)->proto_id[0])))\n-\n extern uint64_t idpf_timestamp_dynflag;\n \n struct idpf_rx_queue {\ndiff --git a/drivers/net/idpf/idpf_rxtx_vec_avx512.c b/drivers/net/idpf/idpf_rxtx_vec_avx512.c\nindex efa7cd2187..fb2b6bb53c 100644\n--- a/drivers/net/idpf/idpf_rxtx_vec_avx512.c\n+++ b/drivers/net/idpf/idpf_rxtx_vec_avx512.c\n@@ -245,8 +245,7 @@ _idpf_singleq_recv_raw_pkts_avx512(struct idpf_rx_queue *rxq,\n \t\t\t\t struct rte_mbuf **rx_pkts,\n \t\t\t\t uint16_t nb_pkts)\n {\n-\tstruct idpf_adapter_ext *adapter = IDPF_ADAPTER_TO_EXT(rxq->adapter);\n-\tconst uint32_t *type_table = adapter->ptype_tbl;\n+\tconst uint32_t *type_table = rxq->adapter->ptype_tbl;\n \n \tconst __m256i mbuf_init = _mm256_set_epi64x(0, 0, 0,\n \t\t\t\t\t\t rxq->mbuf_initializer);\ndiff --git a/drivers/net/idpf/idpf_vchnl.c b/drivers/net/idpf/idpf_vchnl.c\nindex 576b797973..45d05ed108 100644\n--- a/drivers/net/idpf/idpf_vchnl.c\n+++ b/drivers/net/idpf/idpf_vchnl.c\n@@ -23,219 +23,6 @@\n #include \"idpf_ethdev.h\"\n #include \"idpf_rxtx.h\"\n \n-int __rte_cold\n-idpf_get_pkt_type(struct idpf_adapter_ext *adapter)\n-{\n-\tstruct virtchnl2_get_ptype_info *ptype_info;\n-\tstruct idpf_adapter *base;\n-\tuint16_t ptype_offset, i, j;\n-\tuint16_t ptype_recvd = 0;\n-\tint ret;\n-\n-\tbase = &adapter->base;\n-\n-\tret = idpf_vc_query_ptype_info(base);\n-\tif (ret != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"Fail to query packet type information\");\n-\t\treturn ret;\n-\t}\n-\n-\tptype_info = rte_zmalloc(\"ptype_info\", IDPF_DFLT_MBX_BUF_SIZE, 0);\n-\t\tif (ptype_info == NULL)\n-\t\t\treturn -ENOMEM;\n-\n-\twhile (ptype_recvd < IDPF_MAX_PKT_TYPE) {\n-\t\tret = idpf_read_one_msg(base, VIRTCHNL2_OP_GET_PTYPE_INFO,\n-\t\t\t\t\tIDPF_DFLT_MBX_BUF_SIZE, (uint8_t *)ptype_info);\n-\t\tif (ret != 0) {\n-\t\t\tPMD_DRV_LOG(ERR, \"Fail to get packet type information\");\n-\t\t\tgoto free_ptype_info;\n-\t\t}\n-\n-\t\tptype_recvd += ptype_info->num_ptypes;\n-\t\tptype_offset = sizeof(struct virtchnl2_get_ptype_info) -\n-\t\t\t\t\t\tsizeof(struct virtchnl2_ptype);\n-\n-\t\tfor (i = 0; i < rte_cpu_to_le_16(ptype_info->num_ptypes); i++) {\n-\t\t\tbool is_inner = false, is_ip = false;\n-\t\t\tstruct virtchnl2_ptype *ptype;\n-\t\t\tuint32_t proto_hdr = 0;\n-\n-\t\t\tptype = (struct virtchnl2_ptype *)\n-\t\t\t\t\t((uint8_t *)ptype_info + ptype_offset);\n-\t\t\tptype_offset += IDPF_GET_PTYPE_SIZE(ptype);\n-\t\t\tif (ptype_offset > IDPF_DFLT_MBX_BUF_SIZE) {\n-\t\t\t\tret = -EINVAL;\n-\t\t\t\tgoto free_ptype_info;\n-\t\t\t}\n-\n-\t\t\tif (rte_cpu_to_le_16(ptype->ptype_id_10) == 0xFFFF)\n-\t\t\t\tgoto free_ptype_info;\n-\n-\t\t\tfor (j = 0; j < ptype->proto_id_count; j++) {\n-\t\t\t\tswitch (rte_cpu_to_le_16(ptype->proto_id[j])) {\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GRE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VXLAN:\n-\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L4_MASK;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GRENAT;\n-\t\t\t\t\tis_inner = true;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MAC:\n-\t\t\t\t\tif (is_inner) {\n-\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_INNER_L2_MASK;\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L2_ETHER;\n-\t\t\t\t\t} else {\n-\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER;\n-\t\t\t\t\t}\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VLAN:\n-\t\t\t\t\tif (is_inner) {\n-\t\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_INNER_L2_MASK;\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L2_ETHER_VLAN;\n-\t\t\t\t\t}\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PTP:\n-\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_TIMESYNC;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_LLDP:\n-\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_LLDP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ARP:\n-\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_ARP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PPPOE:\n-\t\t\t\t\tproto_hdr &= ~RTE_PTYPE_L2_MASK;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_L2_ETHER_PPPOE;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV4:\n-\t\t\t\t\tif (!is_ip) {\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L3_IPV4_EXT_UNKNOWN;\n-\t\t\t\t\t\tis_ip = true;\n-\t\t\t\t\t} else {\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |\n-\t\t\t\t\t\t\t RTE_PTYPE_TUNNEL_IP;\n-\t\t\t\t\t\tis_inner = true;\n-\t\t\t\t\t}\n-\t\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6:\n-\t\t\t\t\tif (!is_ip) {\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L3_IPV6_EXT_UNKNOWN;\n-\t\t\t\t\t\tis_ip = true;\n-\t\t\t\t\t} else {\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |\n-\t\t\t\t\t\t\t RTE_PTYPE_TUNNEL_IP;\n-\t\t\t\t\t\tis_inner = true;\n-\t\t\t\t\t}\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV4_FRAG:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6_FRAG:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_FRAG;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_FRAG;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_UDP:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_UDP;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_UDP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_TCP:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_TCP;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_TCP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_SCTP:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_SCTP;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_SCTP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ICMP:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_ICMP;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_ICMP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ICMPV6:\n-\t\t\t\t\tif (is_inner)\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_INNER_L4_ICMP;\n-\t\t\t\t\telse\n-\t\t\t\t\t\tproto_hdr |= RTE_PTYPE_L4_ICMP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV2:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV2_CONTROL:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_L2TPV3:\n-\t\t\t\t\tis_inner = true;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_L2TP;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NVGRE:\n-\t\t\t\t\tis_inner = true;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_NVGRE;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPC_TEID:\n-\t\t\t\t\tis_inner = true;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GTPC;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU_UL:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPU_DL:\n-\t\t\t\t\tis_inner = true;\n-\t\t\t\t\tproto_hdr |= RTE_PTYPE_TUNNEL_GTPU;\n-\t\t\t\t\tbreak;\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PAY:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IPV6_EH:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PRE_MAC:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_POST_MAC:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ETHERTYPE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_SVLAN:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_CVLAN:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MPLS:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_MMPLS:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_CTRL:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ECP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_EAPOL:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PPPOD:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IGMP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_AH:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ESP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_IKE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NATT_KEEP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTP_EH:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GTPCV2:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_ECPRI:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VRRP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_OSPF:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_TUN:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_VXLAN_GPE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_GENEVE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NSH:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_QUIC:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP_NODE:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_PFCP_SESSION:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_RTP:\n-\t\t\t\tcase VIRTCHNL2_PROTO_HDR_NO_PROTO:\n-\t\t\t\tdefault:\n-\t\t\t\t\tcontinue;\n-\t\t\t\t}\n-\t\t\t\tadapter->ptype_tbl[ptype->ptype_id_10] = proto_hdr;\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-free_ptype_info:\n-\trte_free(ptype_info);\n-\tclear_cmd(base);\n-\treturn ret;\n-}\n-\n #define IDPF_RX_BUF_STRIDE\t\t64\n int\n idpf_vc_config_rxq(struct idpf_vport *vport, struct idpf_rx_queue *rxq)\n", "prefixes": [ "v3", "08/15" ] }