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GET /api/patches/1221/?format=api
{ "id": 1221, "url": "http://patches.dpdk.org/api/patches/1221/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1415420776-4821-4-git-send-email-changchun.ouyang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1415420776-4821-4-git-send-email-changchun.ouyang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1415420776-4821-4-git-send-email-changchun.ouyang@intel.com", "date": "2014-11-08T04:26:14", "name": "[dpdk-dev,v4,3/5] ixgbe: Configure Rx mode for VMDQ", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "156edb3c69102554b7b386c2b3ebf86ad4c49b98", "submitter": { "id": 31, "url": "http://patches.dpdk.org/api/people/31/?format=api", "name": "Ouyang Changchun", "email": "changchun.ouyang@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1415420776-4821-4-git-send-email-changchun.ouyang@intel.com/mbox/", "series": [], "comments": "http://patches.dpdk.org/api/patches/1221/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/1221/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id F1B7C7F3D;\n\tSat, 8 Nov 2014 05:17:07 +0100 (CET)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n\tby dpdk.org (Postfix) with ESMTP id 10DFD7F3D\n\tfor <dev@dpdk.org>; Sat, 8 Nov 2014 05:16:56 +0100 (CET)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby fmsmga101.fm.intel.com with ESMTP; 07 Nov 2014 20:26:30 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby FMSMGA003.fm.intel.com with ESMTP; 07 Nov 2014 20:17:49 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id sA84QSx7020937;\n\tSat, 8 Nov 2014 12:26:28 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid sA84QPX5004875; Sat, 8 Nov 2014 12:26:27 +0800", "(from couyang@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sA84QPjY004871; \n\tSat, 8 Nov 2014 12:26:25 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"4.97,862,1389772800\"; d=\"scan'208\";a=\"413379727\"", "From": "Ouyang Changchun <changchun.ouyang@intel.com>", "To": "dev@dpdk.org", "Date": "Sat, 8 Nov 2014 12:26:14 +0800", "Message-Id": "<1415420776-4821-4-git-send-email-changchun.ouyang@intel.com>", "X-Mailer": "git-send-email 1.7.12.2", "In-Reply-To": "<1415420776-4821-1-git-send-email-changchun.ouyang@intel.com>", "References": "<1414732757-7241-1-git-send-email-changchun.ouyang@intel.com>\n\t<1415420776-4821-1-git-send-email-changchun.ouyang@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 3/5] ixgbe: Configure Rx mode for VMDQ", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Config PFVML2FLT register in ixgbe PMD to enable it receive broadcast and multicast packets;\nalso factorize the common logic with ixgbe_set_pool_rx_mode.\n\nSigned-off-by: Changchun Ouyang <changchun.ouyang@intel.com>\n---\n lib/librte_pmd_ixgbe/ixgbe_ethdev.c | 31 +++++++++++++++++++++----------\n lib/librte_pmd_ixgbe/ixgbe_ethdev.h | 1 +\n lib/librte_pmd_ixgbe/ixgbe_rxtx.c | 6 ++++++\n 3 files changed, 28 insertions(+), 10 deletions(-)", "diff": "diff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\nindex 9c73a30..fb7ed3d 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.c\n@@ -3123,6 +3123,26 @@ ixgbe_uc_all_hash_table_set(struct rte_eth_dev *dev, uint8_t on)\n \treturn 0;\n \n }\n+\n+uint32_t\n+ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val)\n+{\n+\tuint32_t new_val = orig_val;\n+\n+\tif (rx_mask & ETH_VMDQ_ACCEPT_UNTAG)\n+\t\tnew_val |= IXGBE_VMOLR_AUPE;\n+\tif (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC)\n+\t\tnew_val |= IXGBE_VMOLR_ROMPE;\n+\tif (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC)\n+\t\tnew_val |= IXGBE_VMOLR_ROPE;\n+\tif (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST)\n+\t\tnew_val |= IXGBE_VMOLR_BAM;\n+\tif (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST)\n+\t\tnew_val |= IXGBE_VMOLR_MPE;\n+\n+\treturn new_val;\n+}\n+\n static int\n ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t pool,\n \t\t\t uint16_t rx_mask, uint8_t on)\n@@ -3141,16 +3161,7 @@ ixgbe_set_pool_rx_mode(struct rte_eth_dev *dev, uint16_t pool,\n \tif (ixgbe_vmdq_mode_check(hw) < 0)\n \t\treturn (-ENOTSUP);\n \n-\tif (rx_mask & ETH_VMDQ_ACCEPT_UNTAG )\n-\t\tval |= IXGBE_VMOLR_AUPE;\n-\tif (rx_mask & ETH_VMDQ_ACCEPT_HASH_MC )\n-\t\tval |= IXGBE_VMOLR_ROMPE;\n-\tif (rx_mask & ETH_VMDQ_ACCEPT_HASH_UC)\n-\t\tval |= IXGBE_VMOLR_ROPE;\n-\tif (rx_mask & ETH_VMDQ_ACCEPT_BROADCAST)\n-\t\tval |= IXGBE_VMOLR_BAM;\n-\tif (rx_mask & ETH_VMDQ_ACCEPT_MULTICAST)\n-\t\tval |= IXGBE_VMOLR_MPE;\n+\tval = ixgbe_convert_vm_rx_mask_to_val(rx_mask, val);\n \n \tif (on)\n \t\tvmolr |= val;\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\nindex a5159e5..ca99170 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\n+++ b/lib/librte_pmd_ixgbe/ixgbe_ethdev.h\n@@ -340,4 +340,5 @@ void ixgbe_pf_mbx_process(struct rte_eth_dev *eth_dev);\n \n int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev);\n \n+uint32_t ixgbe_convert_vm_rx_mask_to_val(uint16_t rx_mask, uint32_t orig_val);\n #endif /* _IXGBE_ETHDEV_H_ */\ndiff --git a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\nindex 3a5a8ff..f9b3fe3 100644\n--- a/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n+++ b/lib/librte_pmd_ixgbe/ixgbe_rxtx.c\n@@ -3123,6 +3123,7 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw;\n \tenum rte_eth_nb_pools num_pools;\n \tuint32_t mrqc, vt_ctl, vlanctrl;\n+\tuint32_t vmolr = 0;\n \tint i;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -3145,6 +3146,11 @@ ixgbe_vmdq_rx_hw_configure(struct rte_eth_dev *dev)\n \n \tIXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl);\n \n+\tfor (i = 0; i < (int)num_pools; i++) {\n+\t\tvmolr = ixgbe_convert_vm_rx_mask_to_val(cfg->rx_mode, vmolr);\n+\t\tIXGBE_WRITE_REG(hw, IXGBE_VMOLR(i), vmolr);\n+\t}\n+\n \t/* VLNCTRL: enable vlan filtering and allow all vlan tags through */\n \tvlanctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);\n \tvlanctrl |= IXGBE_VLNCTRL_VFE ; /* enable vlan filters */\n", "prefixes": [ "dpdk-dev", "v4", "3/5" ] }