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GET /api/patches/121200/?format=api
{ "id": 121200, "url": "http://patches.dpdk.org/api/patches/121200/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221221101001.21255-1-valex@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221221101001.21255-1-valex@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221221101001.21255-1-valex@nvidia.com", "date": "2022-12-21T10:10:01", "name": "[v2] net/mlx5: add debug support for dumping all rte ports", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "992139b632165c877ef5ec99238c24f7b20af983", "submitter": { "id": 2858, "url": "http://patches.dpdk.org/api/people/2858/?format=api", "name": "Alex Vesker", "email": "valex@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221221101001.21255-1-valex@nvidia.com/mbox/", "series": [ { "id": 26217, "url": "http://patches.dpdk.org/api/series/26217/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26217", "date": "2022-12-21T10:10:01", "name": "[v2] net/mlx5: add debug support for dumping all rte ports", "version": 2, "mbox": "http://patches.dpdk.org/series/26217/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/121200/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/121200/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A0B9DA034C;\n\tWed, 21 Dec 2022 11:11:06 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3ECF640A7A;\n\tWed, 21 Dec 2022 11:11:06 +0100 (CET)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2082.outbound.protection.outlook.com [40.107.244.82])\n by mails.dpdk.org (Postfix) with ESMTP id 7949640698\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Alex Vesker <valex@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<viacheslavo@nvidia.com>, <matan@nvidia.com>, <rasland@nvidia.com>", "Subject": "[PATCH v2] net/mlx5: add debug support for dumping all rte ports", "Date": "Wed, 21 Dec 2022 12:10:01 +0200", "Message-ID": "<20221221101001.21255-1-valex@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20221213092849.7889-1-valex@nvidia.com>", "References": "<20221213092849.7889-1-valex@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.37]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM11FT061:EE_|DM4PR12MB5229:EE_", "X-MS-Office365-Filtering-Correlation-Id": "90d1edcd-879b-4b4f-a51c-08dae33ba93e", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n iIWFWqqvP/PXlHtaA66013I8/EGPvt3DJ1PWgGDtP1oVXoPHoYUV/XZub2z0y+hwqe/Xz+jMIeHFg0vmuLmJwWALm6XveLwWKR6mNNQngbOOXDtuCsjpdj/owIumRpWpHB362ezks02VTaX7JEuPwSPharf0mysnHYeJ/r8fybnjyUdMM6m2QxXSVkfEhIE97Cv3aYAAbqr6e3Tz/EoH9ro7lE7Js395LWXeFvAhMdSdiTnJFzrH0/zBREHLZvmN+ZWLxEdsY62DB6ozE+yUP0LMZLhKmojz4LS93b4I0V/HogDMFI37UJQ4Ae2YEnWIv4XRZFPR4EMskqumDud2cVULeTLL29nPGrYZx+mmSfJI7LgSZuDmhM5B/IHNf/FkiGFrGku57UXo8OCjYZ20vE1NyCppyXk9yQtjNgrxZDCb08gnfJRKs92UBNzayFpKlhcKXNsrjPTOQQ9BiVA5BCKdzhJrtHDsJoIz+IhaEROTfjZhZ++g6jh/TrISyda/VnJpMVQpMWw/T4+gMVdNlqEJoKfnO4BtY4d5gxNCmnJnLjGCGf6pNC3Lx91zcCaUxPb3QLnWPsFbCj7ZAIg8Bw+hmVG3/sJ0qnAinxvVLdV/L7YFKvRD2eQkhYxe3cxr9Dbgt0j3aa+hvV7hBrDfRlv44d/StzuWj+2k9Ws2qbSmgdUsemxeA6Xvxy/4/XbzV0uiKzzMGYQeAnGULJFu1A==", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(376002)(396003)(39860400002)(136003)(346002)(451199015)(40470700004)(46966006)(36840700001)(70586007)(4326008)(40460700003)(8676002)(70206006)(316002)(5660300002)(36756003)(86362001)(8936002)(41300700001)(7696005)(2616005)(186003)(6666004)(82310400005)(107886003)(16526019)(6286002)(1076003)(26005)(47076005)(426003)(83380400001)(36860700001)(336012)(356005)(55016003)(54906003)(7636003)(478600001)(82740400003)(6916009)(40480700001)(2906002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "21 Dec 2022 10:11:00.6189 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 90d1edcd-879b-4b4f-a51c-08dae33ba93e", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT061.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB5229", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add a special value max_uint16 to request dump of all\nrte ethernet ports. This is useful for collecting the\nfull info from all the ports in a single dump.\n\nSigned-off-by: Alex Vesker <valex@nvidia.com>\nReviewed-by: Ori Kam <orika@nvidia.com>\n---\n drivers/net/mlx5/linux/mlx5_socket.c | 39 ++++++++++++++++++----------\n 1 file changed, 26 insertions(+), 13 deletions(-)\n\nv2: Fix iteration function to use only mlx5 devices", "diff": "diff --git a/drivers/net/mlx5/linux/mlx5_socket.c b/drivers/net/mlx5/linux/mlx5_socket.c\nindex 0e01aff0e7..6ce0e59643 100644\n--- a/drivers/net/mlx5/linux/mlx5_socket.c\n+++ b/drivers/net/mlx5/linux/mlx5_socket.c\n@@ -21,6 +21,7 @@\n /* PMD socket service for tools. */\n \n #define MLX5_SOCKET_PATH \"/var/tmp/dpdk_net_mlx5_%d\"\n+#define MLX5_ALL_PORT_IDS 0xffff\n \n int server_socket = -1; /* Unix socket for primary process. */\n struct rte_intr_handle *server_intr_handle; /* Interrupt handler. */\n@@ -35,7 +36,7 @@ mlx5_pmd_socket_handle(void *cb __rte_unused)\n \tint ret;\n \tstruct cmsghdr *cmsg = NULL;\n \tuint32_t data[MLX5_SENDMSG_MAX / sizeof(uint32_t)];\n-\tuint64_t flow_ptr = 0;\n+\tstruct rte_flow *flow_ptr = NULL;\n \tuint8_t buf[CMSG_SPACE(sizeof(int))] = { 0 };\n \tstruct iovec io = {\n \t\t.iov_base = data,\n@@ -92,25 +93,37 @@ mlx5_pmd_socket_handle(void *cb __rte_unused)\n \tdump_req = (struct mlx5_flow_dump_req *)msg.msg_iov->iov_base;\n \tif (dump_req) {\n \t\tport_id = dump_req->port_id;\n-\t\tflow_ptr = dump_req->flow_id;\n+\t\tflow_ptr = (struct rte_flow *)((uintptr_t)dump_req->flow_id);\n \t} else {\n \t\tDRV_LOG(WARNING, \"Invalid message\");\n \t\tgoto error;\n \t}\n \n-\tif (!rte_eth_dev_is_valid_port(port_id)) {\n-\t\tDRV_LOG(WARNING, \"Invalid port %u\", port_id);\n-\t\tgoto error;\n+\tif (port_id == MLX5_ALL_PORT_IDS) {\n+\t\t/* Dump all port ids */\n+\t\tif (flow_ptr) {\n+\t\t\tDRV_LOG(WARNING, \"Flow ptr unsupported with given port id\");\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tMLX5_ETH_FOREACH_DEV(port_id, NULL) {\n+\t\t\tdev = &rte_eth_devices[port_id];\n+\t\t\tret = mlx5_flow_dev_dump(dev, NULL, file, &err);\n+\t\t\tif (ret)\n+\t\t\t\tbreak;\n+\t\t}\n+\t} else {\n+\t\t/* Dump single port id */\n+\t\tif (!rte_eth_dev_is_valid_port(port_id)) {\n+\t\t\tDRV_LOG(WARNING, \"Invalid port %u\", port_id);\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\t/* Dump flow */\n+\t\tdev = &rte_eth_devices[port_id];\n+\t\tret = mlx5_flow_dev_dump(dev, flow_ptr, file, &err);\n \t}\n \n-\t/* Dump flow. */\n-\tdev = &rte_eth_devices[port_id];\n-\tif (flow_ptr == 0)\n-\t\tret = mlx5_flow_dev_dump(dev, NULL, file, NULL);\n-\telse\n-\t\tret = mlx5_flow_dev_dump(dev,\n-\t\t\t(struct rte_flow *)((uintptr_t)flow_ptr), file, &err);\n-\n \t/* Set-up the ancillary data and reply. */\n \tmsg.msg_controllen = 0;\n \tmsg.msg_control = NULL;\n", "prefixes": [ "v2" ] }