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GET /api/patches/121126/?format=api
{ "id": 121126, "url": "http://patches.dpdk.org/api/patches/121126/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221220192645.14042-28-syalavarthi@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221220192645.14042-28-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221220192645.14042-28-syalavarthi@marvell.com", "date": "2022-12-20T19:26:34", "name": "[v3,27/38] ml/cnxk: dequeue a burst of inference requests", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "239e1a52ef369c2ea8f46d6822ecc83c13d934ad", "submitter": { "id": 2480, "url": "http://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221220192645.14042-28-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26199, "url": "http://patches.dpdk.org/api/series/26199/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26199", "date": "2022-12-20T19:26:07", "name": "Implementation of ML CNXK driver", "version": 3, "mbox": "http://patches.dpdk.org/series/26199/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/121126/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/121126/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C77DDA0545;\n\tTue, 20 Dec 2022 20:29:45 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F329F42D9B;\n\tTue, 20 Dec 2022 20:27:20 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id A04C342D35\n for <dev@dpdk.org>; Tue, 20 Dec 2022 20:27:01 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2BKHPQ0w015491 for <dev@dpdk.org>; Tue, 20 Dec 2022 11:27:00 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3mkapj2tq2-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 20 Dec 2022 11:27:00 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Tue, 20 Dec 2022 11:26:59 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Tue, 20 Dec 2022 11:26:59 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id CD88D3F7051;\n Tue, 20 Dec 2022 11:26:58 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=4S7y8JT9Yj53rGSDDjkHco0CxPJJOsA/pPCMLIE+n+k=;\n b=XQP9kxZtxUOXGVPHDZs2dYYgoOwQKm0dDk6jSeDyYH6WMnw2CIp/Pii+9B3iu1FMiOUX\n 2UIyFOJbXtCcPVd/y9IjTDWSL+vnJUH0QbtOXk+3N6H3XDJnBpw2PNOlHyihoR1V0f5n\n dNAtRR+HWaK7TAq0q04m9ojb90Mjajrw4RfWQ91Av/JwEj1mzL1fPMe+Rb78eijUXmz6\n bxduBisM3rySrxlqPFoMvuJEA+C8gf4r2swOb1AdOizVZUKlH/65Lua3Ux1OBOW/3cVk\n geLAaSj9FH5le7rgAwPeJb8qVIK+3EckqUrUpwATiLnlr8nWL8fV93tPYLmS2Q4DhXnZ 9Q==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v3 27/38] ml/cnxk: dequeue a burst of inference requests", "Date": "Tue, 20 Dec 2022 11:26:34 -0800", "Message-ID": "<20221220192645.14042-28-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20221220192645.14042-1-syalavarthi@marvell.com>", "References": "<20221208201806.21893-1-syalavarthi@marvell.com>\n <20221220192645.14042-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "W6_coScrv7E_nIx8wcnRMMzlTq8V8HSt", "X-Proofpoint-GUID": "W6_coScrv7E_nIx8wcnRMMzlTq8V8HSt", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-20_06,2022-12-20_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enabled driver support to dequeue inference requests from\ninternal queue. Dequeue checks for request completion by\npolling the status field of the job request.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 61 ++++++++++++++++++++++++++++++++++\n drivers/ml/cnxk/cn10k_ml_ops.h | 2 ++\n 2 files changed, 63 insertions(+)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex e6bfc6635e..8de2b3e49c 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -473,6 +473,7 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \trte_spinlock_init(&ocm->lock);\n \n \tdev->enqueue_burst = cn10k_ml_enqueue_burst;\n+\tdev->dequeue_burst = cn10k_ml_dequeue_burst;\n \n \tmldev->nb_models_loaded = 0;\n \tmldev->state = ML_CN10K_DEV_STATE_CONFIGURED;\n@@ -1417,6 +1418,23 @@ queue_free_count(uint64_t head, uint64_t tail, uint64_t nb_desc)\n \treturn nb_desc - queue_pending_count(head, tail, nb_desc) - 1;\n }\n \n+static __rte_always_inline void\n+cn10k_ml_result_update(struct rte_ml_dev *dev, int qp_id, struct cn10k_ml_result *result,\n+\t\t struct rte_ml_op *op)\n+{\n+\tPLT_SET_USED(dev);\n+\tPLT_SET_USED(qp_id);\n+\n+\top->impl_opaque = result->error_code;\n+\n+\tif (likely(result->error_code == 0))\n+\t\top->status = RTE_ML_OP_STATUS_SUCCESS;\n+\telse\n+\t\top->status = RTE_ML_OP_STATUS_ERROR;\n+\n+\top->user_ptr = result->user_ptr;\n+}\n+\n __rte_hot uint16_t\n cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op **ops,\n \t\t uint16_t nb_ops)\n@@ -1471,6 +1489,49 @@ cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op\n \treturn count;\n }\n \n+__rte_hot uint16_t\n+cn10k_ml_dequeue_burst(struct rte_ml_dev *dev, uint16_t qp_id, struct rte_ml_op **ops,\n+\t\t uint16_t nb_ops)\n+{\n+\tstruct cn10k_ml_queue *queue;\n+\tstruct cn10k_ml_req *req;\n+\tstruct cn10k_ml_qp *qp;\n+\n+\tuint64_t status;\n+\tuint16_t count;\n+\tuint64_t tail;\n+\n+\tqp = dev->data->queue_pairs[qp_id];\n+\tqueue = &qp->queue;\n+\n+\ttail = queue->tail;\n+\tnb_ops = PLT_MIN(nb_ops, queue_pending_count(queue->head, tail, qp->nb_desc));\n+\tcount = 0;\n+\n+\tif (unlikely(nb_ops == 0))\n+\t\tgoto empty_or_active;\n+\n+dequeue_req:\n+\treq = &queue->reqs[tail];\n+\tstatus = plt_read64(&req->status);\n+\tif (unlikely(status != ML_CN10K_POLL_JOB_FINISH))\n+\t\tgoto empty_or_active;\n+\n+\tcn10k_ml_result_update(dev, qp_id, &req->result, req->op);\n+\tops[count] = req->op;\n+\n+\tqueue_index_advance(&tail, qp->nb_desc);\n+\tcount++;\n+\n+\tif (count < nb_ops)\n+\t\tgoto dequeue_req;\n+\n+empty_or_active:\n+\tqueue->tail = tail;\n+\n+\treturn count;\n+}\n+\n struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* Device control ops */\n \t.dev_info_get = cn10k_ml_dev_info_get,\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex d35f91a302..3178295bba 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -73,5 +73,7 @@ int cn10k_ml_model_stop(struct rte_ml_dev *dev, int16_t model_id);\n /* Fast-path ops */\n __rte_hot uint16_t cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id,\n \t\t\t\t\t struct rte_ml_op **ops, uint16_t nb_ops);\n+__rte_hot uint16_t cn10k_ml_dequeue_burst(struct rte_ml_dev *dev, uint16_t qp_id,\n+\t\t\t\t\t struct rte_ml_op **ops, uint16_t nb_ops);\n \n #endif /* _CN10K_ML_OPS_H_ */\n", "prefixes": [ "v3", "27/38" ] }