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GET /api/patches/121081/?format=api
{ "id": 121081, "url": "http://patches.dpdk.org/api/patches/121081/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221220143232.2519650-8-ktejasree@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221220143232.2519650-8-ktejasree@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221220143232.2519650-8-ktejasree@marvell.com", "date": "2022-12-20T14:32:22", "name": "[07/17] crypto/cnxk: update crypto completion code handling", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "52906db4f4d4ecf2c1f5b10c05ebfcc6a76f86d5", "submitter": { "id": 1789, "url": "http://patches.dpdk.org/api/people/1789/?format=api", "name": "Tejasree Kondoj", "email": "ktejasree@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221220143232.2519650-8-ktejasree@marvell.com/mbox/", "series": [ { "id": 26195, "url": "http://patches.dpdk.org/api/series/26195/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26195", "date": "2022-12-20T14:32:15", "name": "fixes and improvements to cnxk crytpo PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/26195/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/121081/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/121081/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1A237A0545;\n\tTue, 20 Dec 2022 15:33:33 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E415B42D30;\n\tTue, 20 Dec 2022 15:32:59 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 81FBC42D2D\n for <dev@dpdk.org>; Tue, 20 Dec 2022 15:32:58 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2BKEOarI019236 for <dev@dpdk.org>; Tue, 20 Dec 2022 06:32:57 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3mhe5rnb5d-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 20 Dec 2022 06:32:57 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Tue, 20 Dec 2022 06:32:55 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Tue, 20 Dec 2022 06:32:55 -0800", "from hyd1554.marvell.com (unknown [10.29.57.11])\n by maili.marvell.com (Postfix) with ESMTP id 4E5673F704C;\n Tue, 20 Dec 2022 06:32:53 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=QEn4ZTqw6JAdR+A+xwSWr4+hwylB81f9KooHcrxL6FA=;\n b=HXAB76zeK35BbLEfs4XQBiCFLwhLDgnxHqlafVHPiJIqm8WsRGo4zuzhCVHMR8MhqCPk\n Rkned7eryVVLFBpxn0vRMFO2sPApfotZknjmSgGz2S7cwA5c2vgwFnk4EMVhLcWn4mMR\n PtvjavQ0VlvgBdWWpSEFxJPquF5BpDVigDI/qTly5XAtQyrlBtIZkdWrrWo71lTQBSb0\n /YOxJaKI2R46McJMeSLUnPO2u67wJeTGzJAy0ItufhzJBr4/O5FGSF0K/ZEsMcsiU2RL\n LayPRqIwbUINrqrFeE5TJ7GlHF9bOb2v51p+IJUz9a5TIYw1p1zYFKmz0LIsHdzriy71 Iw==", "From": "Tejasree Kondoj <ktejasree@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>", "CC": "Vidya Sagar Velumuri <vvelumuri@marvell.com>, Anoob Joseph\n <anoobj@marvell.com>,\n Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>,\n Volodymyr Fialko <vfialko@marvell.com>, Aakash Sasidharan\n <asasidharan@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 07/17] crypto/cnxk: update crypto completion code handling", "Date": "Tue, 20 Dec 2022 20:02:22 +0530", "Message-ID": "<20221220143232.2519650-8-ktejasree@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221220143232.2519650-1-ktejasree@marvell.com>", "References": "<20221220143232.2519650-1-ktejasree@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "Qebon3xLLMmJh_8Wqz4gRgI2zihkDTXC", "X-Proofpoint-ORIG-GUID": "Qebon3xLLMmJh_8Wqz4gRgI2zihkDTXC", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-12-20_05,2022-12-20_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nUpdate crypto and IPsec completion handling as per microcode version\nOCPT-04-IE-IPSEC-MC-30-01-28-00\n\nci: skip_checkformat\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 18 +++++++++---------\n drivers/crypto/cnxk/cn10k_ipsec.c | 7 +++++--\n drivers/crypto/cnxk/cn10k_ipsec.h | 1 +\n drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 1 +\n 4 files changed, 16 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 1caa321112..5a098ffcf2 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -801,13 +801,11 @@ cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *re\n \tstruct rte_mbuf *mbuf = cop->sym->m_src;\n \tconst uint16_t m_len = res->rlen;\n \n-\tmbuf->data_len = m_len;\n-\tmbuf->pkt_len = m_len;\n-\n \tswitch (res->uc_compcode) {\n \tcase ROC_IE_OT_UCC_SUCCESS:\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM:\n+\t\tmbuf->ol_flags &= ~RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM:\n@@ -819,15 +817,17 @@ cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *re\n \t\t\t\t RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM:\n-\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST:\n+\tcase ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_AGAIN:\n \t\tcop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;\n \t\tbreak;\n \tdefault:\n-\t\tplt_dp_err(\"Success with unknown microcode completion code\");\n-\t\tbreak;\n+\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n+\t\treturn;\n \t}\n+\tmbuf->data_len = m_len;\n+\tmbuf->pkt_len = m_len;\n }\n \n static inline void\n@@ -843,7 +843,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \n \tif (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC &&\n \t cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\tif (likely(compcode == CPT_COMP_WARN)) {\n+\t\tif (likely(compcode == CPT_COMP_GOOD || compcode == CPT_COMP_WARN)) {\n \t\t\t/* Success with additional info */\n \t\t\tcn10k_cpt_sec_post_process(cop, res);\n \t\t} else {\n@@ -860,7 +860,7 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t\treturn;\n \t}\n \n-\tif (likely(compcode == CPT_COMP_GOOD || compcode == CPT_COMP_WARN)) {\n+\tif (likely(compcode == CPT_COMP_GOOD)) {\n \t\tif (unlikely(uc_compcode)) {\n \t\t\tif (uc_compcode == ROC_SE_ERR_GC_ICV_MISCOMPARE)\n \t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_AUTH_FAILED;\n@@ -964,7 +964,7 @@ cn10k_cpt_crypto_adapter_vector_dequeue(uintptr_t get_work1)\n \n #ifdef CNXK_CRYPTODEV_DEBUG\n \tres.u64[0] = __atomic_load_n(&vec_infl_req->res.u64[0], __ATOMIC_RELAXED);\n-\tPLT_ASSERT(res.cn10k.compcode == CPT_COMP_WARN);\n+\tPLT_ASSERT(res.cn10k.compcode == CPT_COMP_GOOD);\n \tPLT_ASSERT(res.cn10k.uc_compcode == 0);\n #endif\n \ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c\nindex 1740a73c36..aafd461436 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.c\n@@ -200,9 +200,12 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t/* Disable IP checksum verification by default */\n \tparam1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_DISABLE;\n \n+\t/* Set the ip chksum flag in mbuf before enqueue.\n+\t * Reset the flag in post process in case of errors\n+\t */\n \tif (ipsec_xfrm->options.ip_csum_enable) {\n-\t\tparam1.s.ip_csum_disable =\n-\t\t\tROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;\n+\t\tparam1.s.ip_csum_disable = ROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;\n+\t\tsec_sess->ip_csum = RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t}\n \n \t/* Disable L4 checksum verification by default */\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h\nindex 044fe33046..23d7a4fac4 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.h\n@@ -33,6 +33,7 @@ struct cn10k_sec_session {\n \tuint16_t max_extended_len;\n \tuint16_t iv_offset;\n \tuint8_t iv_length;\n+\tuint8_t ip_csum;\n \tbool is_outbound;\n \t/** Queue pair */\n \tstruct cnxk_cpt_qp *qp;\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\nindex 084198b5bb..f2761a55a5 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\n@@ -98,6 +98,7 @@ process_inb_sa(struct rte_crypto_op *cop, struct cn10k_sec_session *sess, struct\n \tinst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src);\n \tdptr = rte_pktmbuf_mtod(m_src, uint64_t);\n \tinst->dptr = dptr;\n+\tm_src->ol_flags |= (uint64_t)sess->ip_csum;\n \n \treturn 0;\n }\n", "prefixes": [ "07/17" ] }