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GET /api/patches/120724/?format=api
{ "id": 120724, "url": "http://patches.dpdk.org/api/patches/120724/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221211215256.370099-2-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221211215256.370099-2-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221211215256.370099-2-qi.z.zhang@intel.com", "date": "2022-12-11T21:52:54", "name": "[1/3] net/ice: support no IOVA as PA mode", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5e65cbe28520d664e079d9b49dc9f671861cac24", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221211215256.370099-2-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 26069, "url": "http://patches.dpdk.org/api/series/26069/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26069", "date": "2022-12-11T21:52:53", "name": "support no IOVA as PA mode for some Intel NIC", "version": 1, "mbox": "http://patches.dpdk.org/series/26069/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/120724/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/120724/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 40FD0A034C;\n\tSun, 11 Dec 2022 14:41:48 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0F91342D14;\n\tSun, 11 Dec 2022 14:41:44 +0100 (CET)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id D940040A81;\n Sun, 11 Dec 2022 14:41:41 +0100 (CET)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Dec 2022 05:41:41 -0800", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by fmsmga008.fm.intel.com with ESMTP; 11 Dec 2022 05:41:39 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1670766102; x=1702302102;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=pnETdQfJ/27zFhUnbl8PSOn5650rscTQgVpQpiUyutE=;\n b=mwYySh41P2s4dJpOmGVT966swHDJXVeN3Sdq347dZvhH71cswXcrrSUi\n 8gWD7EzL2Pq1JWx0xeaBXYaF02/RGgvy4aoKQxOr57tU/yA/Y6k0HzrcA\n CdVMGBXVG0ARECxI04nwwlDHV/3uG3rXV8JWrGmBf5rDN9O4gMHLSyE4q\n 4lClbkjhKZZeGXlSmTLpZ3nLgO8mJTFOFKZGLYrNQ73anKCCtrEiwKqfO\n k8wOIbPubYeMUwDUHVpwHEzC08kASGjHASX0HdBziNuUdYeSodjS2/7yo\n RqnbRRcQO7HGXObwio5f9r5XT+rvYU5Z6fmXMw6BOwG6pi0zX762ySECP A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10558\"; a=\"382007061\"", "E=Sophos;i=\"5.96,236,1665471600\"; d=\"scan'208\";a=\"382007061\"", "E=McAfee;i=\"6500,9779,10558\"; a=\"711391918\"", "E=Sophos;i=\"5.96,236,1665471600\"; d=\"scan'208\";a=\"711391918\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "mb@smartsharesystems.com, bruce.richardson@intel.com, wenzhuo.lu@intel.com", "Cc": "dev@dpdk.org, wenjun1.wu@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n stable@dpdk.org", "Subject": "[PATCH 1/3] net/ice: support no IOVA as PA mode", "Date": "Sun, 11 Dec 2022 16:52:54 -0500", "Message-Id": "<20221211215256.370099-2-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20221211215256.370099-1-qi.z.zhang@intel.com>", "References": "<20221211215256.370099-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Remove buf_iova access when RTE_IOVA_AS_PA is not defined.\n\nCc: stable@dpdk.org\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/ice_rxtx_common_avx.h | 24 ++++++++++++++++++++++++\n drivers/net/ice/ice_rxtx_vec_avx2.c | 11 +++++------\n drivers/net/ice/ice_rxtx_vec_avx512.c | 17 +++++++++++------\n 3 files changed, 40 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_rxtx_common_avx.h b/drivers/net/ice/ice_rxtx_common_avx.h\nindex 81e0db5dd3..377740d43b 100644\n--- a/drivers/net/ice/ice_rxtx_common_avx.h\n+++ b/drivers/net/ice/ice_rxtx_common_avx.h\n@@ -11,6 +11,12 @@\n #pragma GCC diagnostic ignored \"-Wcast-qual\"\n #endif\n \n+#if RTE_IOVA_AS_PA\n+#define _PKT_DATA_OFF_U64(pkt) ((pkt)->buf_iova + (pkt)->data_off)\n+#else\n+#define _PKT_DATA_OFF_U64(pkt) ((u64)(pkt)->buf_addr + (pkt)->data_off)\n+#endif\n+\n #ifdef __AVX2__\n static __rte_always_inline void\n ice_rxq_rearm_common(struct ice_rx_queue *rxq, __rte_unused bool avx512)\n@@ -54,9 +60,15 @@ ice_rxq_rearm_common(struct ice_rx_queue *rxq, __rte_unused bool avx512)\n \t\tmb0 = rxep[0].mbuf;\n \t\tmb1 = rxep[1].mbuf;\n \n+#if RTE_IOVA_AS_PA\n \t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n \t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#else\n+\t\t/* load buf_addr(lo 64bit) and next(hi 64bit) */\n+\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, next) !=\n+\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#endif\n \t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n \n@@ -97,9 +109,15 @@ ice_rxq_rearm_common(struct ice_rx_queue *rxq, __rte_unused bool avx512)\n \t\t\tmb6 = rxep[6].mbuf;\n \t\t\tmb7 = rxep[7].mbuf;\n \n+#if RTE_IOVA_AS_PA\n \t\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n \t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#else\n+\t\t\t/* load buf_addr(lo 64bit) and next(hi 64bit) */\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, next) !=\n+\t\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#endif\n \t\t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n \t\t\tvaddr2 = _mm_loadu_si128((__m128i *)&mb2->buf_addr);\n@@ -161,9 +179,15 @@ ice_rxq_rearm_common(struct ice_rx_queue *rxq, __rte_unused bool avx512)\n \t\t\tmb2 = rxep[2].mbuf;\n \t\t\tmb3 = rxep[3].mbuf;\n \n+#if RTE_IOVA_AS_PA\n \t\t\t/* load buf_addr(lo 64bit) and buf_iova(hi 64bit) */\n \t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, buf_iova) !=\n \t\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#else\n+\t\t\t/* load buf_addr(lo 64bit) and next(hi 64bit) */\n+\t\t\tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, next) !=\n+\t\t\t\t\toffsetof(struct rte_mbuf, buf_addr) + 8);\n+#endif\n \t\t\tvaddr0 = _mm_loadu_si128((__m128i *)&mb0->buf_addr);\n \t\t\tvaddr1 = _mm_loadu_si128((__m128i *)&mb1->buf_addr);\n \t\t\tvaddr2 = _mm_loadu_si128((__m128i *)&mb2->buf_addr);\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx2.c b/drivers/net/ice/ice_rxtx_vec_avx2.c\nindex 31d6af42fd..b0fd51d37e 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx2.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx2.c\n@@ -821,8 +821,7 @@ ice_vtx1(volatile struct ice_tx_desc *txdp,\n \tif (offload)\n \t\tice_txd_enable_offload(pkt, &high_qw);\n \n-\t__m128i descriptor = _mm_set_epi64x(high_qw,\n-\t\t\t\tpkt->buf_iova + pkt->data_off);\n+\t__m128i descriptor = _mm_set_epi64x(high_qw, _PKT_DATA_OFF_U64(pkt));\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n@@ -869,15 +868,15 @@ ice_vtx(volatile struct ice_tx_desc *txdp,\n \t\t__m256i desc2_3 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw3,\n-\t\t\t\t pkt[3]->buf_iova + pkt[3]->data_off,\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[3]),\n \t\t\t\t hi_qw2,\n-\t\t\t\t pkt[2]->buf_iova + pkt[2]->data_off);\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[2]));\n \t\t__m256i desc0_1 =\n \t\t\t_mm256_set_epi64x\n \t\t\t\t(hi_qw1,\n-\t\t\t\t pkt[1]->buf_iova + pkt[1]->data_off,\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[1]),\n \t\t\t\t hi_qw0,\n-\t\t\t\t pkt[0]->buf_iova + pkt[0]->data_off);\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[0]));\n \t\t_mm256_store_si256((void *)(txdp + 2), desc2_3);\n \t\t_mm256_store_si256((void *)txdp, desc0_1);\n \t}\ndiff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c\nindex 5bfd5152df..3c74331a5d 100644\n--- a/drivers/net/ice/ice_rxtx_vec_avx512.c\n+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c\n@@ -56,8 +56,14 @@ ice_rxq_rearm(struct ice_rx_queue *rxq)\n \t\t}\n \t}\n \n+#if RTE_IOVA_AS_PA\n \tconst __m512i iova_offsets = _mm512_set1_epi64\n \t\t(offsetof(struct rte_mbuf, buf_iova));\n+#else\n+\tconst __m512i iova_offsets = _mm512_set1_epi64\n+\t\t(offsetof(struct rte_mbuf, buf_addr));\n+#endif\n+\n \tconst __m512i headroom = _mm512_set1_epi64(RTE_PKTMBUF_HEADROOM);\n \n #ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC\n@@ -1092,8 +1098,7 @@ ice_vtx1(volatile struct ice_tx_desc *txdp,\n \tif (do_offload)\n \t\tice_txd_enable_offload(pkt, &high_qw);\n \n-\t__m128i descriptor = _mm_set_epi64x(high_qw,\n-\t\t\t\tpkt->buf_iova + pkt->data_off);\n+\t__m128i descriptor = _mm_set_epi64x(high_qw, _PKT_DATA_OFF_U64(pkt));\n \t_mm_store_si128((__m128i *)txdp, descriptor);\n }\n \n@@ -1133,13 +1138,13 @@ ice_vtx(volatile struct ice_tx_desc *txdp, struct rte_mbuf **pkt,\n \t\t__m512i desc0_3 =\n \t\t\t_mm512_set_epi64\n \t\t\t\t(hi_qw3,\n-\t\t\t\t pkt[3]->buf_iova + pkt[3]->data_off,\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[3]),\n \t\t\t\t hi_qw2,\n-\t\t\t\t pkt[2]->buf_iova + pkt[2]->data_off,\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[2]),\n \t\t\t\t hi_qw1,\n-\t\t\t\t pkt[1]->buf_iova + pkt[1]->data_off,\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[1]),\n \t\t\t\t hi_qw0,\n-\t\t\t\t pkt[0]->buf_iova + pkt[0]->data_off);\n+\t\t\t\t _PKT_DATA_OFF_U64(pkt[0]));\n \t\t_mm512_storeu_si512((void *)txdp, desc0_3);\n \t}\n \n", "prefixes": [ "1/3" ] }