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GET /api/patches/120261/?format=api
{ "id": 120261, "url": "http://patches.dpdk.org/api/patches/120261/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221129092821.1304853-3-tduszynski@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221129092821.1304853-3-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221129092821.1304853-3-tduszynski@marvell.com", "date": "2022-11-29T09:28:19", "name": "[v3,2/4] eal/arm: support reading ARM PMU events in runtime", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9fc6efee5402916ed9d3f7a5aea843621750d809", "submitter": { "id": 2215, "url": "http://patches.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221129092821.1304853-3-tduszynski@marvell.com/mbox/", "series": [ { "id": 25916, "url": "http://patches.dpdk.org/api/series/25916/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25916", "date": "2022-11-29T09:28:17", "name": "add support for self monitoring", "version": 3, "mbox": "http://patches.dpdk.org/series/25916/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/120261/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/120261/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 15F7DA0093;\n\tTue, 29 Nov 2022 10:28:53 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6183142D18;\n\tTue, 29 Nov 2022 10:28:43 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 0013B4067E\n for <dev@dpdk.org>; Tue, 29 Nov 2022 10:28:40 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2AT3No4Y005645; Tue, 29 Nov 2022 01:28:37 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3m5a5098cp-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 29 Nov 2022 01:28:36 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 29 Nov 2022 01:28:35 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 29 Nov 2022 01:28:35 -0800", "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id 85B393F7043;\n Tue, 29 Nov 2022 01:28:33 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=AWxcUKn6Qm3IpXARm+t3K8QTXqP7XQ1IkSMw2Waz0iI=;\n b=UxEFaJY4Oq3ExkPQnU7/8nSTMlCBz4Ek1x4HmaF+jmkj1m4EUx1CUD41bLMWfSkjAlBK\n QbA5ceFJify7Zt1+hoNsNtKfx9ea3IB64mK4XAga3ZL2SqUS6Ey5KB50+tO2zODW1229\n w/dfUQ1LczrCbcPTjIaPWxLUve2ZN3ConDiSBtYwxSRcpBTegx6Zo01tqFtn+hBTCx8y\n cbuDpFcoGIiE/Ehh689RYOUDWXFGMsB6AWeX4GP18mwm4pUqcEA+lJt9trtrh07OjOR1\n 5i/Clf8Dm6x3q863JsjQMUkO8/3GZC33VXTwm+1vPTO3LHR93rW3PG1pdMUArPMe6LDv Ug==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "<dev@dpdk.org>, Ruifeng Wang <ruifeng.wang@arm.com>", "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>", "Subject": "[PATCH v3 2/4] eal/arm: support reading ARM PMU events in runtime", "Date": "Tue, 29 Nov 2022 10:28:19 +0100", "Message-ID": "<20221129092821.1304853-3-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221129092821.1304853-1-tduszynski@marvell.com>", "References": "<20221121121121.3917194-1-tduszynski@marvell.com>\n <20221129092821.1304853-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "47rG7sHQUMnWvIjnVGfyFVPwoAOTwFwz", "X-Proofpoint-GUID": "47rG7sHQUMnWvIjnVGfyFVPwoAOTwFwz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-11-29_06,2022-11-28_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for reading ARM PMU events in runtime.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\n---\n app/test/test_pmu.c | 4 ++\n lib/eal/arm/include/meson.build | 1 +\n lib/eal/arm/include/rte_pmu_pmc.h | 39 +++++++++++\n lib/eal/arm/meson.build | 4 ++\n lib/eal/arm/rte_pmu.c | 104 ++++++++++++++++++++++++++++++\n lib/eal/include/rte_pmu.h | 3 +\n 6 files changed, 155 insertions(+)\n create mode 100644 lib/eal/arm/include/rte_pmu_pmc.h\n create mode 100644 lib/eal/arm/rte_pmu.c", "diff": "diff --git a/app/test/test_pmu.c b/app/test/test_pmu.c\nindex fd331af9ee..f94866dff9 100644\n--- a/app/test/test_pmu.c\n+++ b/app/test/test_pmu.c\n@@ -13,6 +13,10 @@ test_pmu_read(void)\n \tint tries = 10;\n \tint event = -1;\n \n+#if defined(RTE_ARCH_ARM64)\n+\tevent = rte_pmu_add_event(\"cpu_cycles\");\n+#endif\n+\n \twhile (tries--)\n \t\tval += rte_pmu_read(event);\n \ndiff --git a/lib/eal/arm/include/meson.build b/lib/eal/arm/include/meson.build\nindex 657bf58569..ab13b0220a 100644\n--- a/lib/eal/arm/include/meson.build\n+++ b/lib/eal/arm/include/meson.build\n@@ -20,6 +20,7 @@ arch_headers = files(\n 'rte_pause_32.h',\n 'rte_pause_64.h',\n 'rte_pause.h',\n+ 'rte_pmu_pmc.h',\n 'rte_power_intrinsics.h',\n 'rte_prefetch_32.h',\n 'rte_prefetch_64.h',\ndiff --git a/lib/eal/arm/include/rte_pmu_pmc.h b/lib/eal/arm/include/rte_pmu_pmc.h\nnew file mode 100644\nindex 0000000000..10e2984813\n--- /dev/null\n+++ b/lib/eal/arm/include/rte_pmu_pmc.h\n@@ -0,0 +1,39 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2022 Marvell.\n+ */\n+\n+#ifndef _RTE_PMU_PMC_ARM_H_\n+#define _RTE_PMU_PMC_ARM_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include <rte_common.h>\n+\n+static __rte_always_inline uint64_t\n+rte_pmu_pmc_read(int index)\n+{\n+\tuint64_t val;\n+\n+\tif (index == 31) {\n+\t\t/* CPU Cycles (0x11) must be read via pmccntr_el0 */\n+\t\tasm volatile(\"mrs %0, pmccntr_el0\" : \"=r\" (val));\n+\t} else {\n+\t\tasm volatile(\n+\t\t\t\"msr pmselr_el0, %x0\\n\"\n+\t\t\t\"mrs %0, pmxevcntr_el0\\n\"\n+\t\t\t: \"=r\" (val)\n+\t\t\t: \"rZ\" (index)\n+\t\t);\n+\t}\n+\n+\treturn val;\n+}\n+#define rte_pmu_pmc_read rte_pmu_pmc_read\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_PMU_PMC_ARM_H_ */\ndiff --git a/lib/eal/arm/meson.build b/lib/eal/arm/meson.build\nindex dca1106aae..0c5575b197 100644\n--- a/lib/eal/arm/meson.build\n+++ b/lib/eal/arm/meson.build\n@@ -9,3 +9,7 @@ sources += files(\n 'rte_hypervisor.c',\n 'rte_power_intrinsics.c',\n )\n+\n+if is_linux\n+ sources += files('rte_pmu.c')\n+endif\ndiff --git a/lib/eal/arm/rte_pmu.c b/lib/eal/arm/rte_pmu.c\nnew file mode 100644\nindex 0000000000..10ec770ead\n--- /dev/null\n+++ b/lib/eal/arm/rte_pmu.c\n@@ -0,0 +1,104 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2022 Marvell International Ltd.\n+ */\n+\n+#include <errno.h>\n+#include <fcntl.h>\n+#include <stdlib.h>\n+#include <unistd.h>\n+\n+#include <rte_bitops.h>\n+#include <rte_common.h>\n+#include <rte_log.h>\n+#include <rte_pmu.h>\n+\n+#include \"pmu_private.h\"\n+\n+#define PERF_USER_ACCESS_PATH \"/proc/sys/kernel/perf_user_access\"\n+\n+static int restore_uaccess;\n+\n+static int\n+read_attr_int(const char *path, int *val)\n+{\n+\tchar buf[BUFSIZ];\n+\tint ret, fd;\n+\n+\tfd = open(path, O_RDONLY);\n+\tif (fd == -1)\n+\t\treturn -errno;\n+\n+\tret = read(fd, buf, sizeof(buf));\n+\tif (ret == -1) {\n+\t\tclose(fd);\n+\n+\t\treturn -errno;\n+\t}\n+\n+\t*val = strtol(buf, NULL, 10);\n+\tclose(fd);\n+\n+\treturn 0;\n+}\n+\n+static int\n+write_attr_int(const char *path, int val)\n+{\n+\tchar buf[BUFSIZ];\n+\tint num, ret, fd;\n+\n+\tfd = open(path, O_WRONLY);\n+\tif (fd == -1)\n+\t\treturn -errno;\n+\n+\tnum = snprintf(buf, sizeof(buf), \"%d\", val);\n+\tret = write(fd, buf, num);\n+\tif (ret == -1) {\n+\t\tclose(fd);\n+\n+\t\treturn -errno;\n+\t}\n+\n+\tclose(fd);\n+\n+\treturn 0;\n+}\n+\n+int\n+pmu_arch_init(void)\n+{\n+\tint ret;\n+\n+\tret = read_attr_int(PERF_USER_ACCESS_PATH, &restore_uaccess);\n+\tif (ret) {\n+\t\tRTE_LOG(ERR, EAL, \"failed to read %s\\n\", PERF_USER_ACCESS_PATH);\n+\n+\t\treturn ret;\n+\t}\n+\n+\tret = write_attr_int(PERF_USER_ACCESS_PATH, 1);\n+\tif (ret) {\n+\t\tRTE_LOG(ERR, EAL, \"failed to enable perf user access\\n\"\n+\t\t\t\"try enabling manually 'echo 1 > %s'\\n\",\n+\t\t\tPERF_USER_ACCESS_PATH);\n+\n+\t\treturn ret;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void\n+pmu_arch_fini(void)\n+{\n+\twrite_attr_int(PERF_USER_ACCESS_PATH, restore_uaccess);\n+}\n+\n+void\n+pmu_arch_fixup_config(uint64_t config[3])\n+{\n+\t/* select 64 bit counters */\n+\tconfig[1] |= RTE_BIT64(0);\n+\t/* enable userspace access */\n+\tconfig[1] |= RTE_BIT64(1);\n+}\ndiff --git a/lib/eal/include/rte_pmu.h b/lib/eal/include/rte_pmu.h\nindex e4b4f6b052..158a616b83 100644\n--- a/lib/eal/include/rte_pmu.h\n+++ b/lib/eal/include/rte_pmu.h\n@@ -20,6 +20,9 @@ extern \"C\" {\n #include <rte_branch_prediction.h>\n #include <rte_lcore.h>\n #include <rte_log.h>\n+#if defined(RTE_ARCH_ARM64)\n+#include <rte_pmu_pmc.h>\n+#endif\n \n /**\n * @file\n", "prefixes": [ "v3", "2/4" ] }