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GET /api/patches/120260/?format=api
{ "id": 120260, "url": "http://patches.dpdk.org/api/patches/120260/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221129092821.1304853-4-tduszynski@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221129092821.1304853-4-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221129092821.1304853-4-tduszynski@marvell.com", "date": "2022-11-29T09:28:20", "name": "[v3,3/4] eal/x86: support reading Intel PMU events in runtime", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "96174b16c641c79482c23d2eb64153de2527f6f6", "submitter": { "id": 2215, "url": "http://patches.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221129092821.1304853-4-tduszynski@marvell.com/mbox/", "series": [ { "id": 25916, "url": "http://patches.dpdk.org/api/series/25916/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25916", "date": "2022-11-29T09:28:17", "name": "add support for self monitoring", "version": 3, "mbox": "http://patches.dpdk.org/series/25916/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/120260/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/120260/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3AC4BA0093;\n\tTue, 29 Nov 2022 10:28:47 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6AB9F42686;\n\tTue, 29 Nov 2022 10:28:42 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 744CC4067E\n for <dev@dpdk.org>; Tue, 29 Nov 2022 10:28:40 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 2AT71mqV020522; Tue, 29 Nov 2022 01:28:39 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3m3k6wamry-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 29 Nov 2022 01:28:39 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 29 Nov 2022 01:28:37 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 29 Nov 2022 01:28:37 -0800", "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id BB74E3F7044;\n Tue, 29 Nov 2022 01:28:35 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=HZ3z746tAek4MLdAJ6JJzUIT3JEKB53gpUH9gBhQDtg=;\n b=FpFW6Unzr1jmE+HIO5zL/HUJg0MAUwx1SFXThqd72RDiqVu5kmDGgjEWS8ZPW7wjMzDl\n kGEMgSm6dqVHaHFWfTqk6G9z3gyBOfcq1hCM6qvrqj/hSkZgyteUZDUuEcdbmDs0WVbS\n 7SlRIljh5Y8FTWI3aNWmyA9SvbIC9jNdJXt5FjVLO/WPycgt/fubEM9gi7mkpDMpsLmK\n tJllOXUht1Yu4n6KHOINZ3bj1dXmB8YRbdUmwyEckiYJ13qsl4re6AlXAQm1dhr/Eh4g\n rnMOE9IBj7qZIIel8/IpS9qQHX/TIXsWGWVRkZmktYcgJsPWL0AOssTdLQKUzhfaLw6a ww==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "<dev@dpdk.org>, Bruce Richardson <bruce.richardson@intel.com>, \"Konstantin\n Ananyev\" <konstantin.v.ananyev@yandex.ru>", "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>", "Subject": "[PATCH v3 3/4] eal/x86: support reading Intel PMU events in runtime", "Date": "Tue, 29 Nov 2022 10:28:20 +0100", "Message-ID": "<20221129092821.1304853-4-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221129092821.1304853-1-tduszynski@marvell.com>", "References": "<20221121121121.3917194-1-tduszynski@marvell.com>\n <20221129092821.1304853-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "dgMkuDOkHKIylha_TfP2yFy_VJ7X-dj_", "X-Proofpoint-ORIG-GUID": "dgMkuDOkHKIylha_TfP2yFy_VJ7X-dj_", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-11-29_06,2022-11-28_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for reading Intel PMU events in runtime.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\n---\n app/test/test_pmu.c | 2 ++\n lib/eal/include/rte_pmu.h | 2 +-\n lib/eal/x86/include/meson.build | 1 +\n lib/eal/x86/include/rte_pmu_pmc.h | 33 +++++++++++++++++++++++++++++++\n 4 files changed, 37 insertions(+), 1 deletion(-)\n create mode 100644 lib/eal/x86/include/rte_pmu_pmc.h", "diff": "diff --git a/app/test/test_pmu.c b/app/test/test_pmu.c\nindex f94866dff9..016204c083 100644\n--- a/app/test/test_pmu.c\n+++ b/app/test/test_pmu.c\n@@ -15,6 +15,8 @@ test_pmu_read(void)\n \n #if defined(RTE_ARCH_ARM64)\n \tevent = rte_pmu_add_event(\"cpu_cycles\");\n+#elif defined(RTE_ARCH_X86_64)\n+\tevent = rte_pmu_add_event(\"cpu-cycles\");\n #endif\n \n \twhile (tries--)\ndiff --git a/lib/eal/include/rte_pmu.h b/lib/eal/include/rte_pmu.h\nindex 158a616b83..3d90f4baf7 100644\n--- a/lib/eal/include/rte_pmu.h\n+++ b/lib/eal/include/rte_pmu.h\n@@ -20,7 +20,7 @@ extern \"C\" {\n #include <rte_branch_prediction.h>\n #include <rte_lcore.h>\n #include <rte_log.h>\n-#if defined(RTE_ARCH_ARM64)\n+#if defined(RTE_ARCH_ARM64) || defined(RTE_ARCH_X86_64)\n #include <rte_pmu_pmc.h>\n #endif\n \ndiff --git a/lib/eal/x86/include/meson.build b/lib/eal/x86/include/meson.build\nindex 52d2f8e969..03d286ed25 100644\n--- a/lib/eal/x86/include/meson.build\n+++ b/lib/eal/x86/include/meson.build\n@@ -9,6 +9,7 @@ arch_headers = files(\n 'rte_io.h',\n 'rte_memcpy.h',\n 'rte_pause.h',\n+ 'rte_pmu_pmc.h',\n 'rte_power_intrinsics.h',\n 'rte_prefetch.h',\n 'rte_rtm.h',\ndiff --git a/lib/eal/x86/include/rte_pmu_pmc.h b/lib/eal/x86/include/rte_pmu_pmc.h\nnew file mode 100644\nindex 0000000000..a2cd849fb1\n--- /dev/null\n+++ b/lib/eal/x86/include/rte_pmu_pmc.h\n@@ -0,0 +1,33 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2022 Marvell.\n+ */\n+\n+#ifndef _RTE_PMU_PMC_X86_H_\n+#define _RTE_PMU_PMC_X86_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include <rte_common.h>\n+\n+static __rte_always_inline uint64_t\n+rte_pmu_pmc_read(int index)\n+{\n+\tuint32_t high, low;\n+\n+\tasm volatile(\n+\t\t\"rdpmc\\n\"\n+\t\t: \"=a\" (low), \"=d\" (high)\n+\t\t: \"c\" (index)\n+\t);\n+\n+\treturn ((uint64_t)high << 32) | (uint64_t)low;\n+}\n+#define rte_pmu_pmc_read rte_pmu_pmc_read\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_PMU_PMC_X86_H_ */\n", "prefixes": [ "v3", "3/4" ] }