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GET /api/patches/120142/?format=api
{ "id": 120142, "url": "http://patches.dpdk.org/api/patches/120142/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221125025124.805466-1-ke1x.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221125025124.805466-1-ke1x.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221125025124.805466-1-ke1x.zhang@intel.com", "date": "2022-11-25T02:51:24", "name": "net/ice: add devargs for disabling mac filter", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "e0a2e5cef4fbe07d211e6f71b7b99fdd01dab79c", "submitter": { "id": 2503, "url": "http://patches.dpdk.org/api/people/2503/?format=api", "name": "Zhang, Ke1X", "email": "ke1x.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221125025124.805466-1-ke1x.zhang@intel.com/mbox/", "series": [ { "id": 25890, "url": "http://patches.dpdk.org/api/series/25890/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25890", "date": "2022-11-25T02:51:24", "name": "net/ice: add devargs for disabling mac filter", "version": 1, "mbox": "http://patches.dpdk.org/series/25890/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/120142/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/120142/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1351BA0032;\n\tFri, 25 Nov 2022 04:05:48 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0571B40156;\n\tFri, 25 Nov 2022 04:05:48 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n by mails.dpdk.org (Postfix) with ESMTP id C7BD440150\n for <dev@dpdk.org>; Fri, 25 Nov 2022 04:05:46 +0100 (CET)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Nov 2022 19:05:45 -0800", "from unknown (HELO localhost.localdomain) ([10.239.252.104])\n by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Nov 2022 19:05:43 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1669345547; x=1700881547;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=PFfX7zKb94fyn0r0CdBun2UdGDD8izOaI7jmGVG3DgY=;\n b=MOLUAulNpTE1YtZnt9ncHGymfEWgv1jytRFOOZbY5D1XY4t9CyfIsPHa\n znAgXUHRLrMw9khtPtzDzSy3lPRJrK8DoOAyY6u01/MxiH/HxdFMA0+R4\n pn5ewBL18xuJVQabWpR26SvhGiLbvX5FgVV3U56Ul7FkIKj6uqMB6JQXQ\n bCGc7/50AacYNnM1STCin5wWumP+hPyzkQpiww5YfrifDtME0Mhewc0wL\n weOWkwh2MbYunNeisplewCRkB1PX0nzigggyRvcAfrEuaVau6Mg2TvE2a\n RTbjFxasQLapIWGxNgktX7zVxxamuj703Y1YJVIi8c1rTH1mDoXW3EYsW Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10541\"; a=\"315555480\"", "E=Sophos;i=\"5.96,192,1665471600\"; d=\"scan'208\";a=\"315555480\"", "E=McAfee;i=\"6500,9779,10541\"; a=\"644656596\"", "E=Sophos;i=\"5.96,192,1665471600\"; d=\"scan'208\";a=\"644656596\"" ], "From": "Ke Zhang <ke1x.zhang@intel.com>", "To": "qi.z.zhang@intel.com,\n\tyuying.zhang@intel.com,\n\tdev@dpdk.org", "Cc": "\"ke1x.zhang\" <ke1x.zhang@intel.com>", "Subject": "[PATCH] net/ice: add devargs for disabling mac filter", "Date": "Fri, 25 Nov 2022 10:51:24 +0800", "Message-Id": "<20221125025124.805466-1-ke1x.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: \"ke1x.zhang\" <ke1x.zhang@intel.com>\n\nThis patch adds support to disable mac filter which will\nbe used by ice driver when setting dpdk_devargs config\nfield in the TRex config file.\n\nMac filter is not disabled in default.\n\nSigned-off-by: ke1x.zhang <ke1x.zhang@intel.com>\n---\n drivers/net/ice/ice_ethdev.c | 13 +++++++++++++\n drivers/net/ice/ice_ethdev.h | 1 +\n drivers/net/ice/ice_generic_flow.c | 15 +++++++++++++++\n 3 files changed, 29 insertions(+)", "diff": "diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 0bc739daf0..0c9f66eb88 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -28,6 +28,7 @@\n /* devargs */\n #define ICE_SAFE_MODE_SUPPORT_ARG \"safe-mode-support\"\n #define ICE_PIPELINE_MODE_SUPPORT_ARG \"pipeline-mode-support\"\n+#define ICE_MAC_FILTER_DISABLE \"mac-filter-disable\"\n #define ICE_PROTO_XTR_ARG \"proto_xtr\"\n #define ICE_FIELD_OFFS_ARG\t\t \"field_offs\"\n #define ICE_FIELD_NAME_ARG\t\t \"field_name\"\n@@ -49,6 +50,7 @@ static const char * const ice_valid_args[] = {\n \tICE_HW_DEBUG_MASK_ARG,\n \tICE_ONE_PPS_OUT_ARG,\n \tICE_RX_LOW_LATENCY_ARG,\n+\tICE_MAC_FILTER_DISABLE,\n \tNULL\n };\n \n@@ -962,8 +964,13 @@ ice_add_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *mac_addr)\n \tstruct ice_mac_filter *f;\n \tstruct LIST_HEAD_TYPE list_head;\n \tstruct ice_hw *hw = ICE_VSI_TO_HW(vsi);\n+\tstruct ice_adapter *ad = (struct ice_adapter *)hw->back;\n \tint ret = 0;\n \n+\tif (ad->devargs.mac_filter_disable == 1) {\n+\t\tPMD_DRV_LOG(ERR, \"This MAC filter is disabled.\");\n+\t\treturn 0;\n+\t}\n \t/* If it's added and configured, return */\n \tf = ice_find_mac_filter(vsi, mac_addr);\n \tif (f) {\n@@ -2075,6 +2082,11 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)\n \tif (ret)\n \t\tgoto bail;\n \n+\tret = rte_kvargs_process(kvlist, ICE_MAC_FILTER_DISABLE,\n+\t\t\t\t&parse_bool, &ad->devargs.mac_filter_disable);\n+\tif (ret)\n+\t\tgoto bail;\n+\n \tret = rte_kvargs_process(kvlist, ICE_HW_DEBUG_MASK_ARG,\n \t\t\t\t &parse_u64, &ad->hw.debug_mask);\n \tif (ret)\n@@ -6050,6 +6062,7 @@ RTE_PMD_REGISTER_PARAM_STRING(net_ice,\n \t\t\t ICE_PROTO_XTR_ARG \"=[queue:]<vlan|ipv4|ipv6|ipv6_flow|tcp|ip_offset>\"\n \t\t\t ICE_SAFE_MODE_SUPPORT_ARG \"=<0|1>\"\n \t\t\t ICE_PIPELINE_MODE_SUPPORT_ARG \"=<0|1>\"\n+\t\t\t ICE_MAC_FILTER_DISABLE \"=<0|1>\"\n \t\t\t ICE_RX_LOW_LATENCY_ARG \"=<0|1>\");\n \n RTE_LOG_REGISTER_SUFFIX(ice_logtype_init, init, NOTICE);\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex c8311be179..0350c6584a 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -563,6 +563,7 @@ struct ice_devargs {\n \tint safe_mode_support;\n \tuint8_t proto_xtr_dflt;\n \tint pipe_mode_support;\n+\tint mac_filter_disable;\n \tuint8_t proto_xtr[ICE_MAX_QUEUE_NUM];\n \tuint8_t pin_idx;\n \tuint8_t pps_out_ena;\ndiff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c\nindex d496c28dec..bca38f5a52 100644\n--- a/drivers/net/ice/ice_generic_flow.c\n+++ b/drivers/net/ice/ice_generic_flow.c\n@@ -2464,6 +2464,8 @@ ice_flow_create(struct rte_eth_dev *dev,\n \t\tstruct rte_flow_error *error)\n {\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_adapter *ad =\n+\t\t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tstruct rte_flow *flow = NULL;\n \tint ret;\n \tstruct ice_flow_engine *engine = NULL;\n@@ -2476,6 +2478,14 @@ ice_flow_create(struct rte_eth_dev *dev,\n \t\treturn flow;\n \t}\n \n+\tif (ad->devargs.mac_filter_disable == 1) {\n+\t\tif ((pattern[0].type == RTE_FLOW_ITEM_TYPE_ANY)\n+\t\t\t&& (actions[0].type == RTE_FLOW_ACTION_TYPE_DROP)) {\n+\t\t\tflow->rule = NULL;\n+\t\t\treturn flow;\n+\t\t}\n+\t}\n+\n \trte_spinlock_lock(&pf->flow_ops_lock);\n \n \tret = ice_flow_process_filter(dev, flow, attr, pattern, actions,\n@@ -2506,6 +2516,11 @@ ice_flow_destroy(struct rte_eth_dev *dev,\n \t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tint ret = 0;\n \n+\tif ((ad->devargs.mac_filter_disable == 1)\n+\t\t&& (flow->rule == NULL)) {\n+\t\treturn 0;\n+\t}\n+\n \tif (!flow || !flow->engine || !flow->engine->destroy) {\n \t\trte_flow_error_set(error, EINVAL,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_HANDLE,\n", "prefixes": [] }