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GET /api/patches/119114/?format=api
{ "id": 119114, "url": "http://patches.dpdk.org/api/patches/119114/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221025160539.14613-5-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221025160539.14613-5-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221025160539.14613-5-pbhagavatula@marvell.com", "date": "2022-10-25T16:05:39", "name": "[v6,5/5] examples/l3fwd: use em vector path for event vector", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b9f565370b521dab82a655938b5d590bc5b2c06b", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221025160539.14613-5-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 25425, "url": "http://patches.dpdk.org/api/series/25425/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25425", "date": "2022-10-25T16:05:35", "name": "[v6,1/5] examples/l3fwd: fix port group mask generation", "version": 6, "mbox": "http://patches.dpdk.org/series/25425/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/119114/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/119114/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 25CA5A054A;\n\tTue, 25 Oct 2022 18:06:13 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A022C42C5B;\n\tTue, 25 Oct 2022 18:06:03 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 5652142C5A\n for <dev@dpdk.org>; Tue, 25 Oct 2022 18:05:56 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 29PFLqVv022879;\n Tue, 25 Oct 2022 09:05:55 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3kejc9g7st-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 25 Oct 2022 09:05:55 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 25 Oct 2022 09:05:53 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 25 Oct 2022 09:05:53 -0700", "from MININT-80QBFE8.corp.innovium.com (unknown [10.28.161.88])\n by maili.marvell.com (Postfix) with ESMTP id 4F9C53F7082;\n Tue, 25 Oct 2022 09:05:51 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=2DpA+wA+7FIkvhwvsX0wpFVkx8iFZLNzl7g3kIE86Ps=;\n b=EP8MznFsSOtRzbiGcwz2gAZgTOVyvt4JHyjApzjiD3Dx0zqWTuxXxP4AypiY5maR2Y9t\n oMmPeu1BNrYaHmxiwZYuGOd+/iPf0BXvmK2OUcUZG7JwTfQUyFCOCm+1WDSMkjD7nGTI\n IgQJq1Cs1wGrO6p0d0sJbkl5y6893tfzBr1BkOqLQNzCKLiHKXYjdr62nXi3Ovigsw0Y\n Foxj8xnZOGUMcRJhqpEGFfcKh90sh0LyBHQo74jFhlWFDRGVbdLUvxQNF7pt61HaNAtw\n L9LooXwgVIHxdLcCuX5KR+Ne/UuhhwIbgc93x+hfMrvHEki+iXOq+OOnEp2HS4YY3tpv lw==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, <thomas@monjalon.net>", "CC": "<dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>, \"Shijith\n Thotton\" <sthotton@marvell.com>", "Subject": "[PATCH v6 5/5] examples/l3fwd: use em vector path for event vector", "Date": "Tue, 25 Oct 2022 21:35:39 +0530", "Message-ID": "<20221025160539.14613-5-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221025160539.14613-1-pbhagavatula@marvell.com>", "References": "<20221011101207.4489-1-pbhagavatula@marvell.com>\n <20221025160539.14613-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "tTgVLr1AiFPnFhjfIUMI_aKO6KwhKkmj", "X-Proofpoint-GUID": "tTgVLr1AiFPnFhjfIUMI_aKO6KwhKkmj", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-25_09,2022-10-25_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nUse em vector path to process event vector.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\nAcked-by: Shijith Thotton <sthotton@marvell.com>\n---\n examples/l3fwd/l3fwd_em.c | 13 +++--\n examples/l3fwd/l3fwd_em.h | 29 +++++------\n examples/l3fwd/l3fwd_em_hlm.h | 72 +++++-----------------------\n examples/l3fwd/l3fwd_em_sequential.h | 25 ++++++----\n examples/l3fwd/l3fwd_event.h | 21 --------\n 5 files changed, 48 insertions(+), 112 deletions(-)", "diff": "diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c\nindex a203dc9e46..35de31157e 100644\n--- a/examples/l3fwd/l3fwd_em.c\n+++ b/examples/l3fwd/l3fwd_em.c\n@@ -860,10 +860,15 @@ em_event_loop_vector(struct l3fwd_event_resources *evt_rsrc,\n \tint i, nb_enq = 0, nb_deq = 0;\n \tstruct lcore_conf *lconf;\n \tunsigned int lcore_id;\n+\tuint16_t *dst_ports;\n \n \tif (event_p_id < 0)\n \t\treturn;\n \n+\tdst_ports = rte_zmalloc(\"\", sizeof(uint16_t) * evt_rsrc->vector_size,\n+\t\t\t\tRTE_CACHE_LINE_SIZE);\n+\tif (dst_ports == NULL)\n+\t\treturn;\n \tlcore_id = rte_lcore_id();\n \tlconf = &lcore_conf[lcore_id];\n \n@@ -885,13 +890,12 @@ em_event_loop_vector(struct l3fwd_event_resources *evt_rsrc,\n \t\t\t}\n \n #if defined RTE_ARCH_X86 || defined __ARM_NEON\n-\t\t\tl3fwd_em_process_event_vector(events[i].vec, lconf);\n+\t\t\tl3fwd_em_process_event_vector(events[i].vec, lconf,\n+\t\t\t\t\t\t dst_ports);\n #else\n \t\t\tl3fwd_em_no_opt_process_event_vector(events[i].vec,\n-\t\t\t\t\t\t\t lconf);\n+\t\t\t\t\t\t\t lconf, dst_ports);\n #endif\n-\t\t\tif (flags & L3FWD_EVENT_TX_DIRECT)\n-\t\t\t\tevent_vector_txq_set(events[i].vec, 0);\n \t\t}\n \n \t\tif (flags & L3FWD_EVENT_TX_ENQ) {\n@@ -915,6 +919,7 @@ em_event_loop_vector(struct l3fwd_event_resources *evt_rsrc,\n \n \tl3fwd_event_worker_cleanup(event_d_id, event_p_id, events, nb_enq,\n \t\t\t\t nb_deq, 1);\n+\trte_free(dst_ports);\n }\n \n int __rte_noinline\ndiff --git a/examples/l3fwd/l3fwd_em.h b/examples/l3fwd/l3fwd_em.h\nindex fe2ee59f6a..7d051fc076 100644\n--- a/examples/l3fwd/l3fwd_em.h\n+++ b/examples/l3fwd/l3fwd_em.h\n@@ -100,7 +100,7 @@ l3fwd_em_simple_forward(struct rte_mbuf *m, uint16_t portid,\n \t}\n }\n \n-static __rte_always_inline void\n+static __rte_always_inline uint16_t\n l3fwd_em_simple_process(struct rte_mbuf *m, struct lcore_conf *qconf)\n {\n \tstruct rte_ether_hdr *eth_hdr;\n@@ -117,6 +117,8 @@ l3fwd_em_simple_process(struct rte_mbuf *m, struct lcore_conf *qconf)\n \t\tm->port = l3fwd_em_handle_ipv6(m, m->port, eth_hdr, qconf);\n \telse\n \t\tm->port = BAD_PORT;\n+\n+\treturn m->port;\n }\n \n /*\n@@ -179,7 +181,8 @@ l3fwd_em_no_opt_process_events(int nb_rx, struct rte_event **events,\n \n static inline void\n l3fwd_em_no_opt_process_event_vector(struct rte_event_vector *vec,\n-\t\t\t\t struct lcore_conf *qconf)\n+\t\t\t\t struct lcore_conf *qconf,\n+\t\t\t\t uint16_t *dst_ports)\n {\n \tstruct rte_mbuf **mbufs = vec->mbufs;\n \tint32_t i;\n@@ -188,30 +191,20 @@ l3fwd_em_no_opt_process_event_vector(struct rte_event_vector *vec,\n \tfor (i = 0; i < PREFETCH_OFFSET && i < vec->nb_elem; i++)\n \t\trte_prefetch0(rte_pktmbuf_mtod(mbufs[i], void *));\n \n-\t/* Process first packet to init vector attributes */\n-\tl3fwd_em_simple_process(mbufs[0], qconf);\n-\tif (vec->attr_valid) {\n-\t\tif (mbufs[0]->port != BAD_PORT)\n-\t\t\tvec->port = mbufs[0]->port;\n-\t\telse\n-\t\t\tvec->attr_valid = 0;\n-\t}\n-\n \t/*\n \t * Prefetch and forward already prefetched packets.\n \t */\n-\tfor (i = 1; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {\n+\tfor (i = 0; i < (vec->nb_elem - PREFETCH_OFFSET); i++) {\n \t\trte_prefetch0(\n \t\t\trte_pktmbuf_mtod(mbufs[i + PREFETCH_OFFSET], void *));\n-\t\tl3fwd_em_simple_process(mbufs[i], qconf);\n-\t\tevent_vector_attr_validate(vec, mbufs[i]);\n+\t\tdst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);\n \t}\n \n \t/* Forward remaining prefetched packets */\n-\tfor (; i < vec->nb_elem; i++) {\n-\t\tl3fwd_em_simple_process(mbufs[i], qconf);\n-\t\tevent_vector_attr_validate(vec, mbufs[i]);\n-\t}\n+\tfor (; i < vec->nb_elem; i++)\n+\t\tdst_ports[i] = l3fwd_em_simple_process(mbufs[i], qconf);\n+\n+\tprocess_event_vector(vec, dst_ports);\n }\n \n #endif /* __L3FWD_EM_H__ */\ndiff --git a/examples/l3fwd/l3fwd_em_hlm.h b/examples/l3fwd/l3fwd_em_hlm.h\nindex 12b997e477..2e11eefad7 100644\n--- a/examples/l3fwd/l3fwd_em_hlm.h\n+++ b/examples/l3fwd/l3fwd_em_hlm.h\n@@ -332,70 +332,20 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **ev,\n \n static inline void\n l3fwd_em_process_event_vector(struct rte_event_vector *vec,\n-\t\t\t struct lcore_conf *qconf)\n+\t\t\t struct lcore_conf *qconf, uint16_t *dst_port)\n {\n-\tstruct rte_mbuf **mbufs = vec->mbufs;\n-\tuint16_t dst_port[MAX_PKT_BURST];\n-\tint32_t i, j, n, pos;\n-\n-\tfor (j = 0; j < EM_HASH_LOOKUP_COUNT && j < vec->nb_elem; j++)\n-\t\trte_prefetch0(\n-\t\t\trte_pktmbuf_mtod(mbufs[j], struct rte_ether_hdr *) + 1);\n+\tuint16_t i;\n \n \tif (vec->attr_valid)\n-\t\tvec->port = em_get_dst_port(qconf, mbufs[0], mbufs[0]->port);\n-\n-\tn = RTE_ALIGN_FLOOR(vec->nb_elem, EM_HASH_LOOKUP_COUNT);\n-\tfor (j = 0; j < n; j += EM_HASH_LOOKUP_COUNT) {\n-\t\tuint32_t pkt_type =\n-\t\t\tRTE_PTYPE_L3_MASK | RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP;\n-\t\tuint32_t l3_type, tcp_or_udp;\n-\n-\t\tfor (i = 0; i < EM_HASH_LOOKUP_COUNT; i++)\n-\t\t\tpkt_type &= mbufs[j + i]->packet_type;\n-\n-\t\tl3_type = pkt_type & RTE_PTYPE_L3_MASK;\n-\t\ttcp_or_udp = pkt_type & (RTE_PTYPE_L4_TCP | RTE_PTYPE_L4_UDP);\n-\n-\t\tfor (i = 0, pos = j + EM_HASH_LOOKUP_COUNT;\n-\t\t i < EM_HASH_LOOKUP_COUNT && pos < vec->nb_elem;\n-\t\t i++, pos++) {\n-\t\t\trte_prefetch0(rte_pktmbuf_mtod(mbufs[pos],\n-\t\t\t\t\t\t struct rte_ether_hdr *) +\n-\t\t\t\t 1);\n-\t\t}\n-\n-\t\tif (tcp_or_udp && (l3_type == RTE_PTYPE_L3_IPV4)) {\n-\t\t\tem_get_dst_port_ipv4xN_events(qconf, &mbufs[j],\n-\t\t\t\t\t\t &dst_port[j]);\n-\t\t} else if (tcp_or_udp && (l3_type == RTE_PTYPE_L3_IPV6)) {\n-\t\t\tem_get_dst_port_ipv6xN_events(qconf, &mbufs[j],\n-\t\t\t\t\t\t &dst_port[j]);\n-\t\t} else {\n-\t\t\tfor (i = 0; i < EM_HASH_LOOKUP_COUNT; i++) {\n-\t\t\t\tmbufs[j + i]->port =\n-\t\t\t\t\tem_get_dst_port(qconf, mbufs[j + i],\n-\t\t\t\t\t\t\tmbufs[j + i]->port);\n-\t\t\t\tprocess_packet(mbufs[j + i],\n-\t\t\t\t\t &mbufs[j + i]->port);\n-\t\t\t\tevent_vector_attr_validate(vec, mbufs[j + i]);\n-\t\t\t}\n-\t\t\tcontinue;\n-\t\t}\n-\t\tprocessx4_step3(&mbufs[j], &dst_port[j]);\n-\n-\t\tfor (i = 0; i < EM_HASH_LOOKUP_COUNT; i++) {\n-\t\t\tmbufs[j + i]->port = dst_port[j + i];\n-\t\t\tevent_vector_attr_validate(vec, mbufs[j + i]);\n-\t\t}\n-\t}\n-\n-\tfor (; j < vec->nb_elem; j++) {\n-\t\tmbufs[j]->port =\n-\t\t\tem_get_dst_port(qconf, mbufs[j], mbufs[j]->port);\n-\t\tprocess_packet(mbufs[j], &mbufs[j]->port);\n-\t\tevent_vector_attr_validate(vec, mbufs[j]);\n-\t}\n+\t\tl3fwd_em_process_packets(vec->nb_elem, vec->mbufs, dst_port,\n+\t\t\t\t\t vec->port, qconf, 1);\n+\telse\n+\t\tfor (i = 0; i < vec->nb_elem; i++)\n+\t\t\tl3fwd_em_process_packets(1, &vec->mbufs[i],\n+\t\t\t\t\t\t &dst_port[i],\n+\t\t\t\t\t\t vec->mbufs[i]->port, qconf, 1);\n+\n+\tprocess_event_vector(vec, dst_port);\n }\n \n #endif /* __L3FWD_EM_HLM_H__ */\ndiff --git a/examples/l3fwd/l3fwd_em_sequential.h b/examples/l3fwd/l3fwd_em_sequential.h\nindex d2f75edb8a..067f23889a 100644\n--- a/examples/l3fwd/l3fwd_em_sequential.h\n+++ b/examples/l3fwd/l3fwd_em_sequential.h\n@@ -113,39 +113,48 @@ l3fwd_em_process_events(int nb_rx, struct rte_event **events,\n \n \tfor (i = 1, j = 0; j < nb_rx; i++, j++) {\n \t\tstruct rte_mbuf *mbuf = events[j]->mbuf;\n+\t\tuint16_t port;\n \n \t\tif (i < nb_rx) {\n \t\t\trte_prefetch0(rte_pktmbuf_mtod(\n \t\t\t\t\tevents[i]->mbuf,\n \t\t\t\t\tstruct rte_ether_hdr *) + 1);\n \t\t}\n+\t\tport = mbuf->port;\n \t\tmbuf->port = em_get_dst_port(qconf, mbuf, mbuf->port);\n \t\tprocess_packet(mbuf, &mbuf->port);\n+\t\tif (mbuf->port == BAD_PORT)\n+\t\t\tmbuf->port = port;\n \t}\n }\n \n static inline void\n l3fwd_em_process_event_vector(struct rte_event_vector *vec,\n-\t\t\t struct lcore_conf *qconf)\n+\t\t\t struct lcore_conf *qconf, uint16_t *dst_ports)\n {\n+\tconst uint8_t attr_valid = vec->attr_valid;\n \tstruct rte_mbuf **mbufs = vec->mbufs;\n \tint32_t i, j;\n \n \trte_prefetch0(rte_pktmbuf_mtod(mbufs[0], struct rte_ether_hdr *) + 1);\n \n-\tif (vec->attr_valid)\n-\t\tvec->port = em_get_dst_port(qconf, mbufs[0], mbufs[0]->port);\n-\n \tfor (i = 0, j = 1; i < vec->nb_elem; i++, j++) {\n \t\tif (j < vec->nb_elem)\n \t\t\trte_prefetch0(rte_pktmbuf_mtod(mbufs[j],\n \t\t\t\t\t\t struct rte_ether_hdr *) +\n \t\t\t\t 1);\n-\t\tmbufs[i]->port =\n-\t\t\tem_get_dst_port(qconf, mbufs[i], mbufs[i]->port);\n-\t\tprocess_packet(mbufs[i], &mbufs[i]->port);\n-\t\tevent_vector_attr_validate(vec, mbufs[i]);\n+\t\tdst_ports[i] = em_get_dst_port(qconf, mbufs[i],\n+\t\t\t\t\t attr_valid ? vec->port :\n+\t\t\t\t\t\t\t mbufs[i]->port);\n \t}\n+\tj = RTE_ALIGN_FLOOR(vec->nb_elem, FWDSTEP);\n+\n+\tfor (i = 0; i != j; i += FWDSTEP)\n+\t\tprocessx4_step3(&vec->mbufs[i], &dst_ports[i]);\n+\tfor (; i < vec->nb_elem; i++)\n+\t\tprocess_packet(vec->mbufs[i], &dst_ports[i]);\n+\n+\tprocess_event_vector(vec, dst_ports);\n }\n \n #endif /* __L3FWD_EM_SEQUENTIAL_H__ */\ndiff --git a/examples/l3fwd/l3fwd_event.h b/examples/l3fwd/l3fwd_event.h\nindex 3fe38aada0..e21817c36b 100644\n--- a/examples/l3fwd/l3fwd_event.h\n+++ b/examples/l3fwd/l3fwd_event.h\n@@ -103,27 +103,6 @@ process_dst_port(uint16_t *dst_ports, uint16_t nb_elem)\n }\n #endif\n \n-static inline void\n-event_vector_attr_validate(struct rte_event_vector *vec, struct rte_mbuf *mbuf)\n-{\n-\t/* l3fwd application only changes mbuf port while processing */\n-\tif (vec->attr_valid && (vec->port != mbuf->port))\n-\t\tvec->attr_valid = 0;\n-}\n-\n-static inline void\n-event_vector_txq_set(struct rte_event_vector *vec, uint16_t txq)\n-{\n-\tif (vec->attr_valid) {\n-\t\tvec->queue = txq;\n-\t} else {\n-\t\tint i;\n-\n-\t\tfor (i = 0; i < vec->nb_elem; i++)\n-\t\t\trte_event_eth_tx_adapter_txq_set(vec->mbufs[i], txq);\n-\t}\n-}\n-\n static inline uint16_t\n filter_bad_packets(struct rte_mbuf **mbufs, uint16_t *dst_port,\n \t\t uint16_t nb_pkts)\n", "prefixes": [ "v6", "5/5" ] }