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GET /api/patches/118034/?format=api
{ "id": 118034, "url": "http://patches.dpdk.org/api/patches/118034/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221011140854.777428-1-mpiszczek@ddn.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221011140854.777428-1-mpiszczek@ddn.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221011140854.777428-1-mpiszczek@ddn.com", "date": "2022-10-11T14:08:53", "name": "[v4] pci: read amd iommu virtual address width", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "911ff18d402cbbd781f55d0776f4fd454ee7b2b5", "submitter": { "id": 2840, "url": "http://patches.dpdk.org/api/people/2840/?format=api", "name": "Michael Piszczek", "email": "mpiszczek@ddn.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221011140854.777428-1-mpiszczek@ddn.com/mbox/", "series": [ { "id": 25169, "url": "http://patches.dpdk.org/api/series/25169/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25169", "date": "2022-10-11T14:08:53", "name": "[v4] pci: read amd iommu virtual address width", "version": 4, "mbox": "http://patches.dpdk.org/series/25169/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/118034/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/118034/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 66CF2A0547;\n\tWed, 12 Oct 2022 10:42:21 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0162F42D6E;\n\tWed, 12 Oct 2022 10:42:21 +0200 (CEST)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2089.outbound.protection.outlook.com [40.107.220.89])\n by mails.dpdk.org (Postfix) with ESMTP id B9C9E42B7D\n for <dev@dpdk.org>; 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pr=C", "From": "Michael Piszczek <mpiszczek@ddn.com>", "To": "dev@dpdk.org", "Cc": "Vipin.Varghese@amd.com,\n\tMichael Piszczek <mpiszczek@ddn.com>", "Subject": "[PATCH v4] pci: read amd iommu virtual address width", "Date": "Tue, 11 Oct 2022 16:08:53 +0200", "Message-Id": "<20221011140854.777428-1-mpiszczek@ddn.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20220912160157.3642968-2-mpiszczek@ddn.com>", "References": "<20220912160157.3642968-2-mpiszczek@ddn.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BN8NAM04FT019:EE_|MW5PR19MB5604:EE_", "Content-Type": "text/plain", "X-MS-Office365-Filtering-Correlation-Id": "022a9063-48ec-4da8-f50a-08daab92237a", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n JdRHjyoOE33Pg9npmD1MnZnDmAyOV6JJaugkb4X63cE8PQUNK2HoRipZJyuUEXfrOBVdQfoQnSthSerBXek5jx2L1EQQlspolfJW7+aia4bi8xstfnUFSNz+m0x7cgBWvqaOXOnEMwPlQEi4gn5L6pCfowkZ3XiR/wE7PZ804dslno2dGdn4u23Ehvwid06bEGP33I6w5+wI6lymJ3i89OkGyec63YvgZdjOH8ti5h4uiYiAJFGrkx5dsrASMzn6b5ACvTXsgbeow0ho8WWleqL9BB/iGFmlJqf9ARt10k+/Z0OBJJ+k3snPxqAc21seJi7elZ5+my8DhPuM43nk7eZD07SVslHQ2Lt6WF9+gdU1E+OWBfKTk+iQy8l0XIDPPFGRemqyd2gb2XSrCzywXXxRQ6L1jw1lfo62o9I7GfsRI9twdbm/tz6E57xcggCFvlD8b+Ac0ejpkV5EByDjO7Std5IVdh4TmpwZaVa5VaqREZuXVmch1/AudTB71aF4vDCeohXEbFc3RbtQuhAoJa1XeDLZhNoJFSuG54YjNwww2WtJnxxB1XEmw/U6YTnCecnX5qRk6WQE9ERAFBS3MB6OsUsVBifBJC/gGr0j9cW5y98N/yov23neXWhosGsySDWR1N1SOWcKQwyn6ndSCoBy21UEnTmnJyBQUiqRViBjTlVGZqY/XEhEor7m7lErbMgwQ5Egqab9n2JWQ+d2RPmUKCoWQEh0hQDSqmF8RsdK9EloLjN4ExIG7zYhRRYBrbFtlV5rE1SXd2QND9obrg==", "X-Forefront-Antispam-Report": "CIP:50.222.100.11; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:uww-mx01.datadirectnet.com; PTR:InfoDomainNonexistent;\n CAT:NONE;\n SFS:(13230022)(4636009)(136003)(346002)(376002)(39850400004)(396003)(451199015)(36840700001)(46966006)(2906002)(6916009)(316002)(40480700001)(82310400005)(186003)(1076003)(41300700001)(2616005)(70586007)(6666004)(81166007)(83380400001)(336012)(8936002)(8676002)(4326008)(5660300002)(47076005)(82740400003)(356005)(26005)(70206006)(36860700001)(86362001)(478600001)(6266002)(36756003)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "ddn.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "11 Oct 2022 14:08:57.3775 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 022a9063-48ec-4da8-f50a-08daab92237a", "X-MS-Exchange-CrossTenant-Id": "753b6e26-6fd3-43e6-8248-3f1735d59bb4", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=753b6e26-6fd3-43e6-8248-3f1735d59bb4; Ip=[50.222.100.11];\n Helo=[uww-mx01.datadirectnet.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM04FT019.eop-NAM04.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW5PR19MB5604", "X-Mailman-Approved-At": "Wed, 12 Oct 2022 10:42:19 +0200", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add code to read the virtual address width for AMD processors.\n\nSigned-off-by: Michael Piszczek <mpiszczek@ddn.com>\n---\n drivers/bus/pci/linux/pci.c | 48 ++++++++++++++++++++++++-------------\n 1 file changed, 32 insertions(+), 16 deletions(-)", "diff": "diff --git a/drivers/bus/pci/linux/pci.c b/drivers/bus/pci/linux/pci.c\nindex ebd1395502..cdac634e6c 100644\n--- a/drivers/bus/pci/linux/pci.c\n+++ b/drivers/bus/pci/linux/pci.c\n@@ -480,15 +480,18 @@ rte_pci_scan(void)\n }\n \n #if defined(RTE_ARCH_X86)\n+\n bool\n pci_device_iommu_support_va(const struct rte_pci_device *dev)\n {\n #define VTD_CAP_MGAW_SHIFT\t16\n #define VTD_CAP_MGAW_MASK\t(0x3fULL << VTD_CAP_MGAW_SHIFT)\n+#define RD_AMD_CAP_VASIZE_SHIFT 15\n+#define RD_AMD_CAP_VASIZE_MASK (0x7F << RD_AMD_CAP_VASIZE_SHIFT)\n \tconst struct rte_pci_addr *addr = &dev->addr;\n \tchar filename[PATH_MAX];\n \tFILE *fp;\n-\tuint64_t mgaw, vtd_cap_reg = 0;\n+\tuint64_t mgaw = 0, cap_reg = 0;\n \n \tsnprintf(filename, sizeof(filename),\n \t\t \"%s/\" PCI_PRI_FMT \"/iommu/intel-iommu/cap\",\n@@ -496,26 +499,39 @@ pci_device_iommu_support_va(const struct rte_pci_device *dev)\n \t\t addr->function);\n \n \tfp = fopen(filename, \"r\");\n-\tif (fp == NULL) {\n-\t\t/* We don't have an Intel IOMMU, assume VA supported */\n-\t\tif (errno == ENOENT)\n-\t\t\treturn true;\n-\n-\t\tRTE_LOG(ERR, EAL, \"%s(): can't open %s: %s\\n\",\n-\t\t\t__func__, filename, strerror(errno));\n-\t\treturn false;\n-\t}\n+\tif (fp != NULL) {\n+\t\t/* We have an Intel IOMMU */\n+\t\tif (fscanf(fp, \"%\" PRIx64, &cap_reg) != 1) {\n+\t\t\t RTE_LOG(ERR, EAL, \"%s(): can't read %s\\n\", __func__, filename);\n+\t\t\tfclose(fp);\n+\t\t\treturn false;\n+\t\t}\n \n-\t/* We have an Intel IOMMU */\n-\tif (fscanf(fp, \"%\" PRIx64, &vtd_cap_reg) != 1) {\n-\t\tRTE_LOG(ERR, EAL, \"%s(): can't read %s\\n\", __func__, filename);\n \t\tfclose(fp);\n-\t\treturn false;\n+\t\tmgaw = ((cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1;\n \t}\n+\telse {\n+\t\tsnprintf(filename, sizeof(filename),\n+\t\t\t \"%s/\" PCI_PRI_FMT \"/iommu/amd-iommu/cap\",\n+\t\t\t rte_pci_get_sysfs_path(), addr->domain, addr->bus, addr->devid,\n+\t\t\t addr->function);\n+\n+\t\tfp = fopen(filename, \"r\");\n+\t\tif (fp != NULL) {\n+\t\t\t/* We have an Amd IOMMU */\n+\t\t\tif (fscanf(fp, \"%\" PRIx64, &cap_reg) != 1) {\n+\t\t\t\t RTE_LOG(ERR, EAL, \"%s(): can't read %s\\n\", __func__, filename);\n+\t\t\t\tfclose(fp);\n+\t\t\t\treturn false;\n+\t\t\t}\n \n-\tfclose(fp);\n+\t\t\tfclose(fp);\n+\t\t\tmgaw = ((cap_reg & RD_AMD_CAP_VASIZE_MASK) >> RD_AMD_CAP_VASIZE_SHIFT) + 1;\n+\t\t}\n+\t}\n \n-\tmgaw = ((vtd_cap_reg & VTD_CAP_MGAW_MASK) >> VTD_CAP_MGAW_SHIFT) + 1;\n+\tif (mgaw == 0)\n+\t\treturn false;\n \n \t/*\n \t * Assuming there is no limitation by now. We can not know at this point\n", "prefixes": [ "v4" ] }