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GET /api/patches/117960/?format=api
http://patches.dpdk.org/api/patches/117960/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-23-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221012025346.204394-23-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221012025346.204394-23-hernan.vargas@intel.com", "date": "2022-10-12T02:53:38", "name": "[v3,22/30] baseband/acc100: add queue stop operation", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "26eb8e89390f8859f34662440fc529cc1cf59f2a", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-23-hernan.vargas@intel.com/mbox/", "series": [ { "id": 25150, "url": "http://patches.dpdk.org/api/series/25150/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25150", "date": "2022-10-12T02:53:16", "name": "baseband/acc100: changes for 22.11", "version": 3, "mbox": "http://patches.dpdk.org/series/25150/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117960/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117960/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1839AA0548;\n\tTue, 11 Oct 2022 20:59:35 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8B7BA42C24;\n\tTue, 11 Oct 2022 20:57:44 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id 78D4D42BD2\n for <dev@dpdk.org>; Tue, 11 Oct 2022 20:57:31 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Oct 2022 11:57:30 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga006.jf.intel.com with ESMTP; 11 Oct 2022 11:57:30 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665514651; x=1697050651;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=ENNoYvMv58VfHABF4ovgZHxqUuUq8mWWW8EghKG1AyI=;\n b=R5XPfuBFp4upjfCWXJFwWm59QQlNdDJp9QsJNh2IxQvVsdJEAPLBm7F8\n qy0VLMphrp0JgrbLYXEXYDGnS8soxjmZUbbsz1GF0AHnVKpHankIH1ayb\n +yvsxlaosNUJ1Dvli+7AefLn2dkUE6wxB/HhaWHVL7HVsqaYe2+GtAlBC\n fAAdiqjsy9KlnvAds8zPKl6KWm3MEcX3cT7W9hfHvKpQKgnBNfEdiTyn6\n SlxSb+cqbS+E96YJM3NGM1qfkU8/1J4lMC0rEnrA88KDb/tp0knSTbG3D\n 3K9TCLCYPFXmo437UWJGBCJ5BByT889qt2DK7BoFuFlnz8CaW+XQBP+Nw Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10497\"; a=\"284981656\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"284981656\"", "E=McAfee;i=\"6500,9779,10497\"; a=\"604261580\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"604261580\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>", "Subject": "[PATCH v3 22/30] baseband/acc100: add queue stop operation", "Date": "Tue, 11 Oct 2022 19:53:38 -0700", "Message-Id": "<20221012025346.204394-23-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20221012025346.204394-1-hernan.vargas@intel.com>", "References": "<20221012025346.204394-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implement new feature to stop queue operation.\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n\nReviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>\n---\n drivers/baseband/acc/rte_acc100_pmd.c | 60 +++++++++++++++++++++++++++\n 1 file changed, 60 insertions(+)", "diff": "diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c\nindex 936a417c3d..269d8295c2 100644\n--- a/drivers/baseband/acc/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc/rte_acc100_pmd.c\n@@ -791,6 +791,65 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \treturn 0;\n }\n \n+static inline void\n+acc100_print_op(struct rte_bbdev_dec_op *op, enum rte_bbdev_op_type op_type,\n+\t\tuint16_t index)\n+{\n+\tif (op == NULL)\n+\t\treturn;\n+\tif (op_type == RTE_BBDEV_OP_LDPC_DEC)\n+\t\trte_bbdev_log(DEBUG,\n+\t\t\t\" Op 5GUL %d %d %d %d %d %d %d %d %d %d %d %d\",\n+\t\t\tindex,\n+\t\t\top->ldpc_dec.basegraph, op->ldpc_dec.z_c,\n+\t\t\top->ldpc_dec.n_cb, op->ldpc_dec.q_m,\n+\t\t\top->ldpc_dec.n_filler, op->ldpc_dec.cb_params.e,\n+\t\t\top->ldpc_dec.op_flags, op->ldpc_dec.rv_index,\n+\t\t\top->ldpc_dec.iter_max, op->ldpc_dec.iter_count,\n+\t\t\top->ldpc_dec.harq_combined_input.length\n+\t\t\t);\n+\telse if (op_type == RTE_BBDEV_OP_LDPC_ENC) {\n+\t\tstruct rte_bbdev_enc_op *op_dl = (struct rte_bbdev_enc_op *) op;\n+\t\trte_bbdev_log(DEBUG,\n+\t\t\t\" Op 5GDL %d %d %d %d %d %d %d %d %d\",\n+\t\t\tindex,\n+\t\t\top_dl->ldpc_enc.basegraph, op_dl->ldpc_enc.z_c,\n+\t\t\top_dl->ldpc_enc.n_cb, op_dl->ldpc_enc.q_m,\n+\t\t\top_dl->ldpc_enc.n_filler, op_dl->ldpc_enc.cb_params.e,\n+\t\t\top_dl->ldpc_enc.op_flags, op_dl->ldpc_enc.rv_index\n+\t\t\t);\n+\t}\n+}\n+\n+static int\n+acc100_queue_stop(struct rte_bbdev *dev, uint16_t queue_id)\n+{\n+\tstruct acc_queue *q;\n+\tstruct rte_bbdev_dec_op *op;\n+\tuint16_t i;\n+\n+\tq = dev->data->queues[queue_id].queue_private;\n+\trte_bbdev_log(INFO, \"Queue Stop %d H/T/D %d %d %x OpType %d\",\n+\t\t\tqueue_id, q->sw_ring_head, q->sw_ring_tail,\n+\t\t\tq->sw_ring_depth, q->op_type);\n+\tfor (i = 0; i < q->sw_ring_depth; ++i) {\n+\t\top = (q->ring_addr + i)->req.op_addr;\n+\t\tacc100_print_op(op, q->op_type, i);\n+\t}\n+\t/* ignore all operations in flight and clear counters */\n+\tq->sw_ring_tail = q->sw_ring_head;\n+\tq->aq_enqueued = 0;\n+\tq->aq_dequeued = 0;\n+\tdev->data->queues[queue_id].queue_stats.enqueued_count = 0;\n+\tdev->data->queues[queue_id].queue_stats.dequeued_count = 0;\n+\tdev->data->queues[queue_id].queue_stats.enqueue_err_count = 0;\n+\tdev->data->queues[queue_id].queue_stats.dequeue_err_count = 0;\n+\tdev->data->queues[queue_id].queue_stats.enqueue_warn_count = 0;\n+\tdev->data->queues[queue_id].queue_stats.dequeue_warn_count = 0;\n+\n+\treturn 0;\n+}\n+\n /* Release ACC100 queue */\n static int\n acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)\n@@ -983,6 +1042,7 @@ static const struct rte_bbdev_ops acc100_bbdev_ops = {\n \t.info_get = acc100_dev_info_get,\n \t.queue_setup = acc100_queue_setup,\n \t.queue_release = acc100_queue_release,\n+\t.queue_stop = acc100_queue_stop,\n \t.queue_intr_enable = acc100_queue_intr_enable,\n \t.queue_intr_disable = acc100_queue_intr_disable\n };\n", "prefixes": [ "v3", "22/30" ] }{ "id": 117960, "url": "