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GET /api/patches/117913/?format=api
{ "id": 117913, "url": "http://patches.dpdk.org/api/patches/117913/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221011120135.45846-6-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221011120135.45846-6-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221011120135.45846-6-ndabilpuram@marvell.com", "date": "2022-10-11T12:01:28", "name": "[06/13] common/cnxk: fix schedule weight update", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "3450d6c7f40c9328796bfad294c2ee75668eee25", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221011120135.45846-6-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 25145, "url": "http://patches.dpdk.org/api/series/25145/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25145", "date": "2022-10-11T12:01:23", "name": "[01/13] common/cnxk: set MTU size on SDP based on SoC type", "version": 1, "mbox": "http://patches.dpdk.org/series/25145/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117913/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117913/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2A8EDA0545;\n\tTue, 11 Oct 2022 14:02:17 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D55D342DD2;\n\tTue, 11 Oct 2022 14:01:58 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 3AA5242DC9\n for <dev@dpdk.org>; Tue, 11 Oct 2022 14:01:57 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 29B1Na3x011947\n for <dev@dpdk.org>; Tue, 11 Oct 2022 05:01:56 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k40g4y28f-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 11 Oct 2022 05:01:56 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 11 Oct 2022 05:01:54 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 11 Oct 2022 05:01:54 -0700", "from localhost.localdomain (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 728D43F7050;\n Tue, 11 Oct 2022 05:01:52 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=YtdTGDvgveXp54zv+DFyzQzhFPSoiyGP7Vcve8QVuVI=;\n b=V3RzWuraPBg0kJhk/U7ONI6+34L87dgOUcT2QjMZnL+1Ez3RPnzjiNKSvUZ/ODnOGIof\n Ty+Qk0qROwhdJj6+7fIKBdcmtSARkJnYKORKp2VhiI9lrdvsnel5h9lwGdLE6qz1flvo\n fMfFWWNhFyS/qDkX3FsvtjbOFevFjmL4BruLCB0JenYU2oz/uknLLoiu5ixSW5tqcW8V\n 9+4OdgkKEzucwW4pBtGA4X6oXteUjeATPC33NaHdRb4Hru9nc4muYglwClHMRjRcc9rS\n jFB2rHxvTwwm2/VM6UBZ8D2arx/398msjdIZ+ecYQssx4BrxpmFN49l02hmYLEOKV+ol Yg==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 06/13] common/cnxk: fix schedule weight update", "Date": "Tue, 11 Oct 2022 17:31:28 +0530", "Message-ID": "<20221011120135.45846-6-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221011120135.45846-1-ndabilpuram@marvell.com>", "References": "<20221011120135.45846-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "RloxdkB4qkdn4alNbf1OKyQbrEhqMFG2", "X-Proofpoint-GUID": "RloxdkB4qkdn4alNbf1OKyQbrEhqMFG2", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-11_07,2022-10-11_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Satha Rao <skoteshwar@marvell.com>\n\nEach TX schedule config mail box supports maximum 20 register updates.\nThis patch will send node weight updates in multiple mailbox when\nTM created with more than 20 scheduler nodes.\n\nFixes: 464c9f919321 (\"common/cnxk: support NIX TM dynamic update\")\nCc: ndabilpuram@marvell.com\n\nSigned-off-by: Satha Rao <skoteshwar@marvell.com>\n---\n drivers/common/cnxk/roc_nix_queue.c | 2 +-\n drivers/common/cnxk/roc_nix_tm_ops.c | 60 ++++++++++++++++++----------\n 2 files changed, 41 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c\nindex 405d9a8274..7f001efbb0 100644\n--- a/drivers/common/cnxk/roc_nix_queue.c\n+++ b/drivers/common/cnxk/roc_nix_queue.c\n@@ -810,7 +810,7 @@ sqb_pool_populate(struct roc_nix *roc_nix, struct roc_nix_sq *sq)\n \tnb_sqb_bufs += NIX_SQB_LIST_SPACE;\n \t/* Clamp up the SQB count */\n \tnb_sqb_bufs = PLT_MIN(roc_nix->max_sqb_count,\n-\t\t\t PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));\n+\t\t\t (uint16_t)PLT_MAX(NIX_DEF_SQB, nb_sqb_bufs));\n \n \tsq->nb_sqb_bufs = nb_sqb_bufs;\n \tsq->sqes_per_sqb_log2 = (uint16_t)plt_log2_u32(sqes_per_sqb);\ndiff --git a/drivers/common/cnxk/roc_nix_tm_ops.c b/drivers/common/cnxk/roc_nix_tm_ops.c\nindex 7036495ad8..4bf7b1e104 100644\n--- a/drivers/common/cnxk/roc_nix_tm_ops.c\n+++ b/drivers/common/cnxk/roc_nix_tm_ops.c\n@@ -891,19 +891,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix, uint32_t node_id,\n \t\tTAILQ_FOREACH(sibling, list, node) {\n \t\t\tif (sibling->parent != node->parent)\n \t\t\t\tcontinue;\n-\t\t\tk += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k],\n-\t\t\t\t\t\t &req->regval[k]);\n+\t\t\tk += nix_tm_sw_xoff_prep(sibling, true, &req->reg[k], &req->regval[k]);\n+\t\t\tif (k >= MAX_REGS_PER_MBOX_MSG) {\n+\t\t\t\treq->num_regs = k;\n+\t\t\t\trc = mbox_process(mbox);\n+\t\t\t\tif (rc)\n+\t\t\t\t\treturn rc;\n+\t\t\t\tk = 0;\n+\t\t\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n+\t\t\t\treq->lvl = node->hw_lvl;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (k) {\n+\t\t\treq->num_regs = k;\n+\t\t\trc = mbox_process(mbox);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t\t/* Update new weight for current node */\n+\t\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n \t\t}\n-\t\treq->num_regs = k;\n-\t\trc = mbox_process(mbox);\n-\t\tif (rc)\n-\t\t\treturn rc;\n \n-\t\t/* Update new weight for current node */\n-\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n \t\treq->lvl = node->hw_lvl;\n-\t\treq->num_regs =\n-\t\t\tnix_tm_sched_reg_prep(nix, node, req->reg, req->regval);\n+\t\treq->num_regs = nix_tm_sched_reg_prep(nix, node, req->reg, req->regval);\n \t\trc = mbox_process(mbox);\n \t\tif (rc)\n \t\t\treturn rc;\n@@ -916,19 +926,29 @@ roc_nix_tm_node_parent_update(struct roc_nix *roc_nix, uint32_t node_id,\n \t\tTAILQ_FOREACH(sibling, list, node) {\n \t\t\tif (sibling->parent != node->parent)\n \t\t\t\tcontinue;\n-\t\t\tk += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k],\n-\t\t\t\t\t\t &req->regval[k]);\n+\t\t\tk += nix_tm_sw_xoff_prep(sibling, false, &req->reg[k], &req->regval[k]);\n+\t\t\tif (k >= MAX_REGS_PER_MBOX_MSG) {\n+\t\t\t\treq->num_regs = k;\n+\t\t\t\trc = mbox_process(mbox);\n+\t\t\t\tif (rc)\n+\t\t\t\t\treturn rc;\n+\t\t\t\tk = 0;\n+\t\t\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n+\t\t\t\treq->lvl = node->hw_lvl;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (k) {\n+\t\t\treq->num_regs = k;\n+\t\t\trc = mbox_process(mbox);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\t\t\t/* XON Parent node */\n+\t\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n \t\t}\n-\t\treq->num_regs = k;\n-\t\trc = mbox_process(mbox);\n-\t\tif (rc)\n-\t\t\treturn rc;\n \n-\t\t/* XON Parent node */\n-\t\treq = mbox_alloc_msg_nix_txschq_cfg(mbox);\n \t\treq->lvl = node->parent->hw_lvl;\n-\t\treq->num_regs = nix_tm_sw_xoff_prep(node->parent, false,\n-\t\t\t\t\t\t req->reg, req->regval);\n+\t\treq->num_regs = nix_tm_sw_xoff_prep(node->parent, false, req->reg, req->regval);\n \t\trc = mbox_process(mbox);\n \t\tif (rc)\n \t\t\treturn rc;\n", "prefixes": [ "06/13" ] }