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GET /api/patches/117911/?format=api
{ "id": 117911, "url": "http://patches.dpdk.org/api/patches/117911/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221011120135.45846-4-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221011120135.45846-4-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221011120135.45846-4-ndabilpuram@marvell.com", "date": "2022-10-11T12:01:26", "name": "[04/13] net/cnxk: add use nixtx offset for cn10kb", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6d92ccdeaae570379cd2624e7909ba2d6c206b04", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221011120135.45846-4-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 25145, "url": "http://patches.dpdk.org/api/series/25145/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25145", "date": "2022-10-11T12:01:23", "name": "[01/13] common/cnxk: set MTU size on SDP based on SoC type", "version": 1, "mbox": "http://patches.dpdk.org/series/25145/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117911/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117911/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C9BE8A0545;\n\tTue, 11 Oct 2022 14:02:00 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9790E42DBC;\n\tTue, 11 Oct 2022 14:01:54 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 93FAE42DC5\n for <dev@dpdk.org>; Tue, 11 Oct 2022 14:01:52 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 29BA1uXZ023773\n for <dev@dpdk.org>; Tue, 11 Oct 2022 05:01:52 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k40g4y273-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 11 Oct 2022 05:01:51 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 11 Oct 2022 05:01:49 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Tue, 11 Oct 2022 05:01:49 -0700", "from localhost.localdomain (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id E62053F7055;\n Tue, 11 Oct 2022 05:01:46 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=I1fTQdRJH8S8KaNWw2l/gDsAT/qzzMhGLaENnML2FJQ=;\n b=NV7rFMYlUZFALlz6vacPMG6CJq/HUh6FFgfv0yf0Uu5MbxLzdIFIanEzFaeZolDUkezx\n nlfzwe7iwTa2hC4H0Fiu2Z4MWCp8bfposN62qUTPQPkPEQIeopdkmIeltjocmYCp7Pnt\n OIbp2zF6+2RQJorTATJkb/lZ/6QbV+1TaqjCrA8ii8nYG54IwDxSOnJo8N8zCeEfl4xw\n 17IL6+FJaV0eJVLFTYqobfwwt9oW2jkCtC6l3LY6L90Izkk9NanKgVVGdCkMcb2vsO+6\n PeN5p32jsKUavKG1iEIY+knIxhxdEScoxH/9AEONoNNjHqvkLs37uRDbZ+aJoYeRedx0 eA==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>,\n \"Shijith Thotton\" <sthotton@marvell.com>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 04/13] net/cnxk: add use nixtx offset for cn10kb", "Date": "Tue, 11 Oct 2022 17:31:26 +0530", "Message-ID": "<20221011120135.45846-4-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20221011120135.45846-1-ndabilpuram@marvell.com>", "References": "<20221011120135.45846-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "gEnqNqbjHf1RfwlUSiRIn8NYqueE_XFJ", "X-Proofpoint-GUID": "gEnqNqbjHf1RfwlUSiRIn8NYqueE_XFJ", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-11_07,2022-10-11_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "In outbound inline case, use NIX Tx offset instead of\nNIX Tx address for CN103XX as per new instruction format.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/roc_constants.h | 1 +\n drivers/event/cnxk/cn10k_worker.h | 3 +++\n drivers/net/cnxk/cn10k_ethdev.c | 6 ++++++\n drivers/net/cnxk/cn10k_ethdev.h | 3 ++-\n drivers/net/cnxk/cn10k_ethdev_sec.c | 2 ++\n drivers/net/cnxk/cn10k_tx.h | 4 ++--\n 6 files changed, 16 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_constants.h b/drivers/common/cnxk/roc_constants.h\nindex c693dde62e..0495965daa 100644\n--- a/drivers/common/cnxk/roc_constants.h\n+++ b/drivers/common/cnxk/roc_constants.h\n@@ -12,6 +12,7 @@\n /* [CN10K, .) */\n #define ROC_LMT_LINE_SZ\t\t 128\n #define ROC_NUM_LMT_LINES\t 2048\n+#define ROC_LMT_LINES_PER_STR_LOG2 4\n #define ROC_LMT_LINES_PER_CORE_LOG2 5\n #define ROC_LMT_LINE_SIZE_LOG2\t 7\n #define ROC_LMT_BASE_PER_CORE_LOG2 \\\ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex 7a82dd352a..75a2ff244a 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -595,6 +595,9 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd,\n \t\tws->gw_rdata = roc_sso_hws_head_wait(ws->base);\n \n \tcn10k_sso_txq_fc_wait(txq);\n+\tif (flags & NIX_TX_OFFLOAD_SECURITY_F && sec)\n+\t\tcn10k_nix_sec_fc_wait_one(txq);\n+\n \troc_lmt_submit_steorl(lmt_id, pa);\n \n \tif (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.c b/drivers/net/cnxk/cn10k_ethdev.c\nindex e8faeebe1f..cf1d9b164d 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.c\n+++ b/drivers/net/cnxk/cn10k_ethdev.c\n@@ -538,6 +538,9 @@ cn10k_nix_reassembly_capability_get(struct rte_eth_dev *eth_dev,\n \tint rc = -ENOTSUP;\n \tRTE_SET_USED(eth_dev);\n \n+\tif (!roc_nix_has_reass_support(&dev->nix))\n+\t\treturn -ENOTSUP;\n+\n \tif (dev->rx_offloads & RTE_ETH_RX_OFFLOAD_SECURITY) {\n \t\treassembly_capa->timeout_ms = 60 * 1000;\n \t\treassembly_capa->max_frags = 4;\n@@ -565,6 +568,9 @@ cn10k_nix_reassembly_conf_set(struct rte_eth_dev *eth_dev,\n \tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n \tint rc = 0;\n \n+\tif (!roc_nix_has_reass_support(&dev->nix))\n+\t\treturn -ENOTSUP;\n+\n \tif (!conf->flags) {\n \t\t/* Clear offload flags on disable */\n \t\tdev->rx_offload_flags &= ~NIX_RX_REAS_F;\ndiff --git a/drivers/net/cnxk/cn10k_ethdev.h b/drivers/net/cnxk/cn10k_ethdev.h\nindex d0a5b136e3..948c8348ad 100644\n--- a/drivers/net/cnxk/cn10k_ethdev.h\n+++ b/drivers/net/cnxk/cn10k_ethdev.h\n@@ -75,7 +75,8 @@ struct cn10k_sec_sess_priv {\n \t\t\tuint16_t partial_len : 10;\n \t\t\tuint16_t chksum : 2;\n \t\t\tuint16_t dec_ttl : 1;\n-\t\t\tuint16_t rsvd : 3;\n+\t\t\tuint16_t nixtx_off : 1;\n+\t\t\tuint16_t rsvd : 2;\n \t\t};\n \n \t\tuint64_t u64;\ndiff --git a/drivers/net/cnxk/cn10k_ethdev_sec.c b/drivers/net/cnxk/cn10k_ethdev_sec.c\nindex 6de4a284da..3ca707f038 100644\n--- a/drivers/net/cnxk/cn10k_ethdev_sec.c\n+++ b/drivers/net/cnxk/cn10k_ethdev_sec.c\n@@ -798,6 +798,8 @@ cn10k_eth_sec_session_create(void *device,\n \t\tsess_priv.chksum = (!ipsec->options.ip_csum_enable << 1 |\n \t\t\t\t !ipsec->options.l4_csum_enable);\n \t\tsess_priv.dec_ttl = ipsec->options.dec_ttl;\n+\t\tif (roc_model_is_cn10kb_a0())\n+\t\t\tsess_priv.nixtx_off = 1;\n \n \t\t/* Pointer from eth_sec -> outb_sa */\n \t\teth_sec->sa = outb_sa;\ndiff --git a/drivers/net/cnxk/cn10k_tx.h b/drivers/net/cnxk/cn10k_tx.h\nindex 492942de15..527b65022f 100644\n--- a/drivers/net/cnxk/cn10k_tx.h\n+++ b/drivers/net/cnxk/cn10k_tx.h\n@@ -397,7 +397,7 @@ cn10k_nix_prep_sec_vec(struct rte_mbuf *m, uint64x2_t *cmd0, uint64x2_t *cmd1,\n \t\t/* DLEN passed is excluding L2 HDR */\n \t\tpkt_len -= l2_len;\n \t}\n-\tw0 |= nixtx;\n+\tw0 |= sess_priv.nixtx_off ? ((((int64_t)nixtx - (int64_t)dptr) & 0xFFFFF) << 32) : nixtx;\n \t/* CPT word 0 and 1 */\n \tcmd01 = vdupq_n_u64(0);\n \tcmd01 = vsetq_lane_u64(w0, cmd01, 0);\n@@ -539,7 +539,7 @@ cn10k_nix_prep_sec(struct rte_mbuf *m, uint64_t *cmd, uintptr_t *nixtx_addr,\n \t\tsg->seg1_size = pkt_len + dlen_adj;\n \t\tpkt_len -= l2_len;\n \t}\n-\tw0 |= nixtx;\n+\tw0 |= sess_priv.nixtx_off ? ((((int64_t)nixtx - (int64_t)dptr) & 0xFFFFF) << 32) : nixtx;\n \t/* CPT word 0 and 1 */\n \tcmd01 = vdupq_n_u64(0);\n \tcmd01 = vsetq_lane_u64(w0, cmd01, 0);\n", "prefixes": [ "04/13" ] }