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GET /api/patches/117562/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 117562,
    "url": "http://patches.dpdk.org/api/patches/117562/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221007134653.929034-4-ciara.power@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221007134653.929034-4-ciara.power@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221007134653.929034-4-ciara.power@intel.com",
    "date": "2022-10-07T13:46:52",
    "name": "[v5,3/4] test/crypto: add OOP snow3g SGL tests",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "b818187d1981f3479a12557169662083ba4a1648",
    "submitter": {
        "id": 978,
        "url": "http://patches.dpdk.org/api/people/978/?format=api",
        "name": "Power, Ciara",
        "email": "ciara.power@intel.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221007134653.929034-4-ciara.power@intel.com/mbox/",
    "series": [
        {
            "id": 25030,
            "url": "http://patches.dpdk.org/api/series/25030/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25030",
            "date": "2022-10-07T13:46:49",
            "name": "add remaining SGL support to AESNI_MB",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/25030/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/117562/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/117562/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 98C96A00C3;\n\tFri,  7 Oct 2022 15:47:24 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CFB2E42B94;\n\tFri,  7 Oct 2022 15:47:11 +0200 (CEST)",
            "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 3747742B87\n for <dev@dpdk.org>; Fri,  7 Oct 2022 15:47:10 +0200 (CEST)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Oct 2022 06:47:09 -0700",
            "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.163])\n by orsmga002.jf.intel.com with ESMTP; 07 Oct 2022 06:47:07 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665150430; x=1696686430;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=1WbWQuWaOoytZmRacVfIyjqesTcPWB0XM127f5tG4SM=;\n b=EjXuJaCOjdZkGUgToo89xqES+4xylafNVDngrGPPFFwjIE2Fe/c+UYWj\n D+T/xWZFNfKLAhWzhaMETA3IPN7502lQUWiT9DsB1JlihTRgyF24p8tVi\n 0cF0gZGpWVO7qCzqio6MrFIQInEJYqEJ+u7IGzUGXePraaVKlNrdoERwL\n +Ccs/KO2Fnr9yukcjK9AdAQExL9837v0IrJs8ITl2ycC/QwtN7aTgHkvh\n so/knxKF7B7mFsJC9jV3mPEgwQFjhvq91ViTcj3b1P6PKDQx2f0uH7RkF\n ypSPlAP25FuaxcGpkVaL4V/v7P9QYKrLTtzxiQUl2mGgd5An4krsFUGUB g==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10493\"; a=\"390032324\"",
            "E=Sophos;i=\"5.95,166,1661842800\"; d=\"scan'208\";a=\"390032324\"",
            "E=McAfee;i=\"6500,9779,10493\"; a=\"625150233\"",
            "E=Sophos;i=\"5.95,166,1661842800\"; d=\"scan'208\";a=\"625150233\""
        ],
        "X-ExtLoop1": "1",
        "From": "Ciara Power <ciara.power@intel.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>,\n\tFan Zhang <royzhang1980@gmail.com>",
        "Cc": "dev@dpdk.org, kai.ji@intel.com, Ciara Power <ciara.power@intel.com>,\n Fan Zhang <roy.fan.zhang@intel.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>",
        "Subject": "[PATCH v5 3/4] test/crypto: add OOP snow3g SGL tests",
        "Date": "Fri,  7 Oct 2022 13:46:52 +0000",
        "Message-Id": "<20221007134653.929034-4-ciara.power@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221007134653.929034-1-ciara.power@intel.com>",
        "References": "<20220812132334.75707-1-ciara.power@intel.com>\n <20221007134653.929034-1-ciara.power@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "More tests are added to test variations of OOP SGL for snow3g.\nThis includes LB_IN_SGL_OUT and SGL_IN_LB_OUT.\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\nAcked-by: Fan Zhang <roy.fan.zhang@intel.com>\nAcked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>\n---\n app/test/test_cryptodev.c | 48 +++++++++++++++++++++++++++++++--------\n 1 file changed, 39 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex 203b8b61fa..c2b33686ed 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -4299,7 +4299,8 @@ test_snow3g_encryption_oop(const struct snow3g_test_data *tdata)\n }\n \n static int\n-test_snow3g_encryption_oop_sgl(const struct snow3g_test_data *tdata)\n+test_snow3g_encryption_oop_sgl(const struct snow3g_test_data *tdata,\n+\t\tuint8_t sgl_in, uint8_t sgl_out)\n {\n \tstruct crypto_testsuite_params *ts_params = &testsuite_params;\n \tstruct crypto_unittest_params *ut_params = &unittest_params;\n@@ -4330,9 +4331,12 @@ test_snow3g_encryption_oop_sgl(const struct snow3g_test_data *tdata)\n \n \tuint64_t feat_flags = dev_info.feature_flags;\n \n-\tif (!(feat_flags & RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT)) {\n-\t\tprintf(\"Device doesn't support out-of-place scatter-gather \"\n-\t\t\t\t\"in both input and output mbufs. \"\n+\tif (((sgl_in && sgl_out) && !(feat_flags & RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT))\n+\t\t\t|| ((!sgl_in && sgl_out) &&\n+\t\t\t!(feat_flags & RTE_CRYPTODEV_FF_OOP_LB_IN_SGL_OUT))\n+\t\t\t|| ((sgl_in && !sgl_out) &&\n+\t\t\t!(feat_flags & RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT))) {\n+\t\tprintf(\"Device doesn't support out-of-place scatter gather type. \"\n \t\t\t\t\"Test Skipped.\\n\");\n \t\treturn TEST_SKIPPED;\n \t}\n@@ -4357,10 +4361,21 @@ test_snow3g_encryption_oop_sgl(const struct snow3g_test_data *tdata)\n \t/* the algorithms block size */\n \tplaintext_pad_len = RTE_ALIGN_CEIL(plaintext_len, 16);\n \n-\tut_params->ibuf = create_segmented_mbuf(ts_params->mbuf_pool,\n-\t\t\tplaintext_pad_len, 10, 0);\n-\tut_params->obuf = create_segmented_mbuf(ts_params->mbuf_pool,\n-\t\t\tplaintext_pad_len, 3, 0);\n+\tif (sgl_in)\n+\t\tut_params->ibuf = create_segmented_mbuf(ts_params->mbuf_pool,\n+\t\t\t\tplaintext_pad_len, 10, 0);\n+\telse {\n+\t\tut_params->ibuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);\n+\t\trte_pktmbuf_append(ut_params->ibuf, plaintext_pad_len);\n+\t}\n+\n+\tif (sgl_out)\n+\t\tut_params->obuf = create_segmented_mbuf(ts_params->mbuf_pool,\n+\t\t\t\tplaintext_pad_len, 3, 0);\n+\telse {\n+\t\tut_params->obuf = rte_pktmbuf_alloc(ts_params->mbuf_pool);\n+\t\trte_pktmbuf_append(ut_params->obuf, plaintext_pad_len);\n+\t}\n \n \tTEST_ASSERT_NOT_NULL(ut_params->ibuf,\n \t\t\t\"Failed to allocate input buffer in mempool\");\n@@ -6714,9 +6729,20 @@ test_snow3g_encryption_test_case_1_oop(void)\n static int\n test_snow3g_encryption_test_case_1_oop_sgl(void)\n {\n-\treturn test_snow3g_encryption_oop_sgl(&snow3g_test_case_1);\n+\treturn test_snow3g_encryption_oop_sgl(&snow3g_test_case_1, 1, 1);\n+}\n+\n+static int\n+test_snow3g_encryption_test_case_1_oop_lb_in_sgl_out(void)\n+{\n+\treturn test_snow3g_encryption_oop_sgl(&snow3g_test_case_1, 0, 1);\n }\n \n+static int\n+test_snow3g_encryption_test_case_1_oop_sgl_in_lb_out(void)\n+{\n+\treturn test_snow3g_encryption_oop_sgl(&snow3g_test_case_1, 1, 0);\n+}\n \n static int\n test_snow3g_encryption_test_case_1_offset_oop(void)\n@@ -15842,6 +15868,10 @@ static struct unit_test_suite cryptodev_snow3g_testsuite  = {\n \t\t\ttest_snow3g_encryption_test_case_1_oop),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n \t\t\ttest_snow3g_encryption_test_case_1_oop_sgl),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_snow3g_encryption_test_case_1_oop_lb_in_sgl_out),\n+\t\tTEST_CASE_ST(ut_setup, ut_teardown,\n+\t\t\ttest_snow3g_encryption_test_case_1_oop_sgl_in_lb_out),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n \t\t\ttest_snow3g_encryption_test_case_1_offset_oop),\n \t\tTEST_CASE_ST(ut_setup, ut_teardown,\n",
    "prefixes": [
        "v5",
        "3/4"
    ]
}