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GET /api/patches/116733/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 116733,
    "url": "http://patches.dpdk.org/api/patches/116733/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220923093829.3019525-10-junfeng.guo@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220923093829.3019525-10-junfeng.guo@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220923093829.3019525-10-junfeng.guo@intel.com",
    "date": "2022-09-23T09:38:29",
    "name": "[v3,9/9] net/gve: add stats support",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "ef6f9e34e5209cd5dfe8305da0df848e53364ac7",
    "submitter": {
        "id": 1785,
        "url": "http://patches.dpdk.org/api/people/1785/?format=api",
        "name": "Junfeng Guo",
        "email": "junfeng.guo@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220923093829.3019525-10-junfeng.guo@intel.com/mbox/",
    "series": [
        {
            "id": 24800,
            "url": "http://patches.dpdk.org/api/series/24800/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24800",
            "date": "2022-09-23T09:38:20",
            "name": "introduce GVE PMD",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/24800/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/116733/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/116733/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0AF48A0544;\n\tFri, 23 Sep 2022 11:40:21 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 83A9242BC4;\n\tFri, 23 Sep 2022 11:39:37 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 8EFDF42BBF\n for <dev@dpdk.org>; Fri, 23 Sep 2022 11:39:35 +0200 (CEST)",
            "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Sep 2022 02:39:35 -0700",
            "from dpdk-jf-ntb-one.sh.intel.com ([10.67.111.104])\n by orsmga008.jf.intel.com with ESMTP; 23 Sep 2022 02:39:32 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1663925975; x=1695461975;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=G+wyKHcd3EiLrGxcRZQJb6xgQ9WdGy6KR+zzGOiPV0c=;\n b=cGyMGRO8yggiWzDb4authsZMDF0zEQSyGS7+0150X4Wsh/0O1lv6C8HG\n kBJbPg7Zz3aPMRlG4ocer4910hlzvI9q8+V2v52+n4+sobZMIpoQ8lmue\n NE2SbU+wob4kJLrE88zAgdRXcuLUK81shyNsyEGvV6Xv3Ujv0Fm7tE79v\n TXUwxclNXxIBZ5j+8CpM2d1KdHRwNeiHkICkpH+78AVBJOKQgus8rGOry\n CnGMOYsWUJhmAQShY3OKRRGlxvbVBTZ3Tc983a/2gptINtTWq2SWwCvY0\n niPK8L0EFxC5ggsLz7NRps7b3zkaFHH9fHp1mWSVD0Odzr8lbXLC11VDq g==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10478\"; a=\"326885939\"",
            "E=Sophos;i=\"5.93,337,1654585200\"; d=\"scan'208\";a=\"326885939\"",
            "E=Sophos;i=\"5.93,337,1654585200\"; d=\"scan'208\";a=\"650891208\""
        ],
        "X-ExtLoop1": "1",
        "From": "Junfeng Guo <junfeng.guo@intel.com>",
        "To": "qi.z.zhang@intel.com,\n\tjingjing.wu@intel.com",
        "Cc": "ferruh.yigit@xilinx.com, dev@dpdk.org, xiaoyun.li@intel.com,\n awogbemila@google.com, bruce.richardson@intel.com, xueqin.lin@intel.com,\n junfeng.guo@intel.com",
        "Subject": "[PATCH v3 9/9] net/gve: add stats support",
        "Date": "Fri, 23 Sep 2022 17:38:29 +0800",
        "Message-Id": "<20220923093829.3019525-10-junfeng.guo@intel.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20220923093829.3019525-1-junfeng.guo@intel.com>",
        "References": "<20220829084127.934183-11-junfeng.guo@intel.com>\n <20220923093829.3019525-1-junfeng.guo@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Update stats add support of dev_ops stats_get/reset.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\nSigned-off-by: Junfeng Guo <junfeng.guo@intel.com>\n---\n doc/guides/nics/features/gve.ini |  2 +\n drivers/net/gve/gve_ethdev.c     | 71 ++++++++++++++++++++++++++++++++\n drivers/net/gve/gve_ethdev.h     | 12 ++++++\n drivers/net/gve/gve_rx.c         | 15 ++++++-\n drivers/net/gve/gve_tx.c         | 13 ++++++\n 5 files changed, 111 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/features/gve.ini b/doc/guides/nics/features/gve.ini\nindex cdc46b08a3..180408aa80 100644\n--- a/doc/guides/nics/features/gve.ini\n+++ b/doc/guides/nics/features/gve.ini\n@@ -10,6 +10,8 @@ MTU update           = Y\n TSO                  = Y\n RSS hash             = Y\n L4 checksum offload  = Y\n+Basic stats          = Y\n+Stats per queue      = Y\n Linux                = Y\n x86-32               = Y\n x86-64               = Y\ndiff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c\nindex e3195376c4..7730835ed5 100644\n--- a/drivers/net/gve/gve_ethdev.c\n+++ b/drivers/net/gve/gve_ethdev.c\n@@ -328,6 +328,75 @@ gve_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \treturn 0;\n }\n \n+static int\n+gve_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n+{\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\tstruct gve_tx_queue *txq = dev->data->tx_queues[i];\n+\t\tif (txq == NULL)\n+\t\t\tcontinue;\n+\n+\t\tstats->opackets += txq->packets;\n+\t\tstats->obytes += txq->bytes;\n+\t\tstats->oerrors += txq->errors;\n+\n+\t\tif (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) {\n+\t\t\tstats->q_opackets[i] = txq->packets;\n+\t\t\tstats->q_obytes[i] = txq->bytes;\n+\t\t}\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\tstruct gve_rx_queue *rxq = dev->data->rx_queues[i];\n+\t\tif (rxq == NULL)\n+\t\t\tcontinue;\n+\n+\t\tstats->ipackets += rxq->packets;\n+\t\tstats->ibytes += rxq->bytes;\n+\t\tstats->ierrors += rxq->errors;\n+\t\tstats->rx_nombuf += rxq->no_mbufs;\n+\n+\t\tif (i < RTE_ETHDEV_QUEUE_STAT_CNTRS) {\n+\t\t\tstats->q_ipackets[i] = rxq->packets;\n+\t\t\tstats->q_ibytes[i] = rxq->bytes;\n+\t\t\tstats->q_errors[i] = rxq->errors;\n+\t\t}\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+gve_dev_stats_reset(struct rte_eth_dev *dev)\n+{\n+\tuint16_t i;\n+\n+\tfor (i = 0; i < dev->data->nb_tx_queues; i++) {\n+\t\tstruct gve_tx_queue *txq = dev->data->tx_queues[i];\n+\t\tif (txq == NULL)\n+\t\t\tcontinue;\n+\n+\t\ttxq->packets  = 0;\n+\t\ttxq->bytes = 0;\n+\t\ttxq->errors = 0;\n+\t}\n+\n+\tfor (i = 0; i < dev->data->nb_rx_queues; i++) {\n+\t\tstruct gve_rx_queue *rxq = dev->data->rx_queues[i];\n+\t\tif (rxq == NULL)\n+\t\t\tcontinue;\n+\n+\t\trxq->packets  = 0;\n+\t\trxq->bytes = 0;\n+\t\trxq->no_mbufs = 0;\n+\t\trxq->errors = 0;\n+\t}\n+\n+\treturn 0;\n+}\n+\n static int\n gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)\n {\n@@ -365,6 +434,8 @@ static const struct eth_dev_ops gve_eth_dev_ops = {\n \t.rx_queue_setup       = gve_rx_queue_setup,\n \t.tx_queue_setup       = gve_tx_queue_setup,\n \t.link_update          = gve_link_update,\n+\t.stats_get            = gve_dev_stats_get,\n+\t.stats_reset          = gve_dev_stats_reset,\n \t.mtu_set              = gve_dev_mtu_set,\n };\n \ndiff --git a/drivers/net/gve/gve_ethdev.h b/drivers/net/gve/gve_ethdev.h\nindex 0624085517..a07c438b5d 100644\n--- a/drivers/net/gve/gve_ethdev.h\n+++ b/drivers/net/gve/gve_ethdev.h\n@@ -76,6 +76,11 @@ struct gve_tx_queue {\n \tstruct gve_queue_page_list *qpl;\n \tstruct gve_tx_iovec *iov_ring;\n \n+\t/* Stats */\n+\tuint64_t errors;\n+\tuint64_t packets;\n+\tuint64_t bytes;\n+\n \tuint16_t port_id;\n \tuint16_t queue_id;\n \n@@ -114,6 +119,12 @@ struct gve_rx_queue {\n \t/* only valid for GQI_QPL queue format */\n \tstruct gve_queue_page_list *qpl;\n \n+\t/* stats */\n+\tuint64_t no_mbufs;\n+\tuint64_t errors;\n+\tuint64_t packets;\n+\tuint64_t bytes;\n+\n \tstruct gve_priv *hw;\n \tconst struct rte_memzone *qres_mz;\n \tstruct gve_queue_resources *qres;\n@@ -125,6 +136,7 @@ struct gve_rx_queue {\n \n \t/* Only valid for DQO_RDA queue format */\n \tstruct gve_rx_queue *bufq;\n+\n \tuint8_t is_gqi_qpl;\n };\n \ndiff --git a/drivers/net/gve/gve_rx.c b/drivers/net/gve/gve_rx.c\nindex e29f979a4e..8d3ee35472 100644\n--- a/drivers/net/gve/gve_rx.c\n+++ b/drivers/net/gve/gve_rx.c\n@@ -26,8 +26,10 @@ gve_rx_refill(struct gve_rx_queue *rxq)\n \t\t\t\t\tbreak;\n \t\t\t\trxq->sw_ring[idx + i] = nmb;\n \t\t\t}\n-\t\t\tif (i != nb_alloc)\n+\t\t\tif (i != nb_alloc) {\n+\t\t\t\trxq->no_mbufs += nb_alloc - i;\n \t\t\t\tnb_alloc = i;\n+\t\t\t}\n \t\t}\n \t\trxq->nb_avail -= nb_alloc;\n \t\tnext_avail += nb_alloc;\n@@ -88,6 +90,7 @@ gve_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \tuint16_t rx_id = rxq->rx_tail;\n \tstruct rte_mbuf *rxe;\n \tuint16_t nb_rx, len;\n+\tuint64_t bytes = 0;\n \tuint64_t addr;\n \n \trxr = rxq->rx_desc_ring;\n@@ -97,8 +100,10 @@ gve_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\tif (GVE_SEQNO(rxd->flags_seq) != rxq->expected_seqno)\n \t\t\tbreak;\n \n-\t\tif (rxd->flags_seq & GVE_RXF_ERR)\n+\t\tif (rxd->flags_seq & GVE_RXF_ERR) {\n+\t\t\trxq->errors++;\n \t\t\tcontinue;\n+\t\t}\n \n \t\tlen = rte_be_to_cpu_16(rxd->len) - GVE_RX_PAD;\n \t\trxe = rxq->sw_ring[rx_id];\n@@ -137,6 +142,7 @@ gve_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \t\t\trx_id = 0;\n \n \t\trx_pkts[nb_rx] = rxe;\n+\t\tbytes += len;\n \t}\n \n \trxq->nb_avail += nb_rx;\n@@ -145,6 +151,11 @@ gve_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n \tif (rxq->nb_avail > rxq->free_thresh)\n \t\tgve_rx_refill(rxq);\n \n+\tif (nb_rx) {\n+\t\trxq->packets += nb_rx;\n+\t\trxq->bytes += bytes;\n+\t}\n+\n \treturn nb_rx;\n }\n \ndiff --git a/drivers/net/gve/gve_tx.c b/drivers/net/gve/gve_tx.c\nindex 6196c29e24..81778840cf 100644\n--- a/drivers/net/gve/gve_tx.c\n+++ b/drivers/net/gve/gve_tx.c\n@@ -260,6 +260,7 @@ gve_tx_burst_qpl(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tstruct rte_mbuf *tx_pkt, *first;\n \tuint16_t sw_id = txq->sw_tail;\n \tuint16_t nb_used, i;\n+\tuint64_t bytes = 0;\n \tuint16_t nb_tx = 0;\n \tuint32_t hlen;\n \n@@ -355,6 +356,8 @@ gve_tx_burst_qpl(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\ttxq->nb_free -= nb_used;\n \t\ttxq->sw_nb_free -= first->nb_segs;\n \t\ttx_tail += nb_used;\n+\n+\t\tbytes += first->pkt_len;\n \t}\n \n end_of_tx:\n@@ -362,6 +365,10 @@ gve_tx_burst_qpl(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t\trte_write32(rte_cpu_to_be_32(tx_tail), txq->qtx_tail);\n \t\ttxq->tx_tail = tx_tail;\n \t\ttxq->sw_tail = sw_id;\n+\n+\t\ttxq->errors += nb_pkts - nb_tx;\n+\t\ttxq->packets += nb_tx;\n+\t\ttxq->bytes += bytes;\n \t}\n \n \treturn nb_tx;\n@@ -380,6 +387,7 @@ gve_tx_burst_ra(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tstruct rte_mbuf *tx_pkt, *first;\n \tuint16_t nb_used, hlen, i;\n \tuint64_t ol_flags, addr;\n+\tuint64_t bytes = 0;\n \tuint16_t nb_tx = 0;\n \n \ttxr = txq->tx_desc_ring;\n@@ -438,12 +446,17 @@ gve_tx_burst_ra(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \n \t\ttxq->nb_free -= nb_used;\n \t\ttx_tail += nb_used;\n+\n+\t\tbytes += first->pkt_len;\n \t}\n \n end_of_tx:\n \tif (nb_tx) {\n \t\trte_write32(rte_cpu_to_be_32(tx_tail), txq->qtx_tail);\n \t\ttxq->tx_tail = tx_tail;\n+\n+\t\ttxq->packets += nb_tx;\n+\t\ttxq->bytes += bytes;\n \t}\n \n \treturn nb_tx;\n",
    "prefixes": [
        "v3",
        "9/9"
    ]
}