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GET /api/patches/115093/?format=api
http://patches.dpdk.org/api/patches/115093/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-66-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-66-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-66-qi.z.zhang@intel.com", "date": "2022-08-15T07:32:01", "name": "[v2,65/70] net/ice/base: remove unnecessary fields", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ce7ec5f056883d5c3143b1826fca8c5945b1eda9", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-66-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115093/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115093/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 52EAEA00C3;\n\tMon, 15 Aug 2022 01:27:53 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 6E7B742D24;\n\tMon, 15 Aug 2022 01:24:04 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id BE3A142BB0\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:24:02 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:24:02 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:24:00 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519442; x=1692055442;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=QjICDTOVkCAOKq4rZOTg0v+gT7sawfN1u491kqZngyA=;\n b=OXHEYEQNDZeMILIPsPaHcSZTFM73d4PytA8m69mbVUupP8iufI/qz6t8\n 7o/sTcVJmbtzU/w/63X5ltWeXruGYSeJR0LLlIhT+VYHtJnXliIuHe2nx\n RfcMAfnq3JsRgLiuyTRrVIeFeOx4YStCoLVSetClEPjzARh2cxnoJOHsO\n 3UfaQRgM1Ry0F4sPkZfFSVLSllKSNseF6JN/OInn6Hbbgc9qBz4Ly68G3\n +mS7fjQiOZBik+Nh+Ai9tif2LuSXds9/tS76P7we4mMX85o5tI99jT0ZB\n ICWtU1aMn3GxquJBM7CR9/JywncLpTMrfdj/5fOnHGlUAdjzBpjECjAcr Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"274914523\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"274914523\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635283366\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Karol Kolacinski <karol.kolacinski@intel.com>", "Subject": "[PATCH v2 65/70] net/ice/base: remove unnecessary fields", "Date": "Mon, 15 Aug 2022 03:32:01 -0400", "Message-Id": "<20220815073206.2917968-66-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Remove unnecessary fields in data structure for 1588 and QoS\nfunc capabilities.\n\nSigned-off-by: Karol Kolacinski <karol.kolacinski@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 5 ++---\n drivers/net/ice/base/ice_switch.c | 2 --\n drivers/net/ice/base/ice_type.h | 6 ------\n 3 files changed, 2 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 44592d20bf..3d4e05f2b0 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -2579,7 +2579,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,\n \t\t * related information.\n \t\t */\n \t\tice_debug(hw, ICE_DBG_INIT, \"1588 func caps: unknown clock frequency %u\\n\",\n-\t\t\t info->clk_freq);\n+\t\t\t clk_freq);\n \t\tinfo->time_ref = ICE_TIME_REF_FREQ_25_000;\n \t}\n \n@@ -2594,7 +2594,7 @@ ice_parse_1588_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,\n \tice_debug(hw, ICE_DBG_INIT, \"func caps: tmr_index_assoc = %u\\n\",\n \t\t info->tmr_index_assoc);\n \tice_debug(hw, ICE_DBG_INIT, \"func caps: clk_freq = %u\\n\",\n-\t\t info->clk_freq);\n+\t\t clk_freq);\n \tice_debug(hw, ICE_DBG_INIT, \"func caps: clk_src = %u\\n\",\n \t\t info->clk_src);\n }\n@@ -2752,7 +2752,6 @@ ice_parse_1588_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,\n \t\t\tstruct ice_aqc_list_caps_elem *cap)\n {\n \tstruct ice_ts_dev_info *info = &dev_p->ts_dev_info;\n-\tu32 logical_id = LE32_TO_CPU(cap->logical_id);\n \tu32 phys_id = LE32_TO_CPU(cap->phys_id);\n \tu32 number = LE32_TO_CPU(cap->number);\n \ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex afc0fff84b..ac045790ad 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -3546,8 +3546,6 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,\n \t\tpi->sw_id = swid;\n \t\tpi->pf_vf_num = pf_vf_num;\n \t\tpi->is_vf = is_vf;\n-\t\tpi->dflt_tx_vsi_num = ICE_DFLT_VSI_INVAL;\n-\t\tpi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL;\n \t\tbreak;\n \tdefault:\n \t\tice_debug(pi->hw, ICE_DBG_SW, \"incorrect VSI/port type received\\n\");\ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 043dae7781..fc5b4b4c5c 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -661,7 +661,6 @@ enum ice_clk_src {\n struct ice_ts_func_info {\n \t/* Function specific info */\n \tenum ice_time_ref_freq time_ref;\n-\tu8 clk_freq;\n \tu8 clk_src : 1;\n \tu8 tmr_index_assoc : 1;\n \tu8 ena : 1;\n@@ -683,7 +682,6 @@ struct ice_ts_func_info {\n \n struct ice_ts_dev_info {\n \t/* Device specific info */\n-\tu32 ena_ports;\n \tu32 tmr_own_map;\n \tu8 tmr0_owner;\n \tu8 tmr1_owner;\n@@ -1098,10 +1096,6 @@ struct ice_port_info {\n #define ICE_SCHED_PORT_STATE_READY\t0x1\n \tu8 lport;\n #define ICE_LPORT_MASK\t\t\t0xff\n-\tu16 dflt_tx_vsi_rule_id;\n-\tu16 dflt_tx_vsi_num;\n-\tu16 dflt_rx_vsi_rule_id;\n-\tu16 dflt_rx_vsi_num;\n \tstruct ice_fc_info fc;\n \tstruct ice_mac_info mac;\n \tstruct ice_phy_info phy;\n", "prefixes": [ "v2", "65/70" ] }{ "id": 115093, "url": "