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GET /api/patches/115080/?format=api
{ "id": 115080, "url": "http://patches.dpdk.org/api/patches/115080/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-53-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-53-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-53-qi.z.zhang@intel.com", "date": "2022-08-15T07:31:48", "name": "[v2,52/70] net/ice/base: clean the main timer command register", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3daea5b23c2a42fba590fe382301b08690f9be9b", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-53-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115080/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115080/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F3D03A00C3;\n\tMon, 15 Aug 2022 01:26:52 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 52E4342CF0;\n\tMon, 15 Aug 2022 01:23:43 +0200 (CEST)", "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n by mails.dpdk.org (Postfix) with ESMTP id D346342C26\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:23:41 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:23:41 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:40 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519422; x=1692055422;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=b1yY/GdEyZdnZphwApBxnYhoaGxN3qYd8Fs4745b+nA=;\n b=ZoZbUDUm0DhzSNlev43LYiX5aEyxY9PJh29h2Rwbide8eMrjRH/t2RH3\n jsFUj4fcllQGRT5g4WzxbNk6n4CX+OztfMwoUWbB3SdttwmB0kLXvuYUj\n /uhEYuEHjyvKdSUgsQCxy01AyQBtHwDk04idrA3F/NpFWYIT4gJJkM1N9\n CWTabxFki9bOJ2gXdZV1TMF5OGdD1QEljDR3CRN2RqKsKC03Tvc846ELa\n 7TDgSaHpTU46pNf1vRBABv694AChVj2xVVJwXHZdWY/pAQfI6e1R9F7U0\n dj2ld4WQsWJoDEKq80IFQHfyTAAPxr+eqRhN2JWchiUD+K1Y+2ax36b9V w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"274914501\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"274914501\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635283278\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Sergey Temerkhanov <sergey.temerkhanov@intel.com>", "Subject": "[PATCH v2 52/70] net/ice/base: clean the main timer command register", "Date": "Mon, 15 Aug 2022 03:31:48 -0400", "Message-Id": "<20220815073206.2917968-53-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Clean the main timer command register after use to avoid residual\ncommand execution, such as re-initialization of the main timer.\n\nSigned-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_ptp_hw.c | 4 ++++\n 1 file changed, 4 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c\nindex dfb9d08224..f5ebf5f328 100644\n--- a/drivers/net/ice/base/ice_ptp_hw.c\n+++ b/drivers/net/ice/base/ice_ptp_hw.c\n@@ -3751,6 +3751,7 @@ ice_read_phy_and_phc_time_e822(struct ice_hw *hw, u8 port, u64 *phy_time,\n \n \t/* Issue the sync to start the ICE_PTP_READ_TIME capture */\n \tice_ptp_exec_tmr_cmd(hw);\n+\tice_ptp_clean_cmd(hw);\n \n \t/* Read the captured PHC time from the shadow time registers */\n \tzo = rd32(hw, GLTSYN_SHTIME_0(tmr_idx));\n@@ -3825,6 +3826,7 @@ static enum ice_status ice_sync_phy_timer_e822(struct ice_hw *hw, u8 port)\n \n \t/* Issue the sync to activate the time adjustment */\n \tice_ptp_exec_tmr_cmd(hw);\n+\tice_ptp_clean_cmd(hw);\n \n \t/* Re-capture the timer values to flush the command registers and\n \t * verify that the time was properly adjusted.\n@@ -3920,6 +3922,7 @@ ice_start_phy_timer_e822(struct ice_hw *hw, u8 port, bool bypass)\n \tu64 incval;\n \tu8 tmr_idx;\n \n+\tice_ptp_clean_cmd(hw);\n \ttmr_idx = ice_get_ptp_src_clock_index(hw);\n \n \tstatus = ice_stop_phy_timer_e822(hw, port, false);\n@@ -4913,6 +4916,7 @@ ice_ptp_tmr_cmd(struct ice_hw *hw, enum ice_ptp_tmr_cmd cmd, bool lock_sbq)\n \t * commands synchronously\n \t */\n \tice_ptp_exec_tmr_cmd(hw);\n+\tice_ptp_clean_cmd(hw);\n \n \treturn ICE_SUCCESS;\n }\n", "prefixes": [ "v2", "52/70" ] }