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GET /api/patches/115063/?format=api
{ "id": 115063, "url": "http://patches.dpdk.org/api/patches/115063/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-36-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220815073206.2917968-36-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220815073206.2917968-36-qi.z.zhang@intel.com", "date": "2022-08-15T07:31:31", "name": "[v2,35/70] net/ice/base: refine default VSI config", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "24f59a54e55b3027f9aadbb6b9d0e4dbf37d669d", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815073206.2917968-36-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 24308, "url": "http://patches.dpdk.org/api/series/24308/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24308", "date": "2022-08-15T07:30:56", "name": "ice base code update", "version": 2, "mbox": "http://patches.dpdk.org/series/24308/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/115063/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/115063/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4A009A00C3;\n\tMon, 15 Aug 2022 01:25:34 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id EFDFD42BAC;\n\tMon, 15 Aug 2022 01:23:17 +0200 (CEST)", "from mga14.intel.com (mga14.intel.com [192.55.52.115])\n by mails.dpdk.org (Postfix) with ESMTP id D309542C94\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:23:14 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:23:14 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by orsmga008.jf.intel.com with ESMTP; 14 Aug 2022 16:23:13 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660519395; x=1692055395;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=5z8KxXQtH9pfChfBIu4l4g63Fh52XGt0KnuMqldSaKI=;\n b=CCj+SuSVmRmMWXLC0BWrCtNg3EIrtFx9RHL5U+7WEDSrUdHzmb6bieRy\n q4UQMxRLdEBdcoXf6UvzKXDVxHlm95ceOaixDY2oA++JBWiddKHk3OE/D\n 5CKAXmzemJ7DbjSY2QTcljeD4kk5tHza/ybNZ5lP1gLHWdae4u6RU/qvY\n FKBEYTy9CRjia0tjVz8Iu2oIoaXuxg1MuMjMFYMO8DFM6LgQixfrMNSzV\n xqUxk3zUKazAgZGnRJ7aVsPzNZaGRdJI5v4B+1nsf2h9j4JAsAqzlTk+K\n e/i9OvXZ73/DbWH2JkrjZQujf7Ch0cVP81C0PNpI24VoA1qn/umtfnbGq Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10439\"; a=\"291857975\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"291857975\"", "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"635283189\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Michal Wilczynski <michal.wilczynski@intel.com>", "Subject": "[PATCH v2 35/70] net/ice/base: refine default VSI config", "Date": "Mon, 15 Aug 2022 03:31:31 -0400", "Message-Id": "<20220815073206.2917968-36-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20220815073206.2917968-1-qi.z.zhang@intel.com>", "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>\n <20220815073206.2917968-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Refine API ice_cfg_dflt_vsi and add new API\nice_check_if_dflt_vsi.\n\nSigned-off-by: Michal Wilczynski <michal.wilczynski@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_switch.c | 95 +++++++++++++++++--------------\n drivers/net/ice/base/ice_switch.h | 2 +\n 2 files changed, 53 insertions(+), 44 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex b8e733f539..124b4fad1b 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -2382,6 +2382,9 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw)\n \t}\n }\n \n+static bool\n+ice_vsi_uses_fltr(struct ice_fltr_mgmt_list_entry *fm_entry, u16 vsi_handle);\n+\n /**\n * ice_init_def_sw_recp - initialize the recipe book keeping tables\n * @hw: pointer to the HW struct\n@@ -5496,24 +5499,19 @@ enum ice_status\n ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,\n \t\t u8 direction)\n {\n-\tstruct ice_aqc_sw_rules_elem *s_rule;\n+\tstruct ice_fltr_list_entry f_list_entry;\n+\tstruct ice_sw_recipe *recp_list;\n \tstruct ice_fltr_info f_info;\n \tstruct ice_hw *hw = pi->hw;\n-\tenum ice_adminq_opc opcode;\n \tenum ice_status status;\n-\tu16 s_rule_size;\n+\tu8 lport = pi->lport;\n \tu16 hw_vsi_id;\n+\trecp_list = &pi->hw->switch_info->recp_list[ICE_SW_LKUP_DFLT];\n \n \tif (!ice_is_vsi_valid(hw, vsi_handle))\n \t\treturn ICE_ERR_PARAM;\n-\thw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);\n-\n-\ts_rule_size = set ? ICE_SW_RULE_RX_TX_ETH_HDR_SIZE :\n-\t\tICE_SW_RULE_RX_TX_NO_HDR_SIZE;\n \n-\ts_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size);\n-\tif (!s_rule)\n-\t\treturn ICE_ERR_NO_MEMORY;\n+\thw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);\n \n \tice_memset(&f_info, 0, sizeof(f_info), ICE_NONDMA_MEM);\n \n@@ -5521,54 +5519,63 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,\n \tf_info.flag = direction;\n \tf_info.fltr_act = ICE_FWD_TO_VSI;\n \tf_info.fwd_id.hw_vsi_id = hw_vsi_id;\n+\tf_info.vsi_handle = vsi_handle;\n \n \tif (f_info.flag & ICE_FLTR_RX) {\n \t\tf_info.src = pi->lport;\n \t\tf_info.src_id = ICE_SRC_ID_LPORT;\n-\t\tif (!set)\n-\t\t\tf_info.fltr_rule_id =\n-\t\t\t\tpi->dflt_rx_vsi_rule_id;\n \t} else if (f_info.flag & ICE_FLTR_TX) {\n \t\tf_info.src_id = ICE_SRC_ID_VSI;\n \t\tf_info.src = hw_vsi_id;\n-\t\tif (!set)\n-\t\t\tf_info.fltr_rule_id =\n-\t\t\t\tpi->dflt_tx_vsi_rule_id;\n \t}\n+\tf_list_entry.fltr_info = f_info;\n \n \tif (set)\n-\t\topcode = ice_aqc_opc_add_sw_rules;\n+\t\tstatus = ice_add_rule_internal(hw, recp_list, lport,\n+\t\t\t\t\t &f_list_entry);\n \telse\n-\t\topcode = ice_aqc_opc_remove_sw_rules;\n-\n-\tice_fill_sw_rule(hw, &f_info, s_rule, opcode);\n-\n-\tstatus = ice_aq_sw_rules(hw, s_rule, s_rule_size, 1, opcode, NULL);\n-\tif (status || !(f_info.flag & ICE_FLTR_TX_RX))\n-\t\tgoto out;\n-\tif (set) {\n-\t\tu16 index = LE16_TO_CPU(s_rule->pdata.lkup_tx_rx.index);\n-\n-\t\tif (f_info.flag & ICE_FLTR_TX) {\n-\t\t\tpi->dflt_tx_vsi_num = hw_vsi_id;\n-\t\t\tpi->dflt_tx_vsi_rule_id = index;\n-\t\t} else if (f_info.flag & ICE_FLTR_RX) {\n-\t\t\tpi->dflt_rx_vsi_num = hw_vsi_id;\n-\t\t\tpi->dflt_rx_vsi_rule_id = index;\n-\t\t}\n-\t} else {\n-\t\tif (f_info.flag & ICE_FLTR_TX) {\n-\t\t\tpi->dflt_tx_vsi_num = ICE_DFLT_VSI_INVAL;\n-\t\t\tpi->dflt_tx_vsi_rule_id = ICE_INVAL_ACT;\n-\t\t} else if (f_info.flag & ICE_FLTR_RX) {\n-\t\t\tpi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL;\n-\t\t\tpi->dflt_rx_vsi_rule_id = ICE_INVAL_ACT;\n+\t\tstatus = ice_remove_rule_internal(hw, recp_list,\n+\t\t\t\t\t\t &f_list_entry);\n+\n+\treturn status;\n+}\n+\n+/**\n+ * ice_check_if_dflt_vsi - check if VSI is default VSI\n+ * @pi: pointer to the port_info structure\n+ * @vsi_handle: vsi handle to check for in filter list\n+ * @rule_exists: indicates if there are any VSI's in the rule list\n+ *\n+ * checks if the VSI is in a default VSI list, and also indicates\n+ * if the default VSI list is empty\n+ */\n+bool ice_check_if_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle,\n+\t\t\t bool *rule_exists)\n+{\n+\tstruct ice_fltr_mgmt_list_entry *fm_entry;\n+\tstruct LIST_HEAD_TYPE *rule_head;\n+\tstruct ice_sw_recipe *recp_list;\n+\tstruct ice_lock *rule_lock;\n+\tbool ret = false;\n+\trecp_list = &pi->hw->switch_info->recp_list[ICE_SW_LKUP_DFLT];\n+\trule_lock = &recp_list->filt_rule_lock;\n+\trule_head = &recp_list->filt_rules;\n+\n+\tice_acquire_lock(rule_lock);\n+\n+\tif (rule_exists && !LIST_EMPTY(rule_head))\n+\t\t*rule_exists = true;\n+\n+\tLIST_FOR_EACH_ENTRY(fm_entry, rule_head,\n+\t\t\t ice_fltr_mgmt_list_entry, list_entry) {\n+\t\tif (ice_vsi_uses_fltr(fm_entry, vsi_handle)) {\n+\t\t\tret = true;\n+\t\t\tbreak;\n \t\t}\n \t}\n \n-out:\n-\tice_free(hw, s_rule);\n-\treturn status;\n+\tice_release_lock(rule_lock);\n+\treturn ret;\n }\n \n /**\ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex c67cd09d21..ad1397ba5a 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -486,6 +486,8 @@ void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle);\n enum ice_status\n ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,\n \t\t u8 direction);\n+bool ice_check_if_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle,\n+\t\t\t bool *rule_exists);\n enum ice_status\n ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,\n \t\t u16 vid);\n", "prefixes": [ "v2", "35/70" ] }