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GET /api/patches/115012/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 115012,
    "url": "http://patches.dpdk.org/api/patches/115012/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220815071306.2910599-56-qi.z.zhang@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220815071306.2910599-56-qi.z.zhang@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220815071306.2910599-56-qi.z.zhang@intel.com",
    "date": "2022-08-15T07:12:51",
    "name": "[55/70] net/ice/base: enable RSS support for L2TPv2 session ID",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "34bfaa464b2da4c0ffd96046184e5f9783d94aec",
    "submitter": {
        "id": 504,
        "url": "http://patches.dpdk.org/api/people/504/?format=api",
        "name": "Qi Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220815071306.2910599-56-qi.z.zhang@intel.com/mbox/",
    "series": [
        {
            "id": 24307,
            "url": "http://patches.dpdk.org/api/series/24307/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24307",
            "date": "2022-08-15T07:11:56",
            "name": "ice base code update",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/24307/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/115012/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/115012/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E7911A00C3;\n\tMon, 15 Aug 2022 01:08:30 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4F86542C99;\n\tMon, 15 Aug 2022 01:04:38 +0200 (CEST)",
            "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n by mails.dpdk.org (Postfix) with ESMTP id 7F7A242CA9\n for <dev@dpdk.org>; Mon, 15 Aug 2022 01:04:35 +0200 (CEST)",
            "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 Aug 2022 16:04:35 -0700",
            "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.4])\n by fmsmga005.fm.intel.com with ESMTP; 14 Aug 2022 16:04:33 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1660518275; x=1692054275;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=5Vujm7IodZWYnNsJywK4JUWRjm/MqxGSql6DvAzfxvA=;\n b=JT5iTuKigSX8Op+h6tgA4yo+HDJBTlKqxeSrgCd6RitekzEouUp2oUqw\n nhfNfegnHGBe33e1/aONjvOpessfVqLAN7x/bErIK5tuJmynmK57LI5ot\n NzzsTSR0Wt4VNuTacDxxcBNo2ZYmbE0h+Q9FXqqZy0U0ifKX02CDNluW5\n RYJTadPfWfNrqkEGbM9iSd4TZr0BktET5/WMd5jJWTSjP8mwkv/aJYCwr\n AZtvamwaGe2Uf+W9IIOVXiY20UilXWczmFRDT26jc2yPv2tyUH4PSqMTe\n 2EBcMAsIPvv7aWRtXAKneYoCJk2CpEGFASo4RjQROWTcjDUqls7s43KO4 w==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6400,9594,10439\"; a=\"293128792\"",
            "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"293128792\"",
            "E=Sophos;i=\"5.93,237,1654585200\"; d=\"scan'208\";a=\"934296874\""
        ],
        "X-ExtLoop1": "1",
        "From": "Qi Zhang <qi.z.zhang@intel.com>",
        "To": "qiming.yang@intel.com",
        "Cc": "dev@dpdk.org, Qi Zhang <qi.z.zhang@intel.com>,\n Jie Wang <jie1x.wang@intel.com>",
        "Subject": "[PATCH 55/70] net/ice/base: enable RSS support for L2TPv2 session ID",
        "Date": "Mon, 15 Aug 2022 03:12:51 -0400",
        "Message-Id": "<20220815071306.2910599-56-qi.z.zhang@intel.com>",
        "X-Mailer": "git-send-email 2.31.1",
        "In-Reply-To": "<20220815071306.2910599-1-qi.z.zhang@intel.com>",
        "References": "<20220815071306.2910599-1-qi.z.zhang@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add L2TPv2 session ID field support for RSS.\n\nEnable L2TPv2 non-tunneled packet types for UDP protocol header\nbitmaps.\n\nSigned-off-by: Jie Wang <jie1x.wang@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_flow.c | 12 ++++++++++++\n drivers/net/ice/base/ice_flow.h | 14 ++++++++++++++\n 2 files changed, 26 insertions(+)",
    "diff": "diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c\nindex bdc51ca9d2..182fac08a9 100644\n--- a/drivers/net/ice/base/ice_flow.c\n+++ b/drivers/net/ice/base/ice_flow.c\n@@ -38,6 +38,8 @@\n #define ICE_FLOW_FLD_SZ_NAT_T_ESP_SPI\t4\n #define ICE_FLOW_FLD_SZ_VXLAN_VNI\t4\n #define ICE_FLOW_FLD_SZ_ECPRI_TP0_PC_ID\t2\n+#define ICE_FLOW_FLD_SZ_L2TPV2_SESS_ID\t2\n+#define ICE_FLOW_FLD_SZ_L2TPV2_LEN_SESS_ID\t2\n \n /* Describe properties of a protocol header field */\n struct ice_flow_field_info {\n@@ -229,6 +231,14 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {\n \t/* ICE_FLOW_FIELD_IDX_UDP_ECPRI_TP0_PC_ID */\n \tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_UDP_ECPRI_TP0, 12,\n \t\t\t  ICE_FLOW_FLD_SZ_ECPRI_TP0_PC_ID),\n+\t/* L2TPV2 */\n+\t/* ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_L2TPV2, 12,\n+\t\t\t  ICE_FLOW_FLD_SZ_L2TPV2_SESS_ID),\n+\t/* L2TPV2_LEN */\n+\t/* ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID */\n+\tICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_L2TPV2, 14,\n+\t\t\t  ICE_FLOW_FLD_SZ_L2TPV2_LEN_SESS_ID),\n };\n \n /* Bitmaps indicating relevant packet types for a particular protocol header\n@@ -1492,6 +1502,8 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,\n \tcase ICE_FLOW_FIELD_IDX_GTPU_EH_QFI:\n \tcase ICE_FLOW_FIELD_IDX_GTPU_UP_QFI:\n \tcase ICE_FLOW_FIELD_IDX_GTPU_DWN_QFI:\n+\tcase ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID:\n+\tcase ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID:\n \t\t/* GTP is accessed through UDP OF protocol */\n \t\tprot_id = ICE_PROT_UDP_OF;\n \t\tbreak;\ndiff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h\nindex f941ce4333..5729392362 100644\n--- a/drivers/net/ice/base/ice_flow.h\n+++ b/drivers/net/ice/base/ice_flow.h\n@@ -149,6 +149,16 @@\n #define ICE_FLOW_HASH_NAT_T_ESP_IPV6_SPI \\\n \t(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_NAT_T_ESP_SPI)\n \n+#define ICE_FLOW_HASH_L2TPV2_SESS_ID \\\n+\t(BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID))\n+#define ICE_FLOW_HASH_L2TPV2_SESS_ID_ETH \\\n+\t(ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_L2TPV2_SESS_ID)\n+\n+#define ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID \\\n+\t(BIT_ULL(ICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID))\n+#define ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID_ETH \\\n+\t(ICE_FLOW_HASH_ETH | ICE_FLOW_HASH_L2TPV2_LEN_SESS_ID)\n+\n #define ICE_FLOW_FIELD_IPV4_SRC_OFFSET 12\n #define ICE_FLOW_FIELD_IPV4_DST_OFFSET 16\n #define ICE_FLOW_FIELD_IPV6_SRC_OFFSET 8\n@@ -297,6 +307,10 @@ enum ice_flow_field {\n \tICE_FLOW_FIELD_IDX_ECPRI_TP0_PC_ID,\n \t/* UDP_ECPRI_TP0 */\n \tICE_FLOW_FIELD_IDX_UDP_ECPRI_TP0_PC_ID,\n+\t/* L2TPV2 SESSION ID*/\n+\tICE_FLOW_FIELD_IDX_L2TPV2_SESS_ID,\n+\t/* L2TPV2_LEN SESSION ID */\n+\tICE_FLOW_FIELD_IDX_L2TPV2_LEN_SESS_ID,\n \t /* The total number of enums must not exceed 64 */\n \tICE_FLOW_FIELD_IDX_MAX\n };\n",
    "prefixes": [
        "55/70"
    ]
}