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GET /api/patches/114458/?format=api
{ "id": 114458, "url": "http://patches.dpdk.org/api/patches/114458/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220729193042.2764633-9-xiaoyun.li@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220729193042.2764633-9-xiaoyun.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220729193042.2764633-9-xiaoyun.li@intel.com", "date": "2022-07-29T19:30:40", "name": "[08/10] net/gve: add support to get dev info and configure dev", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "fcfe02234fbbf4ef1c25ee251b0adfb8e544aba0", "submitter": { "id": 798, "url": "http://patches.dpdk.org/api/people/798/?format=api", "name": "Li, Xiaoyun", "email": "xiaoyun.li@intel.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220729193042.2764633-9-xiaoyun.li@intel.com/mbox/", "series": [ { "id": 24137, "url": "http://patches.dpdk.org/api/series/24137/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24137", "date": "2022-07-29T19:30:32", "name": "introduce GVE PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/24137/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/114458/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/114458/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D7C69A00C4;\n\tFri, 29 Jul 2022 21:32:01 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 16D2742C80;\n\tFri, 29 Jul 2022 21:31:19 +0200 (CEST)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 387C642C6D\n for <dev@dpdk.org>; Fri, 29 Jul 2022 21:31:17 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 29 Jul 2022 12:31:16 -0700", "from silpixa00399779.ir.intel.com (HELO\n silpixa00399779.ger.corp.intel.com) ([10.237.223.111])\n by orsmga006.jf.intel.com with ESMTP; 29 Jul 2022 12:31:15 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1659123077; x=1690659077;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=ygJySkLLIsoclOGexHoGWrJk2VPWwtHVKnwuj4qsurw=;\n b=KEHG+8QSGf7z6uTo01lK+0s/LED2ZBcDywCOgvN8r9Yw3DFrMjnhOAyq\n HGiMFl9rSuE0pTvSvEfi8rAAFA/dgSqywZKifyVRljDnB22/65SDS7vo1\n su4JyJU2kTDw2cWLpHZOU55rRJb7VYAG8v4wh9tK7WqDv3iDmSX9eLCHG\n 2NwwusJSErl6778w6MigX6Z+UHQD31dgBj74n8WnRR1g6ghU+I9jDfiMP\n bKxnrj8oNMcA9D3AKpVotlVfWDzjuW0p6JcecTcrBdHwbymUKHutm0AHM\n O1B7aKmAwRLsknmPP52rFUNCEUvHrM2Uj2nYgqOIGUKS5gheZnGy+NNI6 A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10423\"; a=\"268602968\"", "E=Sophos;i=\"5.93,201,1654585200\"; d=\"scan'208\";a=\"268602968\"", "E=Sophos;i=\"5.93,201,1654585200\"; d=\"scan'208\";a=\"577059579\"" ], "X-ExtLoop1": "1", "From": "Xiaoyun Li <xiaoyun.li@intel.com>", "To": "junfeng.guo@intel.com, qi.z.zhang@intel.com, awogbemila@google.com,\n bruce.richardson@intel.com", "Cc": "dev@dpdk.org,\n\tXiaoyun Li <xiaoyun.li@intel.com>", "Subject": "[PATCH 08/10] net/gve: add support to get dev info and configure dev", "Date": "Fri, 29 Jul 2022 19:30:40 +0000", "Message-Id": "<20220729193042.2764633-9-xiaoyun.li@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220729193042.2764633-1-xiaoyun.li@intel.com>", "References": "<20220729193042.2764633-1-xiaoyun.li@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add dev_ops dev_infos_get.\nComplete dev_configure with RX offloads configuration.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\n---\n drivers/net/gve/gve.h | 3 ++\n drivers/net/gve/gve_ethdev.c | 61 ++++++++++++++++++++++++++++++++++++\n 2 files changed, 64 insertions(+)", "diff": "diff --git a/drivers/net/gve/gve.h b/drivers/net/gve/gve.h\nindex 7f4d0e37f3..004e0a75ca 100644\n--- a/drivers/net/gve/gve.h\n+++ b/drivers/net/gve/gve.h\n@@ -27,6 +27,9 @@\n #define GVE_DEFAULT_TX_FREE_THRESH 256\n #define GVE_TX_MAX_FREE_SZ 512\n \n+#define GVE_MIN_BUF_SIZE\t 1024\n+#define GVE_MAX_RX_PKTLEN\t 65535\n+\n /* PTYPEs are always 10 bits. */\n #define GVE_NUM_PTYPES\t1024\n \ndiff --git a/drivers/net/gve/gve_ethdev.c b/drivers/net/gve/gve_ethdev.c\nindex 5ebe2c30ea..6bc7bf4519 100644\n--- a/drivers/net/gve/gve_ethdev.c\n+++ b/drivers/net/gve/gve_ethdev.c\n@@ -96,6 +96,14 @@ gve_free_qpls(struct gve_priv *priv)\n static int\n gve_dev_configure(__rte_unused struct rte_eth_dev *dev)\n {\n+\tstruct gve_priv *priv = dev->data->dev_private;\n+\n+\tif (dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)\n+\t\tdev->data->dev_conf.rxmode.offloads |= RTE_ETH_RX_OFFLOAD_RSS_HASH;\n+\n+\tif (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO)\n+\t\tpriv->enable_lsc = 1;\n+\n \treturn 0;\n }\n \n@@ -266,6 +274,58 @@ gve_dev_close(struct rte_eth_dev *dev)\n \treturn err;\n }\n \n+static int\n+gve_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n+{\n+\tstruct gve_priv *priv = dev->data->dev_private;\n+\n+\tdev_info->device = dev->device;\n+\tdev_info->max_mac_addrs = 1;\n+\tdev_info->max_rx_queues = priv->max_nb_rxq;\n+\tdev_info->max_tx_queues = priv->max_nb_txq;\n+\tdev_info->min_rx_bufsize = GVE_MIN_BUF_SIZE;\n+\tdev_info->max_rx_pktlen = GVE_MAX_RX_PKTLEN;\n+\n+\tdev_info->rx_offload_capa = 0;\n+\tdev_info->tx_offload_capa =\n+\t\tRTE_ETH_TX_OFFLOAD_MULTI_SEGS |\n+\t\tRTE_ETH_TX_OFFLOAD_IPV4_CKSUM |\n+\t\tRTE_ETH_TX_OFFLOAD_UDP_CKSUM |\n+\t\tRTE_ETH_TX_OFFLOAD_TCP_CKSUM |\n+\t\tRTE_ETH_TX_OFFLOAD_SCTP_CKSUM |\n+\t\tRTE_ETH_TX_OFFLOAD_TCP_TSO;\n+\n+\tif (priv->queue_format == GVE_DQO_RDA_FORMAT)\n+\t\tdev_info->rx_offload_capa |= RTE_ETH_RX_OFFLOAD_TCP_LRO;\n+\n+\tdev_info->default_rxconf = (struct rte_eth_rxconf) {\n+\t\t.rx_free_thresh = GVE_DEFAULT_RX_FREE_THRESH,\n+\t\t.rx_drop_en = 0,\n+\t\t.offloads = 0,\n+\t};\n+\n+\tdev_info->default_txconf = (struct rte_eth_txconf) {\n+\t\t.tx_free_thresh = GVE_DEFAULT_TX_FREE_THRESH,\n+\t\t.offloads = 0,\n+\t};\n+\n+\tdev_info->default_rxportconf.ring_size = priv->rx_desc_cnt;\n+\tdev_info->rx_desc_lim = (struct rte_eth_desc_lim) {\n+\t\t.nb_max = priv->rx_desc_cnt,\n+\t\t.nb_min = priv->rx_desc_cnt,\n+\t\t.nb_align = 1,\n+\t};\n+\n+\tdev_info->default_txportconf.ring_size = priv->tx_desc_cnt;\n+\tdev_info->tx_desc_lim = (struct rte_eth_desc_lim) {\n+\t\t.nb_max = priv->tx_desc_cnt,\n+\t\t.nb_min = priv->tx_desc_cnt,\n+\t\t.nb_align = 1,\n+\t};\n+\n+\treturn 0;\n+}\n+\n static int\n gve_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)\n {\n@@ -299,6 +359,7 @@ static const struct eth_dev_ops gve_eth_dev_ops = {\n \t.dev_start = gve_dev_start,\n \t.dev_stop = gve_dev_stop,\n \t.dev_close = gve_dev_close,\n+\t.dev_infos_get = gve_dev_info_get,\n \t.rx_queue_setup = gve_rx_queue_setup,\n \t.tx_queue_setup = gve_tx_queue_setup,\n \t.link_update = gve_link_update,\n", "prefixes": [ "08/10" ] }