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GET /api/patches/112721/?format=api
{ "id": 112721, "url": "http://patches.dpdk.org/api/patches/112721/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220614120134.1828188-2-spiked@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220614120134.1828188-2-spiked@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220614120134.1828188-2-spiked@nvidia.com", "date": "2022-06-14T12:01:34", "name": "[v7] app/testpmd: add Host Shaper command", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a32091379336f1e4ae23a6a7971918404f61ca34", "submitter": { "id": 2637, "url": "http://patches.dpdk.org/api/people/2637/?format=api", "name": "Spike Du", "email": "spiked@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220614120134.1828188-2-spiked@nvidia.com/mbox/", "series": [ { "id": 23517, "url": "http://patches.dpdk.org/api/series/23517/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23517", "date": "2022-06-14T12:01:34", "name": "[v7] app/testpmd: add Host Shaper command", "version": 7, "mbox": "http://patches.dpdk.org/series/23517/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/112721/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/112721/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": 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<bernard.iremonger@intel.com>,\n Shahaf Shuler <shahafs@nvidia.com>", "CC": "<andrew.rybchenko@oktetlabs.ru>, <stephen@networkplumber.org>,\n <mb@smartsharesystems.com>, <dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[PATCH v7] app/testpmd: add Host Shaper command", "Date": "Tue, 14 Jun 2022 15:01:34 +0300", "Message-ID": "<20220614120134.1828188-2-spiked@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220614120134.1828188-1-spiked@nvidia.com>", "References": "<20220613025006.1596552-2-spiked@nvidia.com>\n <20220614120134.1828188-1-spiked@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "ac327834-5af9-47ba-f225-08da4dfdb2c4", "X-MS-TrafficTypeDiagnostic": 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z16sAbQbx7AZhxFJRCfNVAC+qtpQzuGUXtSeWH5GaAGM77FElFVSvKp6IpthNxlrY2t894XQeCAbITuCEoa0EUxSg4XCPE1Pu2DP3Sn+4x8grJg4Y0ZulSZgoj5rGTKS+oVx9unzlJYnQ4T8jvOqVad0ZlOn7QR0dF3V4xsVD1HCI/fq4ZVo5FwCGaHnGoKuC8fDYcXqMGzzJkCNo5smK+t92qEUOohZmD8YRwgADeG8iUFNLc3P7L5+TUTrq8QgAj80UWObD9aAd4Rb1fldYuASKSvQFy8t1s6GsHCqXcpgqT/IXxQdgC06Qc1S9QyfHvkJZg0PfjYesSEV5PE2jP6sen7G0v3QS6jR9vNzaTHS+YChSkf8uS3eJpe8P6CFNqsCvp+SAzU/YaZPPa6ef/B5YoojNdAwQ/bPgYx6X8c6zF2eIcRTt5oH3Q3AFTCPs+a1haI+5sfg41AgGHjckS0bv3e68pA+knrJ6xRspJfGeX9DPsDLjhiXtk0kUpwmc9wEKrpF40laxqrfrlaSHkhoFNUGugS0t4KXZZt6mQx+bYu7jQwfxXQprZNOI9KRk4NcykMpm0jmajyFd3ddcF9x8gNlS6qraTXipacndhU7Qj6g8CYktf0/v4xMcUszSVGMwd4o3zlda6/ewg5fQA4Ru2H+K+nHk1ZWCazB6JhtuklqgqBnl/3sPNx95LCdNrHbTJzyAQ1tKZbScUxq1A==", "X-Forefront-Antispam-Report": "CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230016)(4636009)(46966006)(36840700001)(40470700004)(70586007)(70206006)(4326008)(8676002)(6666004)(2616005)(47076005)(30864003)(426003)(8936002)(40460700003)(7696005)(508600001)(26005)(2906002)(5660300002)(6286002)(81166007)(36860700001)(54906003)(36756003)(316002)(55016003)(110136005)(16526019)(186003)(107886003)(336012)(1076003)(356005)(6636002)(83380400001)(86362001)(82310400005)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "14 Jun 2022 12:02:04.5943 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ac327834-5af9-47ba-f225-08da4dfdb2c4", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT008.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB5915", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add command line options to support host shaper configure.\n- Command syntax:\n mlx5 set port <port_id> host_shaper avail_thresh_triggered <0|1> rate\n<rate_num>\n\n- Example commands:\nTo enable avail_thresh_triggered on port 1 and disable current host\nshaper:\ntestpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 1 rate 0\n\nTo disable avail_thresh_triggered and current host shaper on port 1:\ntestpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 0\n\nThe rate unit is 100Mbps.\nTo disable avail_thresh_triggered and configure a shaper of 5Gbps on\nport 1:\ntestpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 50\n\nAdd sample code to handle rxq available descriptor threshold event, it\ndelays a while so that rxq empties, then disables host shaper and\nrearms available descriptor threshold event.\n\nSigned-off-by: Spike Du <spiked@nvidia.com>\n---\n app/test-pmd/testpmd.c | 7 ++\n doc/guides/nics/mlx5.rst | 46 +++++++++\n drivers/net/mlx5/meson.build | 4 +\n drivers/net/mlx5/mlx5_testpmd.c | 206 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_testpmd.h | 26 +++++\n 5 files changed, 289 insertions(+)\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.c\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.h", "diff": "diff --git a/app/test-pmd/testpmd.c b/app/test-pmd/testpmd.c\nindex 33d9b85..b491719 100644\n--- a/app/test-pmd/testpmd.c\n+++ b/app/test-pmd/testpmd.c\n@@ -69,6 +69,9 @@\n #ifdef RTE_NET_BOND\n #include <rte_eth_bond.h>\n #endif\n+#ifdef RTE_NET_MLX5\n+#include \"mlx5_testpmd.h\"\n+#endif\n \n #include \"testpmd.h\"\n \n@@ -3659,6 +3662,10 @@ struct pmd_test_command {\n \t\t\t\tbreak;\n \t\t\tprintf(\"Received avail_thresh event, port:%d rxq_id:%d\\n\",\n \t\t\t port_id, rxq_id);\n+\n+#ifdef RTE_NET_MLX5\n+\t\t\tmlx5_test_avail_thresh_event_handler(port_id, rxq_id);\n+#endif\n \t\t}\n \t\tbreak;\n \tdefault:\ndiff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex a1e13e7..b5a3ee3 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -1727,3 +1727,49 @@ which can be installed from OFED mstflint package.\n Meson detects ``libmtcr_ul`` existence at configure stage.\n If the library is detected, the application must link with ``-lmtcr_ul``,\n as done by the pkg-config file libdpdk.pc.\n+\n+How to use available descriptor threshold and Host Shaper\n+------------------------------\n+\n+There are sample command lines to configure available descriptor threshold in testpmd.\n+Testpmd also contains sample logic to handle available descriptor threshold event.\n+The typical workflow is: testpmd configure available descriptor threshold for Rx queues, enable\n+avail_thresh_triggered in host shaper and register a callback, when traffic from host is\n+too high and Rx queue emptiness is below available descriptor threshold, PMD receives an event and\n+firmware configures a 100Mbps shaper on host port automatically, then PMD call\n+the callback registered previously, which will delay a while to let Rx queue\n+empty, then disable host shaper.\n+\n+Let's assume we have a simple Blue Field 2 setup: port 0 is uplink, port 1\n+is VF representor. Each port has 2 Rx queues.\n+In order to control traffic from host to ARM, we can enable available descriptor threshold in testpmd by:\n+\n+.. code-block:: console\n+\n+ testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 1 rate 0\n+ testpmd> set port 1 rxq 0 avail_thresh 70\n+ testpmd> set port 1 rxq 1 avail_thresh 70\n+\n+The first command disables current host shaper, and enables available descriptor threshold triggered mode.\n+The left commands configure available descriptor threshold to 70% of Rx queue size for both Rx queues,\n+When traffic from host is too high, you can see testpmd console prints log\n+about available descriptor threshold event receiving, then host shaper is disabled.\n+The traffic rate from host is controlled and less drop happens in Rx queues.\n+\n+When disable available descriptor threshold and avail_thresh_triggered, we can invoke below commands in testpmd:\n+\n+.. code-block:: console\n+\n+ testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 0\n+ testpmd> set port 1 rxq 0 avail_thresh 0\n+ testpmd> set port 1 rxq 1 avail_thresh 0\n+\n+It's recommended an application disables available descriptor threshold and avail_thresh_triggered before exit,\n+if it enables them before.\n+\n+We can also configure the shaper with a value, the rate unit is 100Mbps, below\n+command sets current shaper to 5Gbps and disables avail_thresh_triggered.\n+\n+.. code-block:: console\n+\n+ testpmd> mlx5 set port 1 host_shaper avail_thresh_triggered 0 rate 50\ndiff --git a/drivers/net/mlx5/meson.build b/drivers/net/mlx5/meson.build\nindex 99210fd..941642b 100644\n--- a/drivers/net/mlx5/meson.build\n+++ b/drivers/net/mlx5/meson.build\n@@ -68,4 +68,8 @@ if get_option('buildtype').contains('debug')\n else\n cflags += [ '-UPEDANTIC' ]\n endif\n+\n+testpmd_sources += files('mlx5_testpmd.c')\n+testpmd_drivers_deps += 'net_mlx5'\n+\n subdir(exec_env)\ndiff --git a/drivers/net/mlx5/mlx5_testpmd.c b/drivers/net/mlx5/mlx5_testpmd.c\nnew file mode 100644\nindex 0000000..32f2386\n--- /dev/null\n+++ b/drivers/net/mlx5/mlx5_testpmd.c\n@@ -0,0 +1,206 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2021 6WIND S.A.\n+ * Copyright 2021 Mellanox Technologies, Ltd\n+ */\n+\n+#include <stdint.h>\n+#include <string.h>\n+#include <stdlib.h>\n+\n+#include <rte_prefetch.h>\n+#include <rte_common.h>\n+#include <rte_branch_prediction.h>\n+#include <rte_ether.h>\n+#include <rte_alarm.h>\n+#include <rte_pmd_mlx5.h>\n+#include <rte_ethdev.h>\n+#include \"mlx5_testpmd.h\"\n+#include \"testpmd.h\"\n+\n+static uint8_t host_shaper_avail_thresh_triggered[RTE_MAX_ETHPORTS];\n+#define SHAPER_DISABLE_DELAY_US 100000 /* 100ms */\n+\n+/**\n+ * Disable the host shaper and re-arm available descriptor threshold event.\n+ *\n+ * @param[in] args\n+ * uint32_t integer combining port_id and rxq_id.\n+ */\n+static void\n+mlx5_test_host_shaper_disable(void *args)\n+{\n+\tuint32_t port_rxq_id = (uint32_t)(uintptr_t)args;\n+\tuint16_t port_id = port_rxq_id & 0xffff;\n+\tuint16_t qid = (port_rxq_id >> 16) & 0xffff;\n+\tstruct rte_eth_rxq_info qinfo;\n+\n+\tprintf(\"%s disable shaper\\n\", __func__);\n+\tif (rte_eth_rx_queue_info_get(port_id, qid, &qinfo)) {\n+\t\tprintf(\"rx_queue_info_get returns error\\n\");\n+\t\treturn;\n+\t}\n+\t/* Rearm the available descriptor threshold event. */\n+\tif (rte_eth_rx_avail_thresh_set(port_id, qid, qinfo.avail_thresh)) {\n+\t\tprintf(\"config avail_thresh returns error\\n\");\n+\t\treturn;\n+\t}\n+\t/* Only disable the shaper when avail_thresh_triggered is set. */\n+\tif (host_shaper_avail_thresh_triggered[port_id] &&\n+\t rte_pmd_mlx5_host_shaper_config(port_id, 0, 0))\n+\t\tprintf(\"%s disable shaper returns error\\n\", __func__);\n+}\n+\n+void\n+mlx5_test_avail_thresh_event_handler(uint16_t port_id, uint16_t rxq_id)\n+{\n+\tstruct rte_eth_dev_info dev_info;\n+\tuint32_t port_rxq_id = port_id | (rxq_id << 16);\n+\n+\t/* Ensure it's MLX5 port. */\n+\tif (rte_eth_dev_info_get(port_id, &dev_info) != 0 ||\n+\t (strncmp(dev_info.driver_name, \"mlx5\", 4) != 0))\n+\t\treturn;\n+\trte_eal_alarm_set(SHAPER_DISABLE_DELAY_US,\n+\t\t\t mlx5_test_host_shaper_disable,\n+\t\t\t (void *)(uintptr_t)port_rxq_id);\n+\tprintf(\"%s port_id:%u rxq_id:%u\\n\", __func__, port_id, rxq_id);\n+}\n+\n+/**\n+ * Configure host shaper's avail_thresh_triggered and current rate.\n+ *\n+ * @param[in] avail_thresh_triggered\n+ * Disable/enable avail_thresh_triggered.\n+ * @param[in] rate\n+ * Configure current host shaper rate.\n+ * @return\n+ * On success, returns 0.\n+ * On failure, returns < 0.\n+ */\n+static int\n+mlx5_test_set_port_host_shaper(uint16_t port_id, uint16_t avail_thresh_triggered, uint8_t rate)\n+{\n+\tstruct rte_eth_link link;\n+\tbool port_id_valid = false;\n+\tuint16_t pid;\n+\tint ret;\n+\n+\tRTE_ETH_FOREACH_DEV(pid)\n+\t\tif (port_id == pid) {\n+\t\t\tport_id_valid = true;\n+\t\t\tbreak;\n+\t\t}\n+\tif (!port_id_valid)\n+\t\treturn -EINVAL;\n+\tret = rte_eth_link_get_nowait(port_id, &link);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\thost_shaper_avail_thresh_triggered[port_id] = avail_thresh_triggered ? 1 : 0;\n+\tif (!avail_thresh_triggered) {\n+\t\tret = rte_pmd_mlx5_host_shaper_config(port_id, 0,\n+\t\tRTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED));\n+\t} else {\n+\t\tret = rte_pmd_mlx5_host_shaper_config(port_id, 1,\n+\t\tRTE_BIT32(MLX5_HOST_SHAPER_FLAG_AVAIL_THRESH_TRIGGERED));\n+\t}\n+\tif (ret)\n+\t\treturn ret;\n+\tret = rte_pmd_mlx5_host_shaper_config(port_id, rate, 0);\n+\tif (ret)\n+\t\treturn ret;\n+\treturn 0;\n+}\n+\n+/* *** SET HOST_SHAPER FOR A PORT *** */\n+struct cmd_port_host_shaper_result {\n+\tcmdline_fixed_string_t mlx5;\n+\tcmdline_fixed_string_t set;\n+\tcmdline_fixed_string_t port;\n+\tuint16_t port_num;\n+\tcmdline_fixed_string_t host_shaper;\n+\tcmdline_fixed_string_t avail_thresh_triggered;\n+\tuint16_t fr;\n+\tcmdline_fixed_string_t rate;\n+\tuint8_t rate_num;\n+};\n+\n+static void cmd_port_host_shaper_parsed(void *parsed_result,\n+\t\t__rte_unused struct cmdline *cl,\n+\t\t__rte_unused void *data)\n+{\n+\tstruct cmd_port_host_shaper_result *res = parsed_result;\n+\tint ret = 0;\n+\n+\tif ((strcmp(res->mlx5, \"mlx5\") == 0) &&\n+\t (strcmp(res->set, \"set\") == 0) &&\n+\t (strcmp(res->port, \"port\") == 0) &&\n+\t (strcmp(res->host_shaper, \"host_shaper\") == 0) &&\n+\t (strcmp(res->avail_thresh_triggered, \"avail_thresh_triggered\") == 0) &&\n+\t (strcmp(res->rate, \"rate\") == 0))\n+\t\tret = mlx5_test_set_port_host_shaper(res->port_num, res->fr,\n+\t\t\t\t\t res->rate_num);\n+\tif (ret < 0)\n+\t\tprintf(\"cmd_port_host_shaper error: (%s)\\n\", strerror(-ret));\n+}\n+\n+static cmdline_parse_token_string_t cmd_port_host_shaper_mlx5 =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\tmlx5, \"mlx5\");\n+static cmdline_parse_token_string_t cmd_port_host_shaper_set =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\tset, \"set\");\n+static cmdline_parse_token_string_t cmd_port_host_shaper_port =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\tport, \"port\");\n+static cmdline_parse_token_num_t cmd_port_host_shaper_portnum =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\tport_num, RTE_UINT16);\n+static cmdline_parse_token_string_t cmd_port_host_shaper_host_shaper =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\t host_shaper, \"host_shaper\");\n+static cmdline_parse_token_string_t cmd_port_host_shaper_avail_thresh_triggered =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\t avail_thresh_triggered, \"avail_thresh_triggered\");\n+static cmdline_parse_token_num_t cmd_port_host_shaper_fr =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t fr, RTE_UINT16);\n+static cmdline_parse_token_string_t cmd_port_host_shaper_rate =\n+\tTOKEN_STRING_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t\t rate, \"rate\");\n+static cmdline_parse_token_num_t cmd_port_host_shaper_rate_num =\n+\tTOKEN_NUM_INITIALIZER(struct cmd_port_host_shaper_result,\n+\t\t\t rate_num, RTE_UINT8);\n+static cmdline_parse_inst_t mlx5_test_cmd_port_host_shaper = {\n+\t.f = cmd_port_host_shaper_parsed,\n+\t.data = (void *)0,\n+\t.help_str = \"mlx5 set port <port_id> host_shaper avail_thresh_triggered <0|1> \"\n+\t\"rate <rate_num>: Set HOST_SHAPER avail_thresh_triggered and rate with port_id\",\n+\t.tokens = {\n+\t\t(void *)&cmd_port_host_shaper_mlx5,\n+\t\t(void *)&cmd_port_host_shaper_set,\n+\t\t(void *)&cmd_port_host_shaper_port,\n+\t\t(void *)&cmd_port_host_shaper_portnum,\n+\t\t(void *)&cmd_port_host_shaper_host_shaper,\n+\t\t(void *)&cmd_port_host_shaper_avail_thresh_triggered,\n+\t\t(void *)&cmd_port_host_shaper_fr,\n+\t\t(void *)&cmd_port_host_shaper_rate,\n+\t\t(void *)&cmd_port_host_shaper_rate_num,\n+\t\tNULL,\n+\t}\n+};\n+\n+static struct testpmd_driver_commands mlx5_driver_cmds = {\n+\t.commands = {\n+\t\t{\n+\t\t\t.ctx = &mlx5_test_cmd_port_host_shaper,\n+\t\t\t.help = \"mlx5 set port (port_id) host_shaper avail_thresh_triggered (on|off)\"\n+\t\t\t\"rate (rate_num):\\n\"\n+\t\t\t\" Set HOST_SHAPER avail_thresh_triggered and rate with port_id\\n\\n\",\n+\t\t},\n+\t\t{\n+\t\t\t.ctx = NULL,\n+\t\t},\n+\t}\n+};\n+TESTPMD_ADD_DRIVER_COMMANDS(mlx5_driver_cmds);\n+\ndiff --git a/drivers/net/mlx5/mlx5_testpmd.h b/drivers/net/mlx5/mlx5_testpmd.h\nnew file mode 100644\nindex 0000000..7a54658\n--- /dev/null\n+++ b/drivers/net/mlx5/mlx5_testpmd.h\n@@ -0,0 +1,26 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright 2021 6WIND S.A.\n+ * Copyright 2021 Mellanox Technologies, Ltd\n+ */\n+\n+#ifndef RTE_PMD_MLX5_TEST_H_\n+#define RTE_PMD_MLX5_TEST_H_\n+\n+#include <cmdline_parse.h>\n+#include <cmdline_parse_num.h>\n+#include <cmdline_parse_string.h>\n+\n+/**\n+ * RTE_ETH_EVENT_RX_AVAIL_THRESH handler sample code.\n+ * It's called in testpmd, the work flow here is delay a while until\n+ * RX queueu is empty, then disable host shaper.\n+ *\n+ * @param[in] port_id\n+ * Port identifier.\n+ * @param[in] rxq_id\n+ * Rx queue identifier.\n+ */\n+void\n+mlx5_test_avail_thresh_event_handler(uint16_t port_id, uint16_t rxq_id);\n+\n+#endif\n", "prefixes": [ "v7" ] }