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GET /api/patches/112315/?format=api
{ "id": 112315, "url": "http://patches.dpdk.org/api/patches/112315/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-2-tduszynski@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220604162651.3503338-2-tduszynski@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220604162651.3503338-2-tduszynski@marvell.com", "date": "2022-06-04T16:26:42", "name": "[01/10] common/cnxk: update register access for CNF10xxN", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3e5c97c941d3af483adbec8e03ffcfb2237d89ea", "submitter": { "id": 2215, "url": "http://patches.dpdk.org/api/people/2215/?format=api", "name": "Tomasz Duszynski", "email": "tduszynski@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220604162651.3503338-2-tduszynski@marvell.com/mbox/", "series": [ { "id": 23325, "url": "http://patches.dpdk.org/api/series/23325/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23325", "date": "2022-06-04T16:26:41", "name": "Sync BPHY changes", "version": 1, "mbox": "http://patches.dpdk.org/series/23325/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/112315/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/112315/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 00A73A034C;\n\tSat, 4 Jun 2022 18:27:21 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D7E5041155;\n\tSat, 4 Jun 2022 18:27:16 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 1A072410D5\n for <dev@dpdk.org>; Sat, 4 Jun 2022 18:27:16 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 254GRF5u032547;\n Sat, 4 Jun 2022 09:27:15 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3gg6wq0dgt-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Sat, 04 Jun 2022 09:27:15 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Sat, 4 Jun 2022 09:27:13 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Sat, 4 Jun 2022 09:27:13 -0700", "from localhost.localdomain (unknown [10.28.34.39])\n by maili.marvell.com (Postfix) with ESMTP id E4BC53F70AB;\n Sat, 4 Jun 2022 09:27:10 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=/0gmQBGeSSIBtiTkbYSHlXBh8hh+1AMWC5JbKIx3qP0=;\n b=JQMjXbZjERLd9g/n9HSIWsxkBL9RqYq3jgs1/seGPL8EoAgQAJ3SrOYNphAkkYvelbmo\n lX6ZHLYml0vo6NeZnbkizMNhLQ+asIFiZE1jg0B5ETNn/nk+zCnxjpmszMtVsZVl6RJZ\n q18R62P2QmLhXyTIVUzANbp+cIAf9vyB1hoMSGy6+MZTwtSG9Un2vajo5zgaZlOnPIeA\n 4ozLY6AFPmbblezsjdSi7NCDsoDABRV5fIegCGnxfobbSy+BNb91JG3zGGlHm48/MYaX\n qzMyDzrZQc125MraBuXlTy2L3daMiMiHnxm+F5lfx3I/Bluz0ZzZ/Y9m39SYDn7Awu6t Jw==", "From": "Tomasz Duszynski <tduszynski@marvell.com>", "To": "<dev@dpdk.org>, Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<thomas@monjalon.net>, <jerinj@marvell.com>, Tomasz Duszynski\n <tduszynski@marvell.com>, Jakub Palider <jpalider@marvell.com>", "Subject": "[PATCH 01/10] common/cnxk: update register access for CNF10xxN", "Date": "Sat, 4 Jun 2022 18:26:42 +0200", "Message-ID": "<20220604162651.3503338-2-tduszynski@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220604162651.3503338-1-tduszynski@marvell.com>", "References": "<20220604162651.3503338-1-tduszynski@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "OH569jmjlkaBeG1N0VhHsAaF7B5mx9IR", "X-Proofpoint-GUID": "OH569jmjlkaBeG1N0VhHsAaF7B5mx9IR", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514\n definitions=2022-06-04_05,2022-06-03_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Due to HW changes some fields which were used to enable\nxmit were moved elsewhere. This patch takes care of this.\n\nSigned-off-by: Tomasz Duszynski <tduszynski@marvell.com>\nReviewed-by: Jakub Palider <jpalider@marvell.com>\nReviewed-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>\nTested-by: Jerin Jacob Kollanukkaran <jerinj@marvell.com>\n---\n drivers/common/cnxk/roc_bphy_cgx.c | 33 ++++++++++++++++++++----------\n 1 file changed, 22 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_bphy_cgx.c b/drivers/common/cnxk/roc_bphy_cgx.c\nindex c3be3c9041..19baaa6757 100644\n--- a/drivers/common/cnxk/roc_bphy_cgx.c\n+++ b/drivers/common/cnxk/roc_bphy_cgx.c\n@@ -21,10 +21,13 @@\n *\n * Hence common longer mask may be used.\n */\n-#define CGX_CMRX_RX_LMACS\t0x128\n-#define CGX_CMRX_RX_LMACS_LMACS GENMASK_ULL(3, 0)\n-#define CGX_CMRX_SCRATCH0\t0x1050\n-#define CGX_CMRX_SCRATCH1\t0x1058\n+#define CGX_CMRX_RX_LMACS 0x128\n+#define CGX_CMRX_RX_LMACS_LMACS GENMASK_ULL(3, 0)\n+#define CGX_CMRX_SCRATCH0 0x1050\n+#define CGX_CMRX_SCRATCH1 0x1058\n+#define CGX_MTI_MAC100X_COMMAND_CONFIG 0x8010\n+#define CGX_MTI_MAC100X_COMMAND_CONFIG_RX_ENA BIT_ULL(1)\n+#define CGX_MTI_MAC100X_COMMAND_CONFIG_TX_ENA BIT_ULL(0)\n \n static uint64_t\n roc_bphy_cgx_read(struct roc_bphy_cgx *roc_cgx, uint64_t lmac, uint64_t offset)\n@@ -221,7 +224,7 @@ static int\n roc_bphy_cgx_start_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n \t\t\t bool start)\n {\n-\tuint64_t val;\n+\tuint64_t val, reg, rx_field, tx_field;\n \n \tif (!roc_cgx)\n \t\treturn -EINVAL;\n@@ -229,16 +232,24 @@ roc_bphy_cgx_start_stop_rxtx(struct roc_bphy_cgx *roc_cgx, unsigned int lmac,\n \tif (!roc_bphy_cgx_lmac_exists(roc_cgx, lmac))\n \t\treturn -ENODEV;\n \n+\tif (roc_model_is_cnf10kb()) {\n+\t\treg = CGX_MTI_MAC100X_COMMAND_CONFIG;\n+\t\trx_field = CGX_MTI_MAC100X_COMMAND_CONFIG_RX_ENA;\n+\t\ttx_field = CGX_MTI_MAC100X_COMMAND_CONFIG_TX_ENA;\n+\t} else {\n+\t\treg = CGX_CMRX_CONFIG;\n+\t\trx_field = CGX_CMRX_CONFIG_DATA_PKT_RX_EN;\n+\t\ttx_field = CGX_CMRX_CONFIG_DATA_PKT_TX_EN;\n+\t}\n+\n \tpthread_mutex_lock(&roc_cgx->lock);\n-\tval = roc_bphy_cgx_read(roc_cgx, lmac, CGX_CMRX_CONFIG);\n-\tval &= ~(CGX_CMRX_CONFIG_DATA_PKT_RX_EN |\n-\t\t CGX_CMRX_CONFIG_DATA_PKT_TX_EN);\n+\tval = roc_bphy_cgx_read(roc_cgx, lmac, reg);\n+\tval &= ~(rx_field | tx_field);\n \n \tif (start)\n-\t\tval |= FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_RX_EN, 1) |\n-\t\t FIELD_PREP(CGX_CMRX_CONFIG_DATA_PKT_TX_EN, 1);\n+\t\tval |= FIELD_PREP(rx_field, 1) | FIELD_PREP(tx_field, 1);\n \n-\troc_bphy_cgx_write(roc_cgx, lmac, CGX_CMRX_CONFIG, val);\n+\troc_bphy_cgx_write(roc_cgx, lmac, reg, val);\n \tpthread_mutex_unlock(&roc_cgx->lock);\n \n \treturn 0;\n", "prefixes": [ "01/10" ] }