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GET /api/patches/110732/?format=api
{ "id": 110732, "url": "http://patches.dpdk.org/api/patches/110732/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220505142744.1423344-1-rbhansali@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220505142744.1423344-1-rbhansali@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220505142744.1423344-1-rbhansali@marvell.com", "date": "2022-05-05T14:27:43", "name": "[1/2] config/arm: add SVE control flag", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0523efc448d2824e36aea8e15801d5e850bf2e54", "submitter": { "id": 2436, "url": "http://patches.dpdk.org/api/people/2436/?format=api", "name": "Rahul Bhansali", "email": "rbhansali@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220505142744.1423344-1-rbhansali@marvell.com/mbox/", "series": [ { "id": 22798, "url": "http://patches.dpdk.org/api/series/22798/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22798", "date": "2022-05-05T14:27:43", "name": "[1/2] config/arm: add SVE control flag", "version": 1, "mbox": "http://patches.dpdk.org/series/22798/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/110732/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/110732/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3322AA0093;\n\tThu, 5 May 2022 16:28:06 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D6B434014F;\n\tThu, 5 May 2022 16:28:05 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 3E91A40042\n for <dev@dpdk.org>; Thu, 5 May 2022 16:28:04 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.5/8.16.1.2) with ESMTP id\n 2457XG2a012012;\n Thu, 5 May 2022 07:28:00 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3fuscx5cn9-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 05 May 2022 07:28:00 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Thu, 5 May 2022 07:27:58 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend\n Transport; Thu, 5 May 2022 07:27:58 -0700", "from localhost.localdomain (unknown [10.28.48.107])\n by maili.marvell.com (Postfix) with ESMTP id A08F23F706C;\n Thu, 5 May 2022 07:27:56 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=Mte16kYHxD5ZuX1lkh/m8O3pcwD8iZV1comMWchyxJo=;\n b=PHt02pU6ASEEviEVoxmATWEzGTEeFMpKSNznFq9tkK8YTfWgxcMn+qAfP5g8QQAkh00q\n QUF3/8yVw2ToLdnUWiI9iWa8pQZWetsm3nNdHft6PI4n7Vskk+ZOZGtSp8rTcuvpv7yj\n lK+Ss/40k3cayCVm96GxPViL6Cr4VczC49+qCpt59E1dkUNMJ32OYVCQhFogdf1C6tq0\n F/Z8eNSAkIBDKH5z9hJf2m8CRc8M31OoqlW+is5Ny3/wbeC2j57EBIDWVn+kTmPRUINo\n gyt7dSqcxrH6hkq5Dg5t/H6Etp7Z8h2Tv0vfsJelhrSQU5OCjkmnYPD3E9dTy57VARxA Uw==", "From": "Rahul Bhansali <rbhansali@marvell.com>", "To": "<dev@dpdk.org>, Ruifeng Wang <ruifeng.wang@arm.com>, Jan Viktorin\n <viktorin@rehivetech.com>, Bruce Richardson <bruce.richardson@intel.com>", "CC": "<jerinj@marvell.com>, Rahul Bhansali <rbhansali@marvell.com>", "Subject": "[PATCH 1/2] config/arm: add SVE control flag", "Date": "Thu, 5 May 2022 19:57:43 +0530", "Message-ID": "<20220505142744.1423344-1-rbhansali@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "-ILNqa4nuy5lJhzt5eF73hSQCB6G_lPH", "X-Proofpoint-ORIG-GUID": "-ILNqa4nuy5lJhzt5eF73hSQCB6G_lPH", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514\n definitions=2022-05-05_06,2022-05-05_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This add the control flag for SVE to enable or disable\nRTE_HAS_SVE_ACLE macro in the build.\n\nSigned-off-by: Rahul Bhansali <rbhansali@marvell.com>\n---\n config/arm/meson.build | 3 ++-\n 1 file changed, 2 insertions(+), 1 deletion(-)", "diff": "diff --git a/config/arm/meson.build b/config/arm/meson.build\nindex 8aead74086..dafb342cc6 100644\n--- a/config/arm/meson.build\n+++ b/config/arm/meson.build\n@@ -603,7 +603,8 @@ if (cc.get_define('__ARM_NEON', args: machine_args) != '' or\n compile_time_cpuflags += ['RTE_CPUFLAG_NEON']\n endif\n \n-if cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != ''\n+if (cc.get_define('__ARM_FEATURE_SVE', args: machine_args) != '' and\n+ soc_config.get('sve', true))\n compile_time_cpuflags += ['RTE_CPUFLAG_SVE']\n if (cc.check_header('arm_sve.h'))\n dpdk_conf.set('RTE_HAS_SVE_ACLE', 1)\n", "prefixes": [ "1/2" ] }