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GET /api/patches/109811/?format=api
{ "id": 109811, "url": "http://patches.dpdk.org/api/patches/109811/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220419055921.10566-4-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220419055921.10566-4-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220419055921.10566-4-ndabilpuram@marvell.com", "date": "2022-04-19T05:59:01", "name": "[04/24] common/cnxk: support to configure the ts pkind in CPT", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bd3195335eb15112e6ed32de340f9619862ea4c0", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220419055921.10566-4-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 22546, "url": "http://patches.dpdk.org/api/series/22546/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=22546", "date": "2022-04-19T05:58:58", "name": "[01/24] common/cnxk: add multi channel support for SDP send queues", "version": 1, "mbox": "http://patches.dpdk.org/series/22546/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/109811/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/109811/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B98C6A00C3;\n\tTue, 19 Apr 2022 08:00:33 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B3CB5427F4;\n\tTue, 19 Apr 2022 08:00:17 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id C6DE9427EB\n for <dev@dpdk.org>; Tue, 19 Apr 2022 08:00:14 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 23INFuu3010003;\n Mon, 18 Apr 2022 23:00:11 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3ffwap25v2-19\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 18 Apr 2022 23:00:11 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 18 Apr 2022 23:00:05 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 18 Apr 2022 23:00:05 -0700", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id D90545B697E;\n Mon, 18 Apr 2022 23:00:02 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=g3Bvaozfa7UvDjN4rCGUDtnYuAH+TzNKoiENZVElepE=;\n b=bzhque5V6tTxXsm6ldEPFlZReUusqPwnVRGfEYXV6wkDrkkQarPjf4MbUOUleotR7jNQ\n LXamio9LATZ74Vd3QS42QvK4hwJxUM4M51yHN7gxYX/257pjwlwsokCtgzpVmnAuaCgo\n PDYHIUXUtqemUpXBVnoQzcHQcIVZn7saTJkFKibvWhs0hWVShjQQQ+gJTMZ+XdLV4K6O\n HVxaWfCVn2OTJarX4TL7ojbVuVQ+WIFEKKuBg1Q7Sz7KarXVFyME+Dvw9hD2QR4Vy7id\n vcLaTxo1ITHmI6zOXNSJECfNvuN1J8N9fBt1DaKln8C/ri2Kf6gf/6xQ/EhpYvTOSry9 4g==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Ray Kinsella <mdr@ashroe.eu>", "CC": "<dev@dpdk.org>, Vidya Sagar Velumuri <vvelumuri@marvell.com>", "Subject": "[PATCH 04/24] common/cnxk: support to configure the ts pkind in CPT", "Date": "Tue, 19 Apr 2022 11:29:01 +0530", "Message-ID": "<20220419055921.10566-4-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20220419055921.10566-1-ndabilpuram@marvell.com>", "References": "<20220419055921.10566-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "mNlsEQRwH5WTumGifU-dfFc_ETjl47gz", "X-Proofpoint-ORIG-GUID": "mNlsEQRwH5WTumGifU-dfFc_ETjl47gz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514\n definitions=2022-04-19_02,2022-04-15_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n\nAdd new API to configure the SA table entries with new CPT PKIND\nwhen timestamp is enabled.\n\nSigned-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>\n---\n drivers/common/cnxk/roc_nix_inl.c | 59 ++++++++++++++++++++++++++++++++++\n drivers/common/cnxk/roc_nix_inl.h | 2 ++\n drivers/common/cnxk/roc_nix_inl_priv.h | 1 +\n drivers/common/cnxk/version.map | 1 +\n 4 files changed, 63 insertions(+)", "diff": "diff --git a/drivers/common/cnxk/roc_nix_inl.c b/drivers/common/cnxk/roc_nix_inl.c\nindex 826c6e9..bfb33b1 100644\n--- a/drivers/common/cnxk/roc_nix_inl.c\n+++ b/drivers/common/cnxk/roc_nix_inl.c\n@@ -1011,6 +1011,65 @@ roc_nix_inl_ctx_write(struct roc_nix *roc_nix, void *sa_dptr, void *sa_cptr,\n \treturn -ENOTSUP;\n }\n \n+int\n+roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena, bool inb_inl_dev)\n+{\n+\tstruct idev_cfg *idev = idev_get_cfg();\n+\tstruct nix_inl_dev *inl_dev = NULL;\n+\tvoid *sa, *sa_base = NULL;\n+\tstruct nix *nix = NULL;\n+\tuint16_t max_spi = 0;\n+\tuint8_t pkind = 0;\n+\tint i;\n+\n+\tif (roc_model_is_cn9k())\n+\t\treturn 0;\n+\n+\tif (!inb_inl_dev && (roc_nix == NULL))\n+\t\treturn -EINVAL;\n+\n+\tif (inb_inl_dev) {\n+\t\tif ((idev == NULL) || (idev->nix_inl_dev == NULL))\n+\t\t\treturn 0;\n+\t\tinl_dev = idev->nix_inl_dev;\n+\t} else {\n+\t\tnix = roc_nix_to_nix_priv(roc_nix);\n+\t\tif (!nix->inl_inb_ena)\n+\t\t\treturn 0;\n+\t\tsa_base = nix->inb_sa_base;\n+\t\tmax_spi = roc_nix->ipsec_in_max_spi;\n+\t}\n+\n+\tif (inl_dev) {\n+\t\tif (inl_dev->rq_refs == 0) {\n+\t\t\tinl_dev->ts_ena = ts_ena;\n+\t\t\tmax_spi = inl_dev->ipsec_in_max_spi;\n+\t\t\tsa_base = inl_dev->inb_sa_base;\n+\t\t} else if (inl_dev->ts_ena != ts_ena) {\n+\t\t\tif (inl_dev->ts_ena)\n+\t\t\t\tplt_err(\"Inline device is already configured with TS enable\");\n+\t\t\telse\n+\t\t\t\tplt_err(\"Inline device is already configured with TS disable\");\n+\t\t\treturn -ENOTSUP;\n+\t\t} else {\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\n+\tpkind = ts_ena ? ROC_IE_OT_CPT_TS_PKIND : ROC_IE_OT_CPT_PKIND;\n+\n+\tsa = (uint8_t *)sa_base;\n+\tif (pkind == ((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind)\n+\t\treturn 0;\n+\n+\tfor (i = 0; i < max_spi; i++) {\n+\t\tsa = ((uint8_t *)sa_base) +\n+\t\t (i * ROC_NIX_INL_OT_IPSEC_INB_SA_SZ);\n+\t\t((struct roc_ot_ipsec_inb_sa *)sa)->w0.s.pkind = pkind;\n+\t}\n+\treturn 0;\n+}\n+\n void\n roc_nix_inl_dev_lock(void)\n {\ndiff --git a/drivers/common/cnxk/roc_nix_inl.h b/drivers/common/cnxk/roc_nix_inl.h\nindex 2c2a4d7..633f090 100644\n--- a/drivers/common/cnxk/roc_nix_inl.h\n+++ b/drivers/common/cnxk/roc_nix_inl.h\n@@ -174,6 +174,8 @@ int __roc_api roc_nix_inl_inb_tag_update(struct roc_nix *roc_nix,\n uint64_t __roc_api roc_nix_inl_dev_rq_limit_get(void);\n int __roc_api roc_nix_reassembly_configure(uint32_t max_wait_time,\n \t\t\t\t\tuint16_t max_frags);\n+int __roc_api roc_nix_inl_ts_pkind_set(struct roc_nix *roc_nix, bool ts_ena,\n+\t\t\t\t bool inb_inl_dev);\n \n /* NIX Inline Outbound API */\n int __roc_api roc_nix_inl_outb_init(struct roc_nix *roc_nix);\ndiff --git a/drivers/common/cnxk/roc_nix_inl_priv.h b/drivers/common/cnxk/roc_nix_inl_priv.h\nindex 0fa5e09..f9646a3 100644\n--- a/drivers/common/cnxk/roc_nix_inl_priv.h\n+++ b/drivers/common/cnxk/roc_nix_inl_priv.h\n@@ -76,6 +76,7 @@ struct nix_inl_dev {\n \tuint32_t inb_spi_mask;\n \tbool attach_cptlf;\n \tbool wqe_skip;\n+\tbool ts_ena;\n };\n \n int nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev);\ndiff --git a/drivers/common/cnxk/version.map b/drivers/common/cnxk/version.map\nindex 2a122e5..53586da 100644\n--- a/drivers/common/cnxk/version.map\n+++ b/drivers/common/cnxk/version.map\n@@ -159,6 +159,7 @@ INTERNAL {\n \troc_nix_inl_outb_is_enabled;\n \troc_nix_inl_outb_soft_exp_poll_switch;\n \troc_nix_inl_sa_sync;\n+\troc_nix_inl_ts_pkind_set;\n \troc_nix_inl_ctx_write;\n \troc_nix_inl_dev_pffunc_get;\n \troc_nix_cpt_ctx_cache_sync;\n", "prefixes": [ "04/24" ] }