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GET /api/patches/108268/?format=api
http://patches.dpdk.org/api/patches/108268/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220224132820.1939650-8-xuemingl@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220224132820.1939650-8-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220224132820.1939650-8-xuemingl@nvidia.com", "date": "2022-02-24T13:28:20", "name": "[7/7] vdpa/mlx5: make statistics counter persistent", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a419756f52222727c3667170530b49aa1d21996f", "submitter": { "id": 1904, "url": "http://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 2642, "url": "http://patches.dpdk.org/api/users/2642/?format=api", "username": "mcoquelin", "first_name": "Maxime", "last_name": "Coquelin", "email": "maxime.coquelin@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220224132820.1939650-8-xuemingl@nvidia.com/mbox/", "series": [ { "id": 21862, "url": "http://patches.dpdk.org/api/series/21862/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21862", "date": "2022-02-24T13:28:13", "name": "vdpa/mlx5: improve device shutdown time", "version": 1, "mbox": "http://patches.dpdk.org/series/21862/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/108268/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/108268/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 08811A034E;\n\tThu, 24 Feb 2022 14:29:41 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 42E4A426F9;\n\tThu, 24 Feb 2022 14:29:38 +0100 (CET)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2072.outbound.protection.outlook.com [40.107.220.72])\n by mails.dpdk.org (Postfix) with ESMTP id A1190426F0\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Xueming Li <xuemingl@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<xuemingl@nvidia.com>, Matan Azrad <matan@nvidia.com>, \"Viacheslav\n Ovsiienko\" <viacheslavo@nvidia.com>", "Subject": "[PATCH 7/7] vdpa/mlx5: make statistics counter persistent", "Date": "Thu, 24 Feb 2022 21:28:20 +0800", "Message-ID": "<20220224132820.1939650-8-xuemingl@nvidia.com>", "X-Mailer": "git-send-email 2.35.1", "In-Reply-To": "<20220224132820.1939650-1-xuemingl@nvidia.com>", "References": "<20220224132820.1939650-1-xuemingl@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "1ab9bef5-e285-4537-4fb6-08d9f799b236", "X-MS-TrafficTypeDiagnostic": "MN2PR12MB4223:EE_", "X-Microsoft-Antispam-PRVS": "\n <MN2PR12MB4223E05DB1ABDFFCFA00835FA13D9@MN2PR12MB4223.namprd12.prod.outlook.com>", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 0aVOx5A/muLl9hFfZhEzkMyJ4y8xL1VhiduYUoXGtsOf7/OmDwur1llJ4IAgMZ6kNXv3KOBQpRXDwXzNzxY7bWYAHv8ALfKXFZTru5MUGwwxZXLBuaUEGrvFm2Nb9Xi3YKSIc/JQbQg1H3gOMtuqqM7Zz2cqLTyykQW/xkWQ2xLlyLz7YrVrRVhVtE8P1pBrz5fui/IB++GfJKA3eLA5OugMd+l+w0OflyaIJsDugc4q30ftLIiOvd2ykHSiROy3Cj3faUvdUBmth+/xZqf6xkSjGDLJOWVF4vrhq52bo49lMTnuRnJ4VjWEuag2VocFMZhILndp3GsuSTJqRyV2JsV8wEG2Z7Q+ZbqPtXybEJ204drhl8TQdPkciDJfmFZNKCE8l+4Rjkt/ILXqw0T49GYM33EFX/OQa2JZlN2Ba2s5QlQz2LqkGSeQvGwZ0fThgW8mcrzteRTQeqHIy+KKiTfoClL4C4UvlN8Rs/X86ZHJp23DbACEbrQfGfsduc1d9X52EO9JIFwX63MHVTZ5WJlPelrGgMLvhFB0ZSqvQWCN2CbCDvhLV486pMsNCTmpA6iHJV5wBPkj11tM+mj7SkSBMdNJEjWVnoHOeU5P8AGrCJCYZ4Iyye3Cuawao6UBnLzX+tZLGV2SfUsyFqRuUVqRJWMNZfrLsOrO8eNNbxZ2TmaMvmx8oD6TwfC+hQIBC8wLXzf+C6TvKz8e46NyoQ==", "X-Forefront-Antispam-Report": "CIP:12.22.5.236; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(82310400004)(83380400001)(47076005)(36756003)(107886003)(2616005)(40460700003)(186003)(336012)(16526019)(1076003)(426003)(6286002)(26005)(6916009)(316002)(2906002)(54906003)(4326008)(8936002)(86362001)(70586007)(5660300002)(70206006)(36860700001)(81166007)(55016003)(7696005)(508600001)(356005)(6666004)(8676002)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Feb 2022 13:29:34.0346 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 1ab9bef5-e285-4537-4fb6-08d9f799b236", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.236];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT068.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR12MB4223", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "To speed the device suspend and resume time, make counter persitent\nin reconfiguration until the device gets removed.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\n---\n doc/guides/vdpadevs/mlx5.rst | 6 ++++++\n drivers/vdpa/mlx5/mlx5_vdpa.c | 19 +++++++----------\n drivers/vdpa/mlx5/mlx5_vdpa.h | 1 +\n drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 32 +++++++++++------------------\n 4 files changed, 26 insertions(+), 32 deletions(-)", "diff": "diff --git a/doc/guides/vdpadevs/mlx5.rst b/doc/guides/vdpadevs/mlx5.rst\nindex acb791032ad..3ded142311e 100644\n--- a/doc/guides/vdpadevs/mlx5.rst\n+++ b/doc/guides/vdpadevs/mlx5.rst\n@@ -109,3 +109,9 @@ Upon potential hardware errors, mlx5 PMD try to recover, give up if failed 3\n times in 3 seconds, virtq will be put in disable state. User should check log\n to get error information, or query vdpa statistics counter to know error type\n and count report.\n+\n+Statistics\n+^^^^^^^^^^\n+\n+The device statistics counter persists in reconfiguration until the device gets\n+removed. User can reset counters by calling function rte_vdpa_reset_stats().\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.c b/drivers/vdpa/mlx5/mlx5_vdpa.c\nindex c83b1141482..92ef7777169 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.c\n@@ -388,12 +388,7 @@ mlx5_vdpa_get_stats(struct rte_vdpa_device *vdev, int qid,\n \t\tDRV_LOG(ERR, \"Invalid device: %s.\", vdev->device->name);\n \t\treturn -ENODEV;\n \t}\n-\tif (priv->state == MLX5_VDPA_STATE_PROBED) {\n-\t\tDRV_LOG(ERR, \"Device %s was not configured.\",\n-\t\t\t\tvdev->device->name);\n-\t\treturn -ENODATA;\n-\t}\n-\tif (qid >= (int)priv->nr_virtqs) {\n+\tif (qid >= (int)priv->caps.max_num_virtio_queues * 2) {\n \t\tDRV_LOG(ERR, \"Too big vring id: %d for device %s.\", qid,\n \t\t\t\tvdev->device->name);\n \t\treturn -E2BIG;\n@@ -416,12 +411,7 @@ mlx5_vdpa_reset_stats(struct rte_vdpa_device *vdev, int qid)\n \t\tDRV_LOG(ERR, \"Invalid device: %s.\", vdev->device->name);\n \t\treturn -ENODEV;\n \t}\n-\tif (priv->state == MLX5_VDPA_STATE_PROBED) {\n-\t\tDRV_LOG(ERR, \"Device %s was not configured.\",\n-\t\t\t\tvdev->device->name);\n-\t\treturn -ENODATA;\n-\t}\n-\tif (qid >= (int)priv->nr_virtqs) {\n+\tif (qid >= (int)priv->caps.max_num_virtio_queues * 2) {\n \t\tDRV_LOG(ERR, \"Too big vring id: %d for device %s.\", qid,\n \t\t\t\tvdev->device->name);\n \t\treturn -E2BIG;\n@@ -693,6 +683,11 @@ mlx5_vdpa_release_dev_resources(struct mlx5_vdpa_priv *priv)\n \tuint32_t i;\n \n \tmlx5_vdpa_dev_cache_clean(priv);\n+\tfor (i = 0; i < priv->caps.max_num_virtio_queues * 2; i++) {\n+\t\tif (!priv->virtqs[i].counters)\n+\t\t\tcontinue;\n+\t\tclaim_zero(mlx5_devx_cmd_destroy(priv->virtqs[i].counters));\n+\t}\n \tmlx5_vdpa_event_qp_global_release(priv);\n \tmlx5_vdpa_err_event_unset(priv);\n \tif (priv->steer.tbl)\ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa.h b/drivers/vdpa/mlx5/mlx5_vdpa.h\nindex 24bafe85b44..e7f3319f896 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa.h\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa.h\n@@ -92,6 +92,7 @@ struct mlx5_vdpa_virtq {\n \tstruct rte_intr_handle *intr_handle;\n \tuint64_t err_time[3]; /* RDTSC time of recent errors. */\n \tuint32_t n_retry;\n+\tstruct mlx5_devx_virtio_q_couners_attr stats;\n \tstruct mlx5_devx_virtio_q_couners_attr reset;\n };\n \ndiff --git a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\nindex c42846ecb3c..d2c91b25db1 100644\n--- a/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\n+++ b/drivers/vdpa/mlx5/mlx5_vdpa_virtq.c\n@@ -127,14 +127,9 @@ void\n mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)\n {\n \tint i;\n-\tstruct mlx5_vdpa_virtq *virtq;\n \n-\tfor (i = 0; i < priv->nr_virtqs; i++) {\n-\t\tvirtq = &priv->virtqs[i];\n-\t\tmlx5_vdpa_virtq_unset(virtq);\n-\t\tif (virtq->counters)\n-\t\t\tclaim_zero(mlx5_devx_cmd_destroy(virtq->counters));\n-\t}\n+\tfor (i = 0; i < priv->nr_virtqs; i++)\n+\t\tmlx5_vdpa_virtq_unset(&priv->virtqs[i]);\n \tpriv->features = 0;\n \tpriv->nr_virtqs = 0;\n }\n@@ -590,7 +585,7 @@ mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,\n \t\t\t struct rte_vdpa_stat *stats, unsigned int n)\n {\n \tstruct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];\n-\tstruct mlx5_devx_virtio_q_couners_attr attr = {0};\n+\tstruct mlx5_devx_virtio_q_couners_attr *attr = &virtq->stats;\n \tint ret;\n \n \tif (!virtq->counters) {\n@@ -598,7 +593,7 @@ mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,\n \t\t\t\"is invalid.\", qid);\n \t\treturn -EINVAL;\n \t}\n-\tret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, &attr);\n+\tret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, attr);\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Failed to read virtq %d stats from HW.\", qid);\n \t\treturn ret;\n@@ -608,37 +603,37 @@ mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,\n-\t\t.value = attr.received_desc - virtq->reset.received_desc,\n+\t\t.value = attr->received_desc - virtq->reset.received_desc,\n \t};\n \tif (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,\n-\t\t.value = attr.completed_desc - virtq->reset.completed_desc,\n+\t\t.value = attr->completed_desc - virtq->reset.completed_desc,\n \t};\n \tif (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,\n-\t\t.value = attr.bad_desc_errors - virtq->reset.bad_desc_errors,\n+\t\t.value = attr->bad_desc_errors - virtq->reset.bad_desc_errors,\n \t};\n \tif (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,\n-\t\t.value = attr.exceed_max_chain - virtq->reset.exceed_max_chain,\n+\t\t.value = attr->exceed_max_chain - virtq->reset.exceed_max_chain,\n \t};\n \tif (ret == MLX5_VDPA_STATS_INVALID_BUFFER)\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_INVALID_BUFFER,\n-\t\t.value = attr.invalid_buffer - virtq->reset.invalid_buffer,\n+\t\t.value = attr->invalid_buffer - virtq->reset.invalid_buffer,\n \t};\n \tif (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)\n \t\treturn ret;\n \tstats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {\n \t\t.id = MLX5_VDPA_STATS_COMPLETION_ERRORS,\n-\t\t.value = attr.error_cqes - virtq->reset.error_cqes,\n+\t\t.value = attr->error_cqes - virtq->reset.error_cqes,\n \t};\n \treturn ret;\n }\n@@ -649,11 +644,8 @@ mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)\n \tstruct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];\n \tint ret;\n \n-\tif (!virtq->counters) {\n-\t\tDRV_LOG(ERR, \"Failed to read virtq %d statistics - virtq \"\n-\t\t\t\"is invalid.\", qid);\n-\t\treturn -EINVAL;\n-\t}\n+\tif (virtq->counters == NULL) /* VQ not enabled. */\n+\t\treturn 0;\n \tret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,\n \t\t\t\t\t\t &virtq->reset);\n \tif (ret)\n", "prefixes": [ "7/7" ] }{ "id": 108268, "url": "