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GET /api/patches/108082/?format=api
http://patches.dpdk.org/api/patches/108082/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220222203016.2634402-10-roy.fan.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220222203016.2634402-10-roy.fan.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220222203016.2634402-10-roy.fan.zhang@intel.com", "date": "2022-02-22T20:30:16", "name": "[v11,9/9] crypto/qat: support out of place SG list", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f9e325d405ab5c985835e4cfdfc69f37deb8031c", "submitter": { "id": 304, "url": "http://patches.dpdk.org/api/people/304/?format=api", "name": "Fan Zhang", "email": "roy.fan.zhang@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220222203016.2634402-10-roy.fan.zhang@intel.com/mbox/", "series": [ { "id": 21802, "url": "http://patches.dpdk.org/api/series/21802/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21802", "date": "2022-02-22T20:30:07", "name": "drivers/qat: QAT symmetric crypto datapatch rework", "version": 11, "mbox": "http://patches.dpdk.org/series/21802/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/108082/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/108082/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2D39DA034C;\n\tTue, 22 Feb 2022 21:32:05 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 32F1F411B8;\n\tTue, 22 Feb 2022 21:31:18 +0100 (CET)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by mails.dpdk.org (Postfix) with ESMTP id 5A7DD41145\n for <dev@dpdk.org>; Tue, 22 Feb 2022 21:31:11 +0100 (CET)", "from fmsmga007.fm.intel.com ([10.253.24.52])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 22 Feb 2022 12:30:33 -0800", "from silpixa00400885.ir.intel.com ([10.243.23.50])\n by fmsmga007.fm.intel.com with ESMTP; 22 Feb 2022 12:30:32 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1645561871; x=1677097871;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=AyennKn6jMONMFR53jNutpy5oHKOo18ZumCLVR3G3R8=;\n b=kgjb2r50782Ey2GSNtBLiSqdkgbCgUkFkoUOZQpm4xZzJMrz6HVPrXmy\n Q+U5VCHZAAdPgo4EELeTAbSw5xL2difqH96YdJWtOjfrULtPX4KxCxEQ/\n maLHj78BE9OQesr2Bwwlvu7lVaf5RQvsTCIKTiivD70w9JjbH+iGcG+vQ\n 8nb9+nkc2vko7vnPUhJv/IvLSsCrHVoRn+8iWytTMCjMsOt43UEcTRSre\n emvOvriyf+7fxR/g0nD7JPmkQasveM7saoW3o72jHCEAdD5XPoRHboj5M\n bHHRhOBwJbNz32RnjDeqJKuYQ6UIgA0nSrQ5DpB5SFasp3hFZto1x6MDw A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6200,9189,10266\"; a=\"338243431\"", "E=Sophos;i=\"5.88,389,1635231600\"; d=\"scan'208\";a=\"338243431\"", "E=Sophos;i=\"5.88,389,1635231600\"; d=\"scan'208\";a=\"543076235\"" ], "X-ExtLoop1": "1", "From": "Fan Zhang <roy.fan.zhang@intel.com>", "To": "dev@dpdk.org", "Cc": "gakhil@marvell.com, Kai Ji <kai.ji@intel.com>,\n Fan Zhang <roy.fan.zhang@intel.com>", "Subject": "[PATCH v11 9/9] crypto/qat: support out of place SG list", "Date": "Tue, 22 Feb 2022 20:30:16 +0000", "Message-Id": "<20220222203016.2634402-10-roy.fan.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20220222203016.2634402-1-roy.fan.zhang@intel.com>", "References": "<20220222170226.90002-1-kai.ji@intel.com>\n <20220222203016.2634402-1-roy.fan.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Kai Ji <kai.ji@intel.com>\n\nThis patch adds the SGL out of place support to QAT PMD\n\nSigned-off-by: Kai Ji <kai.ji@intel.com>\nAcked-by: Fan Zhang <roy.fan.zhang@intel.com>\n---\n drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c | 28 ++++++++--\n drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c | 14 ++++-\n drivers/crypto/qat/dev/qat_sym_pmd_gen1.c | 55 +++++++++++++++++---\n 3 files changed, 83 insertions(+), 14 deletions(-)", "diff": "diff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\nindex ffa093a7a3..5084a5fcd1 100644\n--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c\n@@ -468,8 +468,18 @@ qat_sym_dp_enqueue_aead_jobs_gen3(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n@@ -565,8 +575,18 @@ qat_sym_dp_enqueue_auth_jobs_gen3(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_auth_job_gen3(ctx, cookie, req, &vec->digest[i],\ndiff --git a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\nindex f803bc1459..bd7f3785df 100644\n--- a/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\n+++ b/drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c\n@@ -297,8 +297,18 @@ qat_sym_dp_enqueue_aead_jobs_gen4(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \ndiff --git a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\nindex 58f07eb0b3..3bcb53cf9f 100644\n--- a/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n+++ b/drivers/crypto/qat/dev/qat_sym_pmd_gen1.c\n@@ -526,9 +526,18 @@ qat_sym_dp_enqueue_cipher_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i],\n-\t\t\t\tcookie, vec->src_sgl[i].vec,\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n \t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_cipher_job_gen1(ctx, req, &vec->iv[i], ofs,\n@@ -625,8 +634,18 @@ qat_sym_dp_enqueue_auth_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\tenqueue_one_auth_job_gen1(ctx, req, &vec->digest[i],\n@@ -725,8 +744,18 @@ qat_sym_dp_enqueue_chain_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n@@ -830,8 +859,18 @@ qat_sym_dp_enqueue_aead_jobs_gen1(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_build_req_set_data(req, user_data[i], cookie,\n-\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num, NULL, 0);\n+\t\tif (vec->dest_sgl) {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t\tvec->dest_sgl[i].vec, vec->dest_sgl[i].num);\n+\t\t} else {\n+\t\t\tdata_len = qat_sym_build_req_set_data(req,\n+\t\t\t\tuser_data[i], cookie,\n+\t\t\t\tvec->src_sgl[i].vec,\n+\t\t\t\tvec->src_sgl[i].num, NULL, 0);\n+\t\t}\n+\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \n", "prefixes": [ "v11", "9/9" ] }{ "id": 108082, "url": "