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GET /api/patches/107933/?format=api
{ "id": 107933, "url": "http://patches.dpdk.org/api/patches/107933/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220222084031.31701-1-shunh@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220222084031.31701-1-shunh@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220222084031.31701-1-shunh@nvidia.com", "date": "2022-02-22T08:40:30", "name": "[v1] drivers: fix incorrect E-Switch manager vport ID", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d4ac0943fdd55e5bdec892c95bcb8b0e47e2fe71", "submitter": { "id": 2212, "url": "http://patches.dpdk.org/api/people/2212/?format=api", "name": "Shun Hao", "email": "shunh@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220222084031.31701-1-shunh@nvidia.com/mbox/", "series": [ { "id": 21782, "url": "http://patches.dpdk.org/api/series/21782/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21782", "date": "2022-02-22T08:40:30", "name": "[v1] drivers: fix incorrect E-Switch manager vport ID", "version": 1, "mbox": "http://patches.dpdk.org/series/21782/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/107933/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/107933/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id AF155A0350;\n\tTue, 22 Feb 2022 09:40:55 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 71A5D4113C;\n\tTue, 22 Feb 2022 09:40:55 +0100 (CET)", "from NAM11-CO1-obe.outbound.protection.outlook.com\n (mail-co1nam11on2069.outbound.protection.outlook.com [40.107.220.69])\n by mails.dpdk.org (Postfix) with ESMTP id 598C640E64\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Shun Hao <shunh@nvidia.com>", "To": "=?unknown-8bit?b?PG1hdGFuQG52aWRpYS5jb20+LCA8dmlhY2hlc2xhdm9AbnZpZGlh?=\n\t=?unknown-8bit?b?LmNvbT4sIDxvcmlrYUBudmlkaWEuY29twqDCoMKgPiw=?=\n\t=?unknown-8bit?q?_=3Cthomas=40monjalon=2Enet=C2=A0=3E=2C_Xueming_Li_=3Cxuemi?=\n\t=?unknown-8bit?q?ngl=40nvidia=2Ecom=3E?=", "CC": "=?unknown-8bit?b?PGRldkBkcGRrLm9yZ8KgwqA+LCA8cmFzbGFuZEBudmlkaWEuY29t?=\n\t=?unknown-8bit?b?PiwgPHN0YWJsZUBkcGRrLm9yZz4=?=", "Subject": "[PATCH v1] drivers: fix incorrect E-Switch manager vport ID", "Date": "Tue, 22 Feb 2022 10:40:30 +0200", "Message-ID": "<20220222084031.31701-1-shunh@nvidia.com>", "X-Mailer": "git-send-email 2.20.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "15c97575-d2ad-4a46-d677-08d9f5df0758", "X-MS-TrafficTypeDiagnostic": "MWHPR12MB1615:EE_", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <MWHPR12MB16151191AF8AF51E2E00B3B1C03B9@MWHPR12MB1615.namprd12.prod.outlook.com>", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n Qg0GNL9MGlwzcUs44y5lUeO1oeC4D01eN8viWKRYJdbeuGejAtmuavj1UqYbii2BJIQFGd1QfcQpzcrgK3+TaDDwfPHAXkt0OnLHADk36HuoFgXReNhaR2BIli3nor2aP3vm1WI46W8vgtKprRburT3DAyWz3EDLitpfOI3wynmHNWDKgjIV03jTuUwxlJuGMPC0kV/YnQ9Zkr/Eo6jy4AvZmG7k9n0eW3d9LeT2thUc22fY3Xm3+1c6JWdTpelW8FOHhxCtCt8OaBcxjxmhF3yPdTMYzYuNtfzY5Rd+jb7fPmnHKU6siCXv/uUoUP9wn1i8WD7/HPRFKaroERRn3wGuw5FwBz7XAveIPv3nYQA1tnoDugMblaTes1aqKtfgJ02u8gIbeju7RE59tQ8fq4BsLxSZhHLzmwkNasPuDCW74pv+Ga1x9HZd2NV/7d0FZFs014QvAedIW6i50770QJeUf4mtvySYNgK8J8v4xPlBp79hfXBno3yzKGxjX6CExCfrdRsvFt+MIr9AVp+WGyaIR+VeQefRvF1oMAPw54qvtCrPpisa2tOHuz0+Ih2BQg8tUhgeXP199Ox3zaEkqXbzcmVzCmDt9H5O4LL9cxerr92fMvPisnUE6dnWpK8Dw1dWannafOU9adcHUwlWXaRL0uVUE1gZKN0DaMSS7v+wE9qF6SK5d8K78IrZt7Kub8oVauPuml2qxopcAXdqXg==", "X-Forefront-Antispam-Report": "CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(40470700004)(46966006)(36840700001)(6636002)(83380400001)(110136005)(40460700003)(47076005)(316002)(36860700001)(55016003)(336012)(2906002)(1076003)(426003)(8676002)(36756003)(7696005)(508600001)(70206006)(356005)(8936002)(81166007)(82310400004)(70586007)(86362001)(26005)(16526019)(6286002)(186003)(4326008)(6666004)(5660300002)(2616005)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "22 Feb 2022 08:40:49.8160 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 15c97575-d2ad-4a46-d677-08d9f5df0758", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT060.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MWHPR12MB1615", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "One of the E-Switch vports plays the special role - it is assigned as\n\"E-Switch manager\" and has some special exclusive rights and duties - it\nmaintains all the representors, manages FDB domain flows, etc. By\ndefault, the E-Switch vport index was supposed to be zero on standalone\nNICs (regular ConnectX) and 0xFFFE SmartNIC (BlueField), but that was\nnot always correct - this index can be assigned with any value by\nkernel/hypervisor.\n\nCurrently the E-Switch manager vport id is supposed to be default - 0\nfor standalone NICs, and 0xFFFE for the SmartNICs, and is deduced from\nthe device PCI id.\n\nTo handle this and do not suggest any default values, can use DevX API\nto query E-Switch manager vport ID directly from the firmware during\ninitializaiton, and use that value by default. If the new method is not\nprovided (legacy firmware), fallback to use the PCI id approach.\n\nFixes: a564038699f9 (\"net/mlx5: support E-Switch manager egress traffic match\")\nCc: stable@dpdk.org\n\nSigned-off-by: Shun Hao <shunh@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/common/mlx5/mlx5_devx_cmds.c | 12 ++++++++++++\n drivers/common/mlx5/mlx5_devx_cmds.h | 2 ++\n drivers/common/mlx5/mlx5_prm.h | 12 ++++++++++++\n drivers/net/mlx5/mlx5_flow_dv.c | 4 ++++\n 4 files changed, 30 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c\nindex 2e807a0829..6d632b97ed 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.c\n@@ -1130,6 +1130,18 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,\n \t\t\tgoto error;\n \t\t}\n \t}\n+\tif (attr->eswitch_manager) {\n+\t\thcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,\n+\t\t\t\tMLX5_SET_HCA_CAP_OP_MOD_ESW |\n+\t\t\t\tMLX5_HCA_CAP_OPMOD_GET_CUR);\n+\t\tif (!hcattr)\n+\t\t\treturn rc;\n+\t\tattr->esw_mgr_vport_id_valid =\n+\t\t\tMLX5_GET(esw_cap, hcattr,\n+\t\t\t\t esw_manager_vport_number_valid);\n+\t\tattr->esw_mgr_vport_id =\n+\t\t\tMLX5_GET(esw_cap, hcattr, esw_manager_vport_number);\n+\t}\n \treturn 0;\n error:\n \trc = (rc > 0) ? -rc : rc;\ndiff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h\nindex 37821b493e..4373761c29 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.h\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.h\n@@ -252,6 +252,8 @@ struct mlx5_hca_attr {\n \tuint32_t umr_modify_entity_size_disabled:1;\n \tuint32_t umr_indirect_mkey_disabled:1;\n \tuint32_t log_min_stride_wqe_sz:5;\n+\tuint32_t esw_mgr_vport_id_valid:1; /* E-Switch Mgr vport ID is valid. */\n+\tuint16_t esw_mgr_vport_id; /* E-Switch Mgr vport ID . */\n \tuint16_t max_wqe_sz_sq;\n };\n \ndiff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 495b63191a..b9e39aa717 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -1264,6 +1264,7 @@ enum {\n \tMLX5_GET_HCA_CAP_OP_MOD_QOS_CAP = 0xc << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_ROCE = 0x4 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_NIC_FLOW_TABLE = 0x7 << 1,\n+\tMLX5_SET_HCA_CAP_OP_MOD_ESW = 0x9 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_VDPA_EMULATION = 0x13 << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_PARSE_GRAPH_NODE_CAP = 0x1C << 1,\n \tMLX5_GET_HCA_CAP_OP_MOD_GENERAL_DEVICE_2 = 0x20 << 1,\n@@ -1926,6 +1927,16 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {\n \tu8 reserved_at_100[0x700];\n };\n \n+struct mlx5_ifc_esw_cap_bits {\n+\tu8 reserved_at_0[0x60];\n+\n+\tu8 esw_manager_vport_number_valid[0x1];\n+\tu8 reserved_at_61[0xf];\n+\tu8 esw_manager_vport_number[0x10];\n+\n+\tu8 reserved_at_80[0x780];\n+};\n+\n union mlx5_ifc_hca_cap_union_bits {\n \tstruct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;\n \tstruct mlx5_ifc_cmd_hca_cap_2_bits cmd_hca_cap_2;\n@@ -1934,6 +1945,7 @@ union mlx5_ifc_hca_cap_union_bits {\n \tstruct mlx5_ifc_qos_cap_bits qos_cap;\n \tstruct mlx5_ifc_virtio_emulation_cap_bits vdpa_caps;\n \tstruct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap;\n+\tstruct mlx5_ifc_esw_cap_bits esw_cap;\n \tstruct mlx5_ifc_roce_caps_bits roce_caps;\n \tu8 reserved_at_0[0x8000];\n };\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex c30cb4c203..272f000a99 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -97,6 +97,10 @@ static int16_t\n flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_common_device *cdev = priv->sh->cdev;\n+\n+\tif (cdev->config.hca_attr.esw_mgr_vport_id_valid)\n+\t\treturn (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;\n \n \tif (priv->pci_dev == NULL)\n \t\treturn 0;\n", "prefixes": [ "v1" ] }