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GET /api/patches/106936/?format=api
{ "id": 106936, "url": "http://patches.dpdk.org/api/patches/106936/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20220207072932.22409-8-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220207072932.22409-8-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220207072932.22409-8-ndabilpuram@marvell.com", "date": "2022-02-07T07:29:20", "name": "[08/20] common/cnxk: use SSO time counter threshold for IRQ", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "3fbad82f3ee6d15527514adea7af01306a960432", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20220207072932.22409-8-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 21483, "url": "http://patches.dpdk.org/api/series/21483/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21483", "date": "2022-02-07T07:29:13", "name": "[01/20] common/cnxk: increase resource count for bitmap alloc", "version": 1, "mbox": "http://patches.dpdk.org/series/21483/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/106936/comments/", "check": "pending", "checks": "http://patches.dpdk.org/api/patches/106936/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8ED0BA034F;\n\tMon, 7 Feb 2022 08:30:37 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B76DD41153;\n\tMon, 7 Feb 2022 08:30:17 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 22B0F410FD\n for <dev@dpdk.org>; Mon, 7 Feb 2022 08:30:15 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 216LsOhG030467\n for <dev@dpdk.org>; Sun, 6 Feb 2022 23:30:14 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3e1smr4p28-12\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Sun, 06 Feb 2022 23:30:14 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Sun, 6 Feb 2022 23:30:10 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Sun, 6 Feb 2022 23:30:10 -0800", "from hyd1588t430.marvell.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id B24DC3F7068;\n Sun, 6 Feb 2022 23:30:07 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=TYz3/d/oHTy99bOVXKaHoQ8nPS+wG+4f4HUoF2t6Hj0=;\n b=jQ3Z2NqYoBPP15KBneeVyImorbPa5kWRaXG7o3MhxVmfpOCtUFllYQTj53utOCJag0VG\n Ww597VBamSzlKKEtDbrREnDrQAUL9jAbx9c7XTQtisYAUjIlzTsRh2bCweOegxXGTQcy\n +3q/iS94B9wZvcmM7QRB7+sXS+Khhs6dzHBMrEK8wz9ztjqln+jqU6yNK/GCQkwH07dK\n y+iVyf54Ulkco9Tkr1XHD45/0UbIS87+wMtL3yy3/eS00wCQpasWH8jUT3GXFzHXQDIN\n oygnGPDI93EhhlmuUVvHJfHrtjW6welkexajGgBR06VD+bZoPwHfckxArfPxLLVr8hyT 6w==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "<jerinj@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 08/20] common/cnxk: use SSO time counter threshold for IRQ", "Date": "Mon, 7 Feb 2022 12:59:20 +0530", "Message-ID": "<20220207072932.22409-8-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.8.4", "In-Reply-To": "<20220207072932.22409-1-ndabilpuram@marvell.com>", "References": "<20220207072932.22409-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "LSWiYU6N6IAM2twe6vTH0kjp7V0dP79y", "X-Proofpoint-ORIG-GUID": "LSWiYU6N6IAM2twe6vTH0kjp7V0dP79y", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2022-02-07_02,2022-02-03_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enable time counter based threshold for raising SSO\nEXE_INT instead of IAQ threshold.\n\nSigned-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>\n---\n drivers/common/cnxk/roc_nix_inl_dev_irq.c | 13 ++++++++++---\n 1 file changed, 10 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_nix_inl_dev_irq.c b/drivers/common/cnxk/roc_nix_inl_dev_irq.c\nindex d758e0c..8a0cb74 100644\n--- a/drivers/common/cnxk/roc_nix_inl_dev_irq.c\n+++ b/drivers/common/cnxk/roc_nix_inl_dev_irq.c\n@@ -5,6 +5,8 @@\n #include \"roc_api.h\"\n #include \"roc_priv.h\"\n \n+#define WORK_LIMIT 1000\n+\n static void\n nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)\n {\n@@ -15,6 +17,7 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)\n \t\t__uint128_t get_work;\n \t\tuint64_t u64[2];\n \t} gw;\n+\tuint16_t cnt = 0;\n \tuint64_t work;\n \n again:\n@@ -33,7 +36,9 @@ nix_inl_sso_work_cb(struct nix_inl_dev *inl_dev)\n \t\telse\n \t\t\tplt_warn(\"Undelivered inl dev work gw0: %p gw1: %p\",\n \t\t\t\t (void *)gw.u64[0], (void *)gw.u64[1]);\n-\t\tgoto again;\n+\t\tcnt++;\n+\t\tif (cnt < WORK_LIMIT)\n+\t\t\tgoto again;\n \t}\n \n \tplt_atomic_thread_fence(__ATOMIC_ACQ_REL);\n@@ -138,8 +143,10 @@ nix_inl_sso_register_irqs(struct nix_inl_dev *inl_dev)\n \t/* Enable hw interrupt */\n \tplt_write64(~0ull, sso_base + SSO_LF_GGRP_INT_ENA_W1S);\n \n-\t/* Setup threshold for work exec interrupt to 1 wqe in IAQ */\n-\tplt_write64(0x1ull, sso_base + SSO_LF_GGRP_INT_THR);\n+\t/* Setup threshold for work exec interrupt to 100us timeout\n+\t * based on time counter.\n+\t */\n+\tplt_write64(BIT_ULL(63) | 10ULL << 48, sso_base + SSO_LF_GGRP_INT_THR);\n \n \treturn rc;\n }\n", "prefixes": [ "08/20" ] }