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GET /api/patches/105231/?format=api
http://patches.dpdk.org/api/patches/105231/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1639732811-1440-30-git-send-email-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1639732811-1440-30-git-send-email-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1639732811-1440-30-git-send-email-anoobj@marvell.com", "date": "2021-12-17T09:20:11", "name": "[v3,29/29] crypto/cnxk: update microcode completion handling", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "5c51dd22f134aec6daa0aaf5b737244287a9cd01", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1639732811-1440-30-git-send-email-anoobj@marvell.com/mbox/", "series": [ { "id": 20965, "url": "http://patches.dpdk.org/api/series/20965/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20965", "date": "2021-12-17T09:19:42", "name": "New features and improvements in cnxk crypto PMD", "version": 3, "mbox": "http://patches.dpdk.org/series/20965/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/105231/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/105231/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 73CA9A0352;\n\tFri, 17 Dec 2021 10:23:25 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4977E4114B;\n\tFri, 17 Dec 2021 10:22:13 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id B6AA64113D\n for <dev@dpdk.org>; Fri, 17 Dec 2021 10:22:11 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1BH3fMFx015144\n for <dev@dpdk.org>; Fri, 17 Dec 2021 01:22:11 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3d0b372th5-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 17 Dec 2021 01:22:11 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 17 Dec 2021 01:22:08 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Fri, 17 Dec 2021 01:22:08 -0800", "from HY-LT1002.marvell.com (HY-LT1002.marvell.com [10.28.176.218])\n by maili.marvell.com (Postfix) with ESMTP id 186893F70A3;\n Fri, 17 Dec 2021 01:22:05 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=yC+xm1cwcBDz9hInoZb9v6YkkOF48+y1SxfbqxBLcTE=;\n b=caGZy5u9eW1mMz8v4WC6FwdnZIMBGdmG7BzJjOXEvXd1GuF8NA95Y1U0bEfP4elUKSS+\n qbY88zkY3jVPF2ssWZs3KL9vhisGYeNDbpy+HVJ/xj6j8TFieAbfySX8zrW6ttXLDP/X\n oZFUg2KFu9g/Hw9nCzvL5u1NQFEtCmhLJ//RFBHXrRmc46Qq/scL7tA4gPwlOjFaNQU5\n lBA6D8Cte8Ot/rVijpQvBJV98Z/pgsa8+qNIUr+VLWV8cruQeEnCYvtHONsUCTZ8rSQJ\n ATZHdcIHbvM38NnPyw2YUdCo0LFYWGBGTo2+pNVCdK3xBlwev8c7gm246DIa+f2twK2I Mw==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Jerin Jacob <jerinj@marvell.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Archana Muniganti\n <marchana@marvell.com>,\n Tejasree Kondoj <ktejasree@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH v3 29/29] crypto/cnxk: update microcode completion handling", "Date": "Fri, 17 Dec 2021 14:50:11 +0530", "Message-ID": "<1639732811-1440-30-git-send-email-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1639732811-1440-1-git-send-email-anoobj@marvell.com>", "References": "<1639676975-1316-1-git-send-email-anoobj@marvell.com>\n <1639732811-1440-1-git-send-email-anoobj@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "Q0v1svI4ohqwhxZkC3Kwdj60gykl_Rl_", "X-Proofpoint-GUID": "Q0v1svI4ohqwhxZkC3Kwdj60gykl_Rl_", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-17_03,2021-12-16_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Update microcode completion code handling to update the required mbuf &\ncrypto op flags. IP checksum good case is now reported by specific\nmicrocode completion code.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 59 ++++++++++---------------------\n drivers/crypto/cnxk/cn10k_ipsec.c | 1 -\n drivers/crypto/cnxk/cn10k_ipsec.h | 1 -\n 3 files changed, 18 insertions(+), 43 deletions(-)", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 1905ea3..d217bbf 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -50,8 +50,7 @@ cn10k_cpt_sym_temp_sess_create(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op)\n \n static __rte_always_inline int __rte_hot\n cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n-\t\t struct cn10k_sec_session *sess,\n-\t\t struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)\n+\t\t struct cn10k_sec_session *sess, struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = op->sym;\n \tstruct cn10k_ipsec_sa *sa;\n@@ -71,10 +70,8 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \n \tif (sa->is_outbound)\n \t\tret = process_outb_sa(&qp->lf, op, sa, inst);\n-\telse {\n-\t\tinfl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;\n+\telse\n \t\tret = process_inb_sa(op, sa, inst);\n-\t}\n \n \treturn ret;\n }\n@@ -127,8 +124,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n \t\t\tsec_sess = get_sec_session_private_data(\n \t\t\t\tsym_op->sec_session);\n-\t\t\tret = cpt_sec_inst_fill(qp, op, sec_sess, infl_req,\n-\t\t\t\t\t\t&inst[0]);\n+\t\t\tret = cpt_sec_inst_fill(qp, op, sec_sess, &inst[0]);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n \t\t\tw7 = sec_sess->sa.inst.w7;\n@@ -346,52 +342,34 @@ static inline void\n cn10k_cpt_sec_post_process(struct rte_crypto_op *cop,\n \t\t\t struct cpt_cn10k_res_s *res)\n {\n-\tstruct rte_mbuf *m = cop->sym->m_src;\n+\tstruct rte_mbuf *mbuf = cop->sym->m_src;\n \tconst uint16_t m_len = res->rlen;\n \n-\tm->data_len = m_len;\n-\tm->pkt_len = m_len;\n-}\n-\n-static inline void\n-cn10k_cpt_sec_ucc_process(struct rte_crypto_op *cop,\n-\t\t\t struct cpt_inflight_req *infl_req,\n-\t\t\t const uint8_t uc_compcode)\n-{\n-\tstruct cn10k_sec_session *sess;\n-\tstruct cn10k_ipsec_sa *sa;\n-\tstruct rte_mbuf *mbuf;\n-\n-\tif (uc_compcode == ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST)\n-\t\tcop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;\n-\n-\tif (!(infl_req->op_flags & CPT_OP_FLAGS_IPSEC_DIR_INBOUND))\n-\t\treturn;\n-\n-\tsess = get_sec_session_private_data(cop->sym->sec_session);\n-\tsa = &sess->sa;\n+\tmbuf->data_len = m_len;\n+\tmbuf->pkt_len = m_len;\n \n-\tmbuf = cop->sym->m_src;\n-\n-\tswitch (uc_compcode) {\n+\tswitch (res->uc_compcode) {\n \tcase ROC_IE_OT_UCC_SUCCESS:\n-\t\tif (sa->ip_csum_enable)\n-\t\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_IP_BADCSUM:\n \t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_BAD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_L4_GOODCSUM:\n-\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD;\n-\t\tif (sa->ip_csum_enable)\n-\t\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_GOOD |\n+\t\t\t\t RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n \t\tbreak;\n \tcase ROC_IE_OT_UCC_SUCCESS_PKT_L4_BADCSUM:\n-\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD;\n-\t\tif (sa->ip_csum_enable)\n-\t\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_L4_CKSUM_BAD |\n+\t\t\t\t RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\t\tbreak;\n+\tcase ROC_IE_OT_UCC_SUCCESS_PKT_IP_GOODCSUM:\n+\t\tmbuf->ol_flags |= RTE_MBUF_F_RX_IP_CKSUM_GOOD;\n+\t\tbreak;\n+\tcase ROC_IE_OT_UCC_SUCCESS_SA_SOFTEXP_FIRST:\n+\t\tcop->aux_flags = RTE_CRYPTO_OP_AUX_FLAGS_IPSEC_SOFT_EXPIRY;\n \t\tbreak;\n \tdefault:\n+\t\tplt_dp_err(\"Success with unknown microcode completion code\");\n \t\tbreak;\n \t}\n }\n@@ -412,7 +390,6 @@ cn10k_cpt_dequeue_post_process(struct cnxk_cpt_qp *qp,\n \t cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n \t\tif (likely(compcode == CPT_COMP_WARN)) {\n \t\t\t/* Success with additional info */\n-\t\t\tcn10k_cpt_sec_ucc_process(cop, infl_req, uc_compcode);\n \t\t\tcn10k_cpt_sec_post_process(cop, res);\n \t\t} else {\n \t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c\nindex a93c211..7f4ccaf 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.c\n@@ -201,7 +201,6 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \tif (ipsec_xfrm->options.ip_csum_enable) {\n \t\tparam1.s.ip_csum_disable =\n \t\t\tROC_IE_OT_SA_INNER_PKT_IP_CSUM_ENABLE;\n-\t\tsa->ip_csum_enable = true;\n \t}\n \n \t/* Disable L4 checksum verification by default */\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h\nindex cc7ca19..647a71c 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.h\n@@ -19,7 +19,6 @@ struct cn10k_ipsec_sa {\n \tuint16_t max_extended_len;\n \tuint16_t iv_offset;\n \tuint8_t iv_length;\n-\tbool ip_csum_enable;\n \tbool is_outbound;\n \n \t/**\n", "prefixes": [ "v3", "29/29" ] }{ "id": 105231, "url": "