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GET /api/patches/105099/?format=api
{ "id": 105099, "url": "http://patches.dpdk.org/api/patches/105099/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211213082226.3646-6-pbhagavatula@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211213082226.3646-6-pbhagavatula@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211213082226.3646-6-pbhagavatula@marvell.com", "date": "2021-12-13T08:22:23", "name": "[6/8] net/cnxk: add CN10K template Rx functions to build", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "7326e70560218d4b91cfa36f29311f931226365b", "submitter": { "id": 1183, "url": "http://patches.dpdk.org/api/people/1183/?format=api", "name": "Pavan Nikhilesh Bhagavatula", "email": "pbhagavatula@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211213082226.3646-6-pbhagavatula@marvell.com/mbox/", "series": [ { "id": 20922, "url": "http://patches.dpdk.org/api/series/20922/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20922", "date": "2021-12-13T08:22:18", "name": "[1/8] net/cnxk: add CN9K segregated Rx functions", "version": 1, "mbox": "http://patches.dpdk.org/series/20922/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/105099/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/105099/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 56B0EA00BE;\n\tMon, 13 Dec 2021 09:23:30 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id F1C624120A;\n\tMon, 13 Dec 2021 09:23:01 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 93D68411FB\n for <dev@dpdk.org>; Mon, 13 Dec 2021 09:23:00 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 1BD7i8N6026809;\n Mon, 13 Dec 2021 00:23:00 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3cx21kg3t3-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Mon, 13 Dec 2021 00:22:59 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Mon, 13 Dec 2021 00:22:58 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Mon, 13 Dec 2021 00:22:58 -0800", "from BG-LT7430.marvell.com (BG-LT7430.marvell.com [10.28.177.176])\n by maili.marvell.com (Postfix) with ESMTP id 7FDD93F7045;\n Mon, 13 Dec 2021 00:22:54 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=h3NgQ5mhsPc7cKTHcnelmzyH1Losf89o8J8bCnvSf1I=;\n b=FV8RCSbhDL6kINRTarKwSi2p+G/lgo7PS0OIs6foBWwtnB4rIO/Jsr8J8KWgzYYlda3t\n EH/k4M7q8u2UZ/4E3ASt4bfVdUCffsLohDRvKudVFZ7qt8yy9YISxHJ2kJysCmW2ul6f\n Sr4Z1ktq7LK8ZjW3ox7xxYZLtNKVZtvIXOrdcnCzpRuL6BIgO3UKcPNi77m+p9v1rfdb\n ZY3tyBS38hzOgnXMOEAiXCuHgJs1GIzz3dsxx+kfiJT5U49hCjeFzLuRowWW7WN0OPNH\n HJl/1ikEfNQXww08La+MGclRn3Z0I+xT8VoGcFqGXLN1DTcGBdaJ2Vk3A4pVMzft9RU8 1w==", "From": "<pbhagavatula@marvell.com>", "To": "<jerinj@marvell.com>, <thomas@monjalon.net>, <david.marchand@redhat.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>, Shijith Thotton\n <sthotton@marvell.com>, Nithin Dabilpuram <ndabilpuram@marvell.com>, \"Kiran\n Kumar K\" <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>,\n Satha Rao <skoteshwar@marvell.com>, Anatoly Burakov\n <anatoly.burakov@intel.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 6/8] net/cnxk: add CN10K template Rx functions to build", "Date": "Mon, 13 Dec 2021 13:52:23 +0530", "Message-ID": "<20211213082226.3646-6-pbhagavatula@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20211213082226.3646-1-pbhagavatula@marvell.com>", "References": "<20211213082226.3646-1-pbhagavatula@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "52eABvhHHcdOlgB1F3657WJPVr-cELnH", "X-Proofpoint-ORIG-GUID": "52eABvhHHcdOlgB1F3657WJPVr-cELnH", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513\n definitions=2021-12-13_03,2021-12-10_01,2021-12-02_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Pavan Nikhilesh <pbhagavatula@marvell.com>\n\nAdd CN10K segregated Rx and event dequeue functions to build,\nadd macros to make future modifications simpler.\n\nSigned-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 114 +++--\n drivers/event/cnxk/cn10k_worker.h | 71 ++-\n drivers/event/cnxk/cn10k_worker_deq.c | 44 --\n drivers/event/cnxk/cn10k_worker_deq_burst.c | 29 --\n drivers/event/cnxk/cn10k_worker_deq_ca.c | 65 ---\n drivers/event/cnxk/cn10k_worker_deq_tmo.c | 72 ---\n drivers/event/cnxk/meson.build | 135 +++++-\n drivers/net/cnxk/cn10k_rx.h | 461 +++++++++-----------\n drivers/net/cnxk/cn10k_rx_mseg.c | 17 -\n drivers/net/cnxk/cn10k_rx_select.c | 67 +++\n drivers/net/cnxk/cn10k_rx_vec.c | 19 -\n drivers/net/cnxk/cn10k_rx_vec_mseg.c | 18 -\n drivers/net/cnxk/meson.build | 40 +-\n 13 files changed, 570 insertions(+), 582 deletions(-)\n delete mode 100644 drivers/event/cnxk/cn10k_worker_deq.c\n delete mode 100644 drivers/event/cnxk/cn10k_worker_deq_burst.c\n delete mode 100644 drivers/event/cnxk/cn10k_worker_deq_ca.c\n delete mode 100644 drivers/event/cnxk/cn10k_worker_deq_tmo.c\n delete mode 100644 drivers/net/cnxk/cn10k_rx_mseg.c\n create mode 100644 drivers/net/cnxk/cn10k_rx_select.c\n delete mode 100644 drivers/net/cnxk/cn10k_rx_vec.c\n delete mode 100644 drivers/net/cnxk/cn10k_rx_vec_mseg.c", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex c5a8c1ae8f..02f3d8235d 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -7,13 +7,7 @@\n #include \"cnxk_worker.h\"\n \n #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n-\t(deq_op = deq_ops[!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_CHECKSUM_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)] \\\n-\t\t\t [!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)])\n+\tdeq_op = deq_ops[dev->rx_offloads & (NIX_RX_OFFLOAD_MAX - 1)]\n \n #define CN10K_SET_EVDEV_ENQ_OP(dev, enq_op, enq_ops) \\\n \t(enq_op = \\\n@@ -291,95 +285,109 @@ static void\n cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n {\n \tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n-\tconst event_dequeue_t sso_hws_deq[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_##name,\n+\tconst event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t sso_hws_deq_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_burst_##name,\n+\tconst event_dequeue_burst_t sso_hws_deq_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_tmo[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_##name,\n+\tconst event_dequeue_t sso_hws_deq_tmo[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_tmo_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_burst_##name,\n-\t\tNIX_RX_FASTPATH_MODES\n+\tconst event_dequeue_burst_t sso_hws_deq_tmo_burst[NIX_RX_OFFLOAD_MAX] =\n+\t\t{\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_burst_##name,\n+\t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n-\t};\n+\t\t};\n \n-\tconst event_dequeue_t sso_hws_deq_ca[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_##name,\n+\tconst event_dequeue_t sso_hws_deq_ca[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_ca_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_ca_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_burst_##name,\n+\tconst event_dequeue_burst_t sso_hws_deq_ca_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_ca_burst_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_seg[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_##name,\n+\tconst event_dequeue_t sso_hws_deq_tmo_ca[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_ca_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_seg_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_seg_burst_##name,\n+\t\tsso_hws_deq_tmo_ca_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_ca_burst_##name,\n+\t\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t\t};\n+\n+\tconst event_dequeue_t sso_hws_deq_seg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_seg_##name,\n+\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n-\tconst event_dequeue_t sso_hws_deq_tmo_seg[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_##name,\n+\tconst event_dequeue_burst_t sso_hws_deq_seg_burst[NIX_RX_OFFLOAD_MAX] =\n+\t\t{\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_seg_burst_##name,\n+\t\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t\t};\n+\n+\tconst event_dequeue_t sso_hws_deq_tmo_seg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_tmo_seg_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_tmo_seg_burst_##name,\n+\t\tsso_hws_deq_tmo_seg_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t\t};\n \n-\tconst event_dequeue_t sso_hws_deq_ca_seg[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_##name,\n+\tconst event_dequeue_t sso_hws_deq_ca_seg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_ca_seg_##name,\n \t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n \tconst event_dequeue_burst_t\n-\t\tsso_hws_deq_ca_seg_burst[2][2][2][2][2][2][2] = {\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\t[f6][f5][f4][f3][f2][f1][f0] = cn10k_sso_hws_deq_ca_seg_burst_##name,\n+\t\tsso_hws_deq_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_ca_seg_burst_##name,\n \t\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t\t};\n+\n+\tconst event_dequeue_t sso_hws_deq_tmo_ca_seg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_ca_seg_##name,\n+\t\tNIX_RX_FASTPATH_MODES\n #undef R\n \t};\n \n+\tconst event_dequeue_burst_t\n+\t\tsso_hws_deq_tmo_ca_seg_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_sso_hws_deq_tmo_ca_seg_burst_##name,\n+\t\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t\t};\n+\n \t/* Tx modes */\n \tconst event_tx_adapter_enqueue_t\n \t\tsso_hws_tx_adptr_enq[2][2][2][2][2][2][2] = {\n@@ -418,6 +426,12 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n \t\t\t\t\t sso_hws_deq_ca_seg_burst);\n \t\t}\n+\t\tif (dev->is_timeout_deq && dev->is_ca_internal_port) {\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo_ca_seg);\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_ca_seg_burst);\n+\t\t}\n \t} else {\n \t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue, sso_hws_deq);\n \t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n@@ -434,6 +448,12 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n \t\t\t\t\t sso_hws_deq_ca_burst);\n \t\t}\n+\t\tif (dev->is_timeout_deq && dev->is_ca_internal_port) {\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue,\n+\t\t\t\t\t sso_hws_deq_tmo_ca);\n+\t\t\tCN10K_SET_EVDEV_DEQ_OP(dev, event_dev->dequeue_burst,\n+\t\t\t\t\t sso_hws_deq_tmo_ca_burst);\n+\t\t}\n \t}\n \tevent_dev->ca_enqueue = cn10k_sso_hws_ca_enq;\n \ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex f8331e88d7..160b90aa27 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -352,7 +352,7 @@ uint16_t __rte_hot cn10k_sso_hws_enq_fwd_burst(void *port,\n uint16_t __rte_hot cn10k_sso_hws_ca_enq(void *port, struct rte_event ev[],\n \t\t\t\t\tuint16_t nb_events);\n \n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n+#define R(name, flags) \\\n \tuint16_t __rte_hot cn10k_sso_hws_deq_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn10k_sso_hws_deq_burst_##name( \\\n@@ -368,6 +368,11 @@ uint16_t __rte_hot cn10k_sso_hws_ca_enq(void *port, struct rte_event ev[],\n \tuint16_t __rte_hot cn10k_sso_hws_deq_ca_burst_##name( \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n \t\tuint64_t timeout_ticks); \\\n+\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_ca_##name( \\\n+\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n+\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_ca_burst_##name( \\\n+\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n+\t\tuint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn10k_sso_hws_deq_seg_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn10k_sso_hws_deq_seg_burst_##name( \\\n@@ -381,12 +386,76 @@ uint16_t __rte_hot cn10k_sso_hws_ca_enq(void *port, struct rte_event ev[],\n \tuint16_t __rte_hot cn10k_sso_hws_deq_ca_seg_##name( \\\n \t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n \tuint16_t __rte_hot cn10k_sso_hws_deq_ca_seg_burst_##name( \\\n+\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n+\t\tuint64_t timeout_ticks); \\\n+\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_ca_seg_##name( \\\n+\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks); \\\n+\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_ca_seg_burst_##name( \\\n \t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n \t\tuint64_t timeout_ticks);\n \n NIX_RX_FASTPATH_MODES\n #undef R\n \n+#define SSO_DEQ(fn, flags) \\\n+\tuint16_t __rte_hot fn(void *port, struct rte_event *ev, \\\n+\t\t\t uint64_t timeout_ticks) \\\n+\t{ \\\n+\t\tstruct cn10k_sso_hws *ws = port; \\\n+ \\\n+\t\tRTE_SET_USED(timeout_ticks); \\\n+\t\tif (ws->swtag_req) { \\\n+\t\t\tws->swtag_req = 0; \\\n+\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n+\t\t\treturn 1; \\\n+\t\t} \\\n+\t\treturn cn10k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem); \\\n+\t}\n+\n+#define SSO_DEQ_SEG(fn, flags)\t SSO_DEQ(fn, flags | NIX_RX_MULTI_SEG_F)\n+#define SSO_DEQ_CA(fn, flags)\t SSO_DEQ(fn, flags | CPT_RX_WQE_F)\n+#define SSO_DEQ_CA_SEG(fn, flags) SSO_DEQ_SEG(fn, flags | CPT_RX_WQE_F)\n+\n+#define SSO_DEQ_TMO(fn, flags) \\\n+\tuint16_t __rte_hot fn(void *port, struct rte_event *ev, \\\n+\t\t\t uint64_t timeout_ticks) \\\n+\t{ \\\n+\t\tstruct cn10k_sso_hws *ws = port; \\\n+\t\tuint16_t ret = 1; \\\n+\t\tuint64_t iter; \\\n+ \\\n+\t\tif (ws->swtag_req) { \\\n+\t\t\tws->swtag_req = 0; \\\n+\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n+\t\t\treturn ret; \\\n+\t\t} \\\n+\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem); \\\n+\t\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++) \\\n+\t\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, \\\n+\t\t\t\t\t\t ws->lookup_mem); \\\n+\t\treturn ret; \\\n+\t}\n+\n+#define SSO_DEQ_TMO_SEG(fn, flags) SSO_DEQ_TMO(fn, flags | NIX_RX_MULTI_SEG_F)\n+#define SSO_DEQ_TMO_CA(fn, flags) SSO_DEQ_TMO(fn, flags | CPT_RX_WQE_F)\n+#define SSO_DEQ_TMO_CA_SEG(fn, flags) SSO_DEQ_TMO_SEG(fn, flags | CPT_RX_WQE_F)\n+\n+#define SSO_CMN_DEQ_BURST(fnb, fn, flags) \\\n+\tuint16_t __rte_hot fnb(void *port, struct rte_event ev[], \\\n+\t\t\t uint16_t nb_events, uint64_t timeout_ticks) \\\n+\t{ \\\n+\t\tRTE_SET_USED(nb_events); \\\n+\t\treturn fn(port, ev, timeout_ticks); \\\n+\t}\n+\n+#define SSO_CMN_DEQ_SEG_BURST(fnb, fn, flags) \\\n+\tuint16_t __rte_hot fnb(void *port, struct rte_event ev[], \\\n+\t\t\t uint16_t nb_events, uint64_t timeout_ticks) \\\n+\t{ \\\n+\t\tRTE_SET_USED(nb_events); \\\n+\t\treturn fn(port, ev, timeout_ticks); \\\n+\t}\n+\n static __rte_always_inline struct cn10k_eth_txq *\n cn10k_sso_hws_xtract_meta(struct rte_mbuf *m,\n \t\t\t const uint64_t txq_data[][RTE_MAX_QUEUES_PER_PORT])\ndiff --git a/drivers/event/cnxk/cn10k_worker_deq.c b/drivers/event/cnxk/cn10k_worker_deq.c\ndeleted file mode 100644\nindex 6083f69ffb..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_deq.c\n+++ /dev/null\n@@ -1,44 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-#include \"cnxk_eventdev.h\"\n-#include \"cnxk_worker.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tRTE_SET_USED(timeout_ticks); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn 1; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_seg_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tRTE_SET_USED(timeout_ticks); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn 1; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_get_work( \\\n-\t\t\tws, ev, flags | NIX_RX_MULTI_SEG_F, ws->lookup_mem); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/event/cnxk/cn10k_worker_deq_burst.c b/drivers/event/cnxk/cn10k_worker_deq_burst.c\ndeleted file mode 100644\nindex 8539d5d2ed..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_deq_burst.c\n+++ /dev/null\n@@ -1,29 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-#include \"cnxk_eventdev.h\"\n-#include \"cnxk_worker.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_##name(port, ev, timeout_ticks); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_seg_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_seg_##name(port, ev, timeout_ticks); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/event/cnxk/cn10k_worker_deq_ca.c b/drivers/event/cnxk/cn10k_worker_deq_ca.c\ndeleted file mode 100644\nindex 15c698edf8..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_deq_ca.c\n+++ /dev/null\n@@ -1,65 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-#include \"cnxk_eventdev.h\"\n-#include \"cnxk_worker.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_ca_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tRTE_SET_USED(timeout_ticks); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn 1; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_get_work(ws, ev, flags | CPT_RX_WQE_F, \\\n-\t\t\t\t\t ws->lookup_mem); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_ca_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_ca_##name(port, ev, timeout_ticks); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_ca_seg_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tRTE_SET_USED(timeout_ticks); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn 1; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_get_work( \\\n-\t\t\tws, ev, flags | NIX_RX_MULTI_SEG_F | CPT_RX_WQE_F, \\\n-\t\t\tws->lookup_mem); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_ca_seg_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_ca_seg_##name(port, ev, \\\n-\t\t\t\t\t\t timeout_ticks); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/event/cnxk/cn10k_worker_deq_tmo.c b/drivers/event/cnxk/cn10k_worker_deq_tmo.c\ndeleted file mode 100644\nindex 537ae37170..0000000000\n--- a/drivers/event/cnxk/cn10k_worker_deq_tmo.c\n+++ /dev/null\n@@ -1,72 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_worker.h\"\n-#include \"cnxk_eventdev.h\"\n-#include \"cnxk_worker.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\tuint16_t ret = 1; \\\n-\t\tuint64_t iter; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn ret; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem); \\\n-\t\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++) \\\n-\t\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, \\\n-\t\t\t\t\t\t ws->lookup_mem); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn ret; \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_tmo_##name(port, ev, timeout_ticks); \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_seg_##name( \\\n-\t\tvoid *port, struct rte_event *ev, uint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tstruct cn10k_sso_hws *ws = port; \\\n-\t\tuint16_t ret = 1; \\\n-\t\tuint64_t iter; \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tif (ws->swtag_req) { \\\n-\t\t\tws->swtag_req = 0; \\\n-\t\t\tcnxk_sso_hws_swtag_wait(ws->base + SSOW_LF_GWS_WQE0); \\\n-\t\t\treturn ret; \\\n-\t\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, ws->lookup_mem); \\\n-\t\tfor (iter = 1; iter < timeout_ticks && (ret == 0); iter++) \\\n-\t\t\tret = cn10k_sso_hws_get_work(ws, ev, flags, \\\n-\t\t\t\t\t\t ws->lookup_mem); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn ret; \\\n-\t} \\\n-\t\t\t\t\t\t\t\t\t \\\n-\tuint16_t __rte_hot cn10k_sso_hws_deq_tmo_seg_burst_##name( \\\n-\t\tvoid *port, struct rte_event ev[], uint16_t nb_events, \\\n-\t\tuint64_t timeout_ticks) \\\n-\t{ \\\n-\t\tRTE_SET_USED(nb_events); \\\n-\t\t\t\t\t\t\t\t\t \\\n-\t\treturn cn10k_sso_hws_deq_tmo_seg_##name(port, ev, \\\n-\t\t\t\t\t\t\ttimeout_ticks); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex c39515dadc..ac452fe451 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -13,10 +13,6 @@ sources = files(\n 'cn9k_worker.c',\n 'cn10k_eventdev.c',\n 'cn10k_worker.c',\n- 'cn10k_worker_deq.c',\n- 'cn10k_worker_deq_burst.c',\n- 'cn10k_worker_deq_ca.c',\n- 'cn10k_worker_deq_tmo.c',\n 'cn10k_worker_tx_enq.c',\n 'cn10k_worker_tx_enq_seg.c',\n 'cnxk_eventdev.c',\n@@ -327,6 +323,137 @@ sources += files(\n 'tx/cn9k/tx_112_127_dual_seg.c',\n )\n \n+sources += files(\n+ 'deq/cn10k/deq_0_15_burst.c',\n+ 'deq/cn10k/deq_16_31_burst.c',\n+ 'deq/cn10k/deq_32_47_burst.c',\n+ 'deq/cn10k/deq_48_63_burst.c',\n+ 'deq/cn10k/deq_64_79_burst.c',\n+ 'deq/cn10k/deq_80_95_burst.c',\n+ 'deq/cn10k/deq_96_111_burst.c',\n+ 'deq/cn10k/deq_112_127_burst.c',\n+ 'deq/cn10k/deq_0_15_seg_burst.c',\n+ 'deq/cn10k/deq_16_31_seg_burst.c',\n+ 'deq/cn10k/deq_32_47_seg_burst.c',\n+ 'deq/cn10k/deq_48_63_seg_burst.c',\n+ 'deq/cn10k/deq_64_79_seg_burst.c',\n+ 'deq/cn10k/deq_80_95_seg_burst.c',\n+ 'deq/cn10k/deq_96_111_seg_burst.c',\n+ 'deq/cn10k/deq_112_127_seg_burst.c',\n+ 'deq/cn10k/deq_0_15.c',\n+ 'deq/cn10k/deq_16_31.c',\n+ 'deq/cn10k/deq_32_47.c',\n+ 'deq/cn10k/deq_48_63.c',\n+ 'deq/cn10k/deq_64_79.c',\n+ 'deq/cn10k/deq_80_95.c',\n+ 'deq/cn10k/deq_96_111.c',\n+ 'deq/cn10k/deq_112_127.c',\n+ 'deq/cn10k/deq_0_15_seg.c',\n+ 'deq/cn10k/deq_16_31_seg.c',\n+ 'deq/cn10k/deq_32_47_seg.c',\n+ 'deq/cn10k/deq_48_63_seg.c',\n+ 'deq/cn10k/deq_64_79_seg.c',\n+ 'deq/cn10k/deq_80_95_seg.c',\n+ 'deq/cn10k/deq_96_111_seg.c',\n+ 'deq/cn10k/deq_112_127_seg.c',\n+ 'deq/cn10k/deq_0_15_tmo.c',\n+ 'deq/cn10k/deq_16_31_tmo.c',\n+ 'deq/cn10k/deq_32_47_tmo.c',\n+ 'deq/cn10k/deq_48_63_tmo.c',\n+ 'deq/cn10k/deq_64_79_tmo.c',\n+ 'deq/cn10k/deq_80_95_tmo.c',\n+ 'deq/cn10k/deq_96_111_tmo.c',\n+ 'deq/cn10k/deq_112_127_tmo.c',\n+ 'deq/cn10k/deq_0_15_tmo_burst.c',\n+ 'deq/cn10k/deq_16_31_tmo_burst.c',\n+ 'deq/cn10k/deq_32_47_tmo_burst.c',\n+ 'deq/cn10k/deq_48_63_tmo_burst.c',\n+ 'deq/cn10k/deq_64_79_tmo_burst.c',\n+ 'deq/cn10k/deq_80_95_tmo_burst.c',\n+ 'deq/cn10k/deq_96_111_tmo_burst.c',\n+ 'deq/cn10k/deq_112_127_tmo_burst.c',\n+ 'deq/cn10k/deq_0_15_tmo_seg.c',\n+ 'deq/cn10k/deq_16_31_tmo_seg.c',\n+ 'deq/cn10k/deq_32_47_tmo_seg.c',\n+ 'deq/cn10k/deq_48_63_tmo_seg.c',\n+ 'deq/cn10k/deq_64_79_tmo_seg.c',\n+ 'deq/cn10k/deq_80_95_tmo_seg.c',\n+ 'deq/cn10k/deq_96_111_tmo_seg.c',\n+ 'deq/cn10k/deq_112_127_tmo_seg.c',\n+ 'deq/cn10k/deq_0_15_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_16_31_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_32_47_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_48_63_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_64_79_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_80_95_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_96_111_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_112_127_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_0_15_ca.c',\n+ 'deq/cn10k/deq_16_31_ca.c',\n+ 'deq/cn10k/deq_32_47_ca.c',\n+ 'deq/cn10k/deq_48_63_ca.c',\n+ 'deq/cn10k/deq_64_79_ca.c',\n+ 'deq/cn10k/deq_80_95_ca.c',\n+ 'deq/cn10k/deq_96_111_ca.c',\n+ 'deq/cn10k/deq_112_127_ca.c',\n+ 'deq/cn10k/deq_0_15_ca_burst.c',\n+ 'deq/cn10k/deq_16_31_ca_burst.c',\n+ 'deq/cn10k/deq_32_47_ca_burst.c',\n+ 'deq/cn10k/deq_48_63_ca_burst.c',\n+ 'deq/cn10k/deq_64_79_ca_burst.c',\n+ 'deq/cn10k/deq_80_95_ca_burst.c',\n+ 'deq/cn10k/deq_96_111_ca_burst.c',\n+ 'deq/cn10k/deq_112_127_ca_burst.c',\n+ 'deq/cn10k/deq_0_15_ca_seg.c',\n+ 'deq/cn10k/deq_16_31_ca_seg.c',\n+ 'deq/cn10k/deq_32_47_ca_seg.c',\n+ 'deq/cn10k/deq_48_63_ca_seg.c',\n+ 'deq/cn10k/deq_64_79_ca_seg.c',\n+ 'deq/cn10k/deq_80_95_ca_seg.c',\n+ 'deq/cn10k/deq_96_111_ca_seg.c',\n+ 'deq/cn10k/deq_112_127_ca_seg.c',\n+ 'deq/cn10k/deq_0_15_ca_seg_burst.c',\n+ 'deq/cn10k/deq_16_31_ca_seg_burst.c',\n+ 'deq/cn10k/deq_32_47_ca_seg_burst.c',\n+ 'deq/cn10k/deq_48_63_ca_seg_burst.c',\n+ 'deq/cn10k/deq_64_79_ca_seg_burst.c',\n+ 'deq/cn10k/deq_80_95_ca_seg_burst.c',\n+ 'deq/cn10k/deq_96_111_ca_seg_burst.c',\n+ 'deq/cn10k/deq_112_127_ca_seg_burst.c',\n+ 'deq/cn10k/deq_0_15_ca_tmo.c',\n+ 'deq/cn10k/deq_16_31_ca_tmo.c',\n+ 'deq/cn10k/deq_32_47_ca_tmo.c',\n+ 'deq/cn10k/deq_48_63_ca_tmo.c',\n+ 'deq/cn10k/deq_64_79_ca_tmo.c',\n+ 'deq/cn10k/deq_80_95_ca_tmo.c',\n+ 'deq/cn10k/deq_96_111_ca_tmo.c',\n+ 'deq/cn10k/deq_112_127_ca_tmo.c',\n+ 'deq/cn10k/deq_0_15_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_16_31_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_32_47_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_48_63_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_64_79_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_80_95_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_96_111_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_112_127_ca_tmo_burst.c',\n+ 'deq/cn10k/deq_0_15_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_16_31_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_32_47_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_48_63_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_64_79_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_80_95_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_96_111_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_112_127_ca_tmo_seg.c',\n+ 'deq/cn10k/deq_0_15_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_16_31_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_32_47_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_48_63_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_64_79_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_80_95_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_96_111_ca_tmo_seg_burst.c',\n+ 'deq/cn10k/deq_112_127_ca_tmo_seg_burst.c',\n+)\n+\n extra_flags = ['-flax-vector-conversions', '-Wno-strict-aliasing']\n foreach flag: extra_flags\n if cc.has_argument(flag)\ndiff --git a/drivers/net/cnxk/cn10k_rx.h b/drivers/net/cnxk/cn10k_rx.h\nindex fe408907a6..a2442d3726 100644\n--- a/drivers/net/cnxk/cn10k_rx.h\n+++ b/drivers/net/cnxk/cn10k_rx.h\n@@ -17,6 +17,7 @@\n #define NIX_RX_OFFLOAD_TSTAMP_F\t BIT(4)\n #define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(5)\n #define NIX_RX_OFFLOAD_SECURITY_F BIT(6)\n+#define NIX_RX_OFFLOAD_MAX\t (NIX_RX_OFFLOAD_SECURITY_F << 1)\n \n /* Flags to control cqe_to_mbuf conversion function.\n * Defining it from backwards to denote its been\n@@ -987,278 +988,214 @@ cn10k_nix_recv_pkts_vector(void *args, struct rte_mbuf **mbufs, uint16_t pkts,\n #define R_SEC_F NIX_RX_OFFLOAD_SECURITY_F\n \n /* [R_SEC_F] [RX_VLAN_F] [TS] [MARK] [CKSUM] [PTYPE] [RSS] */\n-#define NIX_RX_FASTPATH_MODES\t\t\t\t\t\t \\\n-R(no_offload,\t\t\t0, 0, 0, 0, 0, 0, 0,\t\t\t \\\n-\t\tNIX_RX_OFFLOAD_NONE)\t\t\t\t\t \\\n-R(rss,\t\t\t\t0, 0, 0, 0, 0, 0, 1,\t\t\t \\\n-\t\tRSS_F)\t\t\t\t\t\t\t \\\n-R(ptype,\t\t\t0, 0, 0, 0, 0, 1, 0,\t\t\t \\\n-\t\tPTYPE_F)\t\t\t\t\t\t \\\n-R(ptype_rss,\t\t\t0, 0, 0, 0, 0, 1, 1,\t\t\t \\\n-\t\tPTYPE_F | RSS_F)\t\t\t\t\t \\\n-R(cksum,\t\t\t0, 0, 0, 0, 1, 0, 0,\t\t\t \\\n-\t\tCKSUM_F)\t\t\t\t\t\t \\\n-R(cksum_rss,\t\t\t0, 0, 0, 0, 1, 0, 1,\t\t\t \\\n-\t\tCKSUM_F | RSS_F)\t\t\t\t\t \\\n-R(cksum_ptype,\t\t\t0, 0, 0, 0, 1, 1, 0,\t\t\t \\\n-\t\tCKSUM_F | PTYPE_F)\t\t\t\t\t \\\n-R(cksum_ptype_rss,\t\t0, 0, 0, 0, 1, 1, 1,\t\t\t \\\n-\t\tCKSUM_F | PTYPE_F | RSS_F)\t\t\t\t \\\n-R(mark,\t\t\t\t0, 0, 0, 1, 0, 0, 0,\t\t\t \\\n-\t\tMARK_F)\t\t\t\t\t\t\t \\\n-R(mark_rss,\t\t\t0, 0, 0, 1, 0, 0, 1,\t\t\t \\\n-\t\tMARK_F | RSS_F)\t\t\t\t\t\t \\\n-R(mark_ptype,\t\t\t0, 0, 0, 1, 0, 1, 0,\t\t\t \\\n-\t\tMARK_F | PTYPE_F)\t\t\t\t\t \\\n-R(mark_ptype_rss,\t\t0, 0, 0, 1, 0, 1, 1,\t\t\t \\\n-\t\tMARK_F | PTYPE_F | RSS_F)\t\t\t\t \\\n-R(mark_cksum,\t\t\t0, 0, 0, 1, 1, 0, 0,\t\t\t \\\n-\t\tMARK_F | CKSUM_F)\t\t\t\t\t \\\n-R(mark_cksum_rss,\t\t0, 0, 0, 1, 1, 0, 1,\t\t\t \\\n-\t\tMARK_F | CKSUM_F | RSS_F)\t\t\t\t \\\n-R(mark_cksum_ptype,\t\t0, 0, 0, 1, 1, 1, 0,\t\t\t \\\n-\t\tMARK_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n-R(mark_cksum_ptype_rss,\t\t0, 0, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\tMARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(ts,\t\t\t\t0, 0, 1, 0, 0, 0, 0,\t\t\t \\\n-\t\tTS_F)\t\t\t\t\t\t\t \\\n-R(ts_rss,\t\t\t0, 0, 1, 0, 0, 0, 1,\t\t\t \\\n-\t\tTS_F | RSS_F)\t\t\t\t\t\t \\\n-R(ts_ptype,\t\t\t0, 0, 1, 0, 0, 1, 0,\t\t\t \\\n-\t\tTS_F | PTYPE_F)\t\t\t\t\t\t \\\n-R(ts_ptype_rss,\t\t\t0, 0, 1, 0, 0, 1, 1,\t\t\t \\\n-\t\tTS_F | PTYPE_F | RSS_F)\t\t\t\t\t \\\n-R(ts_cksum,\t\t\t0, 0, 1, 0, 1, 0, 0,\t\t\t \\\n-\t\tTS_F | CKSUM_F)\t\t\t\t\t\t \\\n-R(ts_cksum_rss,\t\t\t0, 0, 1, 0, 1, 0, 1,\t\t\t \\\n-\t\tTS_F | CKSUM_F | RSS_F)\t\t\t\t\t \\\n-R(ts_cksum_ptype,\t\t0, 0, 1, 0, 1, 1, 0,\t\t\t \\\n-\t\tTS_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n-R(ts_cksum_ptype_rss,\t\t0, 0, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\tTS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(ts_mark,\t\t\t0, 0, 1, 1, 0, 0, 0,\t\t\t \\\n-\t\tTS_F | MARK_F)\t\t\t\t\t\t \\\n-R(ts_mark_rss,\t\t\t0, 0, 1, 1, 0, 0, 1,\t\t\t \\\n-\t\tTS_F | MARK_F | RSS_F)\t\t\t\t\t \\\n-R(ts_mark_ptype,\t\t0, 0, 1, 1, 0, 1, 0,\t\t\t \\\n-\t\tTS_F | MARK_F | PTYPE_F)\t\t\t\t \\\n-R(ts_mark_ptype_rss,\t\t0, 0, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\tTS_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(ts_mark_cksum,\t\t0, 0, 1, 1, 1, 0, 0,\t\t\t \\\n-\t\tTS_F | MARK_F | CKSUM_F)\t\t\t\t \\\n-R(ts_mark_cksum_rss,\t\t0, 0, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\tTS_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(ts_mark_cksum_ptype,\t\t0, 0, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(ts_mark_cksum_ptype_rss,\t0, 0, 1, 1, 1, 1, 1,\t\t\t \\\n-\t\tTS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan,\t\t\t\t0, 1, 0, 0, 0, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F)\t\t\t\t\t\t \\\n-R(vlan_rss,\t\t\t0, 1, 0, 0, 0, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | RSS_F)\t\t\t\t\t \\\n-R(vlan_ptype,\t\t\t0, 1, 0, 0, 0, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | PTYPE_F)\t\t\t\t\t \\\n-R(vlan_ptype_rss,\t\t0, 1, 0, 0, 0, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | PTYPE_F | RSS_F)\t\t\t\t \\\n-R(vlan_cksum,\t\t\t0, 1, 0, 0, 1, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | CKSUM_F)\t\t\t\t\t \\\n-R(vlan_cksum_rss,\t\t0, 1, 0, 0, 1, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | CKSUM_F | RSS_F)\t\t\t\t \\\n-R(vlan_cksum_ptype,\t\t0, 1, 0, 0, 1, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n-R(vlan_cksum_ptype_rss,\t\t0, 1, 0, 0, 1, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(vlan_mark,\t\t\t0, 1, 0, 1, 0, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F)\t\t\t\t\t \\\n-R(vlan_mark_rss,\t\t0, 1, 0, 1, 0, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | RSS_F)\t\t\t\t \\\n-R(vlan_mark_ptype,\t\t0, 1, 0, 1, 0, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | PTYPE_F)\t\t\t\t \\\n-R(vlan_mark_ptype_rss,\t\t0, 1, 0, 1, 0, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(vlan_mark_cksum,\t\t0, 1, 0, 1, 1, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | CKSUM_F)\t\t\t\t \\\n-R(vlan_mark_cksum_rss,\t\t0, 1, 0, 1, 1, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(vlan_mark_cksum_ptype,\t0, 1, 0, 1, 1, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(vlan_mark_cksum_ptype_rss,\t0, 1, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_ts,\t\t\t0, 1, 1, 0, 0, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F)\t\t\t\t\t \\\n-R(vlan_ts_rss,\t\t\t0, 1, 1, 0, 0, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | RSS_F)\t\t\t\t \\\n-R(vlan_ts_ptype,\t\t0, 1, 1, 0, 0, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | PTYPE_F)\t\t\t\t \\\n-R(vlan_ts_ptype_rss,\t\t0, 1, 1, 0, 0, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(vlan_ts_cksum,\t\t0, 1, 1, 0, 1, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | CKSUM_F)\t\t\t\t \\\n-R(vlan_ts_cksum_rss,\t\t0, 1, 1, 0, 1, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(vlan_ts_cksum_ptype,\t\t0, 1, 1, 0, 1, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(vlan_ts_cksum_ptype_rss,\t0, 1, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_ts_mark,\t\t\t0, 1, 1, 1, 0, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F)\t\t\t\t \\\n-R(vlan_ts_mark_rss,\t\t0, 1, 1, 1, 0, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | RSS_F)\t\t\t \\\n-R(vlan_ts_mark_ptype,\t\t0, 1, 1, 1, 0, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F)\t\t\t \\\n-R(vlan_ts_mark_ptype_rss,\t0, 1, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n-R(vlan_ts_mark_cksum,\t\t0, 1, 1, 1, 1, 0, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F)\t\t\t \\\n-R(vlan_ts_mark_cksum_rss,\t0, 1, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n-R(vlan_ts_mark_cksum_ptype,\t0, 1, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(vlan_ts_mark_cksum_ptype_rss,\t0, 1, 1, 1, 1, 1, 1,\t\t\t \\\n-\t\tRX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(sec,\t\t\t\t1, 0, 0, 0, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F)\t\t\t\t\t\t \\\n-R(sec_rss,\t\t\t1, 0, 0, 0, 0, 0, 1,\t\t\t \\\n-\t\tRSS_F)\t\t\t\t\t\t\t \\\n-R(sec_ptype,\t\t\t1, 0, 0, 0, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | PTYPE_F)\t\t\t\t\t \\\n-R(sec_ptype_rss,\t\t1, 0, 0, 0, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | PTYPE_F | RSS_F)\t\t\t\t \\\n-R(sec_cksum,\t\t\t1, 0, 0, 0, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | CKSUM_F)\t\t\t\t\t \\\n-R(sec_cksum_rss,\t\t1, 0, 0, 0, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | CKSUM_F | RSS_F)\t\t\t\t \\\n-R(sec_cksum_ptype,\t\t1, 0, 0, 0, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | CKSUM_F | PTYPE_F)\t\t\t\t \\\n-R(sec_cksum_ptype_rss,\t\t1, 0, 0, 0, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | CKSUM_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(sec_mark,\t\t\t1, 0, 0, 1, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | MARK_F)\t\t\t\t\t \\\n-R(sec_mark_rss,\t\t\t1, 0, 0, 1, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | RSS_F)\t\t\t\t \\\n-R(sec_mark_ptype,\t\t1, 0, 0, 1, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | PTYPE_F)\t\t\t\t \\\n-R(sec_mark_ptype_rss,\t\t1, 0, 0, 1, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(sec_mark_cksum,\t\t1, 0, 0, 1, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | CKSUM_F)\t\t\t\t \\\n-R(sec_mark_cksum_rss,\t\t1, 0, 0, 1, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(sec_mark_cksum_ptype,\t\t1, 0, 0, 1, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(sec_mark_cksum_ptype_rss,\t1, 0, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(sec_ts,\t\t\t1, 0, 1, 0, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F)\t\t\t\t\t\t \\\n-R(sec_ts_rss,\t\t\t1, 0, 1, 0, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | RSS_F)\t\t\t\t\t \\\n-R(sec_ts_ptype,\t\t\t1, 0, 1, 0, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | PTYPE_F)\t\t\t\t \\\n-R(sec_ts_ptype_rss,\t\t1, 0, 1, 0, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(sec_ts_cksum,\t\t\t1, 0, 1, 0, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | CKSUM_F)\t\t\t\t \\\n-R(sec_ts_cksum_rss,\t\t1, 0, 1, 0, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(sec_ts_cksum_ptype,\t\t1, 0, 1, 0, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | CKSUM_F | PTYPE_F)\t\t\t \\\n-R(sec_ts_cksum_ptype_rss,\t1, 0, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t\t \\\n-R(sec_ts_mark,\t\t\t1, 0, 1, 1, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F)\t\t\t\t \\\n-R(sec_ts_mark_rss,\t\t1, 0, 1, 1, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | RSS_F)\t\t\t \\\n-R(sec_ts_mark_ptype,\t\t1, 0, 1, 1, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | PTYPE_F)\t\t\t \\\n-R(sec_ts_mark_ptype_rss,\t1, 0, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n-R(sec_ts_mark_cksum,\t\t1, 0, 1, 1, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F)\t\t\t \\\n-R(sec_ts_mark_cksum_rss,\t1, 0, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n-R(sec_ts_mark_cksum_ptype,\t1, 0, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(sec_ts_mark_cksum_ptype_rss,\t1, 0, 1, 1, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(sec_vlan,\t\t\t1, 1, 0, 0, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F)\t\t\t\t\t \\\n-R(sec_vlan_rss,\t\t\t1, 1, 0, 0, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | RSS_F)\t\t\t\t \\\n-R(sec_vlan_ptype,\t\t1, 1, 0, 0, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | PTYPE_F)\t\t\t\t \\\n-R(sec_vlan_ptype_rss,\t\t1, 1, 0, 0, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F)\t\t\t \\\n-R(sec_vlan_cksum,\t\t1, 1, 0, 0, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | CKSUM_F)\t\t\t\t \\\n-R(sec_vlan_cksum_rss,\t\t1, 1, 0, 0, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F)\t\t\t \\\n-R(sec_vlan_cksum_ptype,\t\t1, 1, 0, 0, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(sec_vlan_cksum_ptype_rss,\t1, 1, 0, 0, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(sec_vlan_mark,\t\t1, 1, 0, 1, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F)\t\t\t\t \\\n-R(sec_vlan_mark_rss,\t\t1, 1, 0, 1, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | RSS_F)\t\t\t \\\n-R(sec_vlan_mark_ptype,\t\t1, 1, 0, 1, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F)\t\t\t \\\n-R(sec_vlan_mark_ptype_rss,\t1, 1, 0, 1, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F)\t\t \\\n-R(sec_vlan_mark_cksum,\t\t1, 1, 0, 1, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F)\t\t\t \\\n-R(sec_vlan_mark_cksum_rss,\t1, 1, 0, 1, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F)\t\t \\\n-R(sec_vlan_mark_cksum_ptype,\t1, 1, 0, 1, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F)\t \\\n-R(sec_vlan_mark_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \\\n-R(sec_vlan_ts,\t\t\t1, 1, 1, 0, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F)\t\t\t\t \\\n-R(sec_vlan_ts_rss,\t\t1, 1, 1, 0, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | RSS_F)\t\t\t \\\n-R(sec_vlan_ts_ptype,\t\t1, 1, 1, 0, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | PTYPE_F)\t\t\t \\\n-R(sec_vlan_ts_ptype_rss,\t1, 1, 1, 0, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F)\t\t \\\n-R(sec_vlan_ts_cksum,\t\t1, 1, 1, 0, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F)\t\t\t \\\n-R(sec_vlan_ts_cksum_rss,\t1, 1, 1, 0, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F)\t\t \\\n-R(sec_vlan_ts_cksum_ptype,\t1, 1, 1, 0, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F)\t\t \\\n-R(sec_vlan_ts_cksum_ptype_rss,\t1, 1, 1, 0, 1, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F)\t \\\n-R(sec_vlan_ts_mark,\t\t1, 1, 1, 1, 0, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F)\t\t\t \\\n-R(sec_vlan_ts_mark_rss,\t\t1, 1, 1, 1, 0, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F)\t\t \\\n-R(sec_vlan_ts_mark_ptype,\t1, 1, 1, 1, 0, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F)\t\t \\\n-R(sec_vlan_ts_mark_ptype_rss,\t1, 1, 1, 1, 0, 1, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F)\t \\\n-R(sec_vlan_ts_mark_cksum,\t1, 1, 1, 1, 1, 0, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F)\t\t \\\n-R(sec_vlan_ts_mark_cksum_rss,\t1, 1, 1, 1, 1, 0, 1,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F)\t \\\n-R(sec_vlan_ts_mark_cksum_ptype,\t1, 1, 1, 1, 1, 1, 0,\t\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n-R(sec_vlan_ts_mark_cksum_ptype_rss,\t1, 1, 1, 1, 1, 1, 1,\t\t \\\n-\t\tR_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n+#define NIX_RX_FASTPATH_MODES_0_15 \\\n+\tR(no_offload, NIX_RX_OFFLOAD_NONE) \\\n+\tR(rss, RSS_F) \\\n+\tR(ptype, PTYPE_F) \\\n+\tR(ptype_rss, PTYPE_F | RSS_F) \\\n+\tR(cksum, CKSUM_F) \\\n+\tR(cksum_rss, CKSUM_F | RSS_F) \\\n+\tR(cksum_ptype, CKSUM_F | PTYPE_F) \\\n+\tR(cksum_ptype_rss, CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(mark, MARK_F) \\\n+\tR(mark_rss, MARK_F | RSS_F) \\\n+\tR(mark_ptype, MARK_F | PTYPE_F) \\\n+\tR(mark_ptype_rss, MARK_F | PTYPE_F | RSS_F) \\\n+\tR(mark_cksum, MARK_F | CKSUM_F) \\\n+\tR(mark_cksum_rss, MARK_F | CKSUM_F | RSS_F) \\\n+\tR(mark_cksum_ptype, MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(mark_cksum_ptype_rss, MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_16_31 \\\n+\tR(ts, TS_F) \\\n+\tR(ts_rss, TS_F | RSS_F) \\\n+\tR(ts_ptype, TS_F | PTYPE_F) \\\n+\tR(ts_ptype_rss, TS_F | PTYPE_F | RSS_F) \\\n+\tR(ts_cksum, TS_F | CKSUM_F) \\\n+\tR(ts_cksum_rss, TS_F | CKSUM_F | RSS_F) \\\n+\tR(ts_cksum_ptype, TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(ts_cksum_ptype_rss, TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(ts_mark, TS_F | MARK_F) \\\n+\tR(ts_mark_rss, TS_F | MARK_F | RSS_F) \\\n+\tR(ts_mark_ptype, TS_F | MARK_F | PTYPE_F) \\\n+\tR(ts_mark_ptype_rss, TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(ts_mark_cksum, TS_F | MARK_F | CKSUM_F) \\\n+\tR(ts_mark_cksum_rss, TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(ts_mark_cksum_ptype, TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(ts_mark_cksum_ptype_rss, TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_32_47 \\\n+\tR(vlan, RX_VLAN_F) \\\n+\tR(vlan_rss, RX_VLAN_F | RSS_F) \\\n+\tR(vlan_ptype, RX_VLAN_F | PTYPE_F) \\\n+\tR(vlan_ptype_rss, RX_VLAN_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_cksum, RX_VLAN_F | CKSUM_F) \\\n+\tR(vlan_cksum_rss, RX_VLAN_F | CKSUM_F | RSS_F) \\\n+\tR(vlan_cksum_ptype, RX_VLAN_F | CKSUM_F | PTYPE_F) \\\n+\tR(vlan_cksum_ptype_rss, RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_mark, RX_VLAN_F | MARK_F) \\\n+\tR(vlan_mark_rss, RX_VLAN_F | MARK_F | RSS_F) \\\n+\tR(vlan_mark_ptype, RX_VLAN_F | MARK_F | PTYPE_F) \\\n+\tR(vlan_mark_ptype_rss, RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_mark_cksum, RX_VLAN_F | MARK_F | CKSUM_F) \\\n+\tR(vlan_mark_cksum_rss, RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(vlan_mark_cksum_ptype, RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(vlan_mark_cksum_ptype_rss, \\\n+\t RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_48_63 \\\n+\tR(vlan_ts, RX_VLAN_F | TS_F) \\\n+\tR(vlan_ts_rss, RX_VLAN_F | TS_F | RSS_F) \\\n+\tR(vlan_ts_ptype, RX_VLAN_F | TS_F | PTYPE_F) \\\n+\tR(vlan_ts_ptype_rss, RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_ts_cksum, RX_VLAN_F | TS_F | CKSUM_F) \\\n+\tR(vlan_ts_cksum_rss, RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(vlan_ts_cksum_ptype, RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(vlan_ts_cksum_ptype_rss, \\\n+\t RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_ts_mark, RX_VLAN_F | TS_F | MARK_F) \\\n+\tR(vlan_ts_mark_rss, RX_VLAN_F | TS_F | MARK_F | RSS_F) \\\n+\tR(vlan_ts_mark_ptype, RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(vlan_ts_mark_ptype_rss, RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(vlan_ts_mark_cksum, RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(vlan_ts_mark_cksum_rss, RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(vlan_ts_mark_cksum_ptype, \\\n+\t RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(vlan_ts_mark_cksum_ptype_rss, \\\n+\t RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_64_79 \\\n+\tR(sec, R_SEC_F) \\\n+\tR(sec_rss, R_SEC_F | RSS_F) \\\n+\tR(sec_ptype, R_SEC_F | PTYPE_F) \\\n+\tR(sec_ptype_rss, R_SEC_F | PTYPE_F | RSS_F) \\\n+\tR(sec_cksum, R_SEC_F | CKSUM_F) \\\n+\tR(sec_cksum_rss, R_SEC_F | CKSUM_F | RSS_F) \\\n+\tR(sec_cksum_ptype, R_SEC_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_cksum_ptype_rss, R_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(sec_mark, R_SEC_F | MARK_F) \\\n+\tR(sec_mark_rss, R_SEC_F | MARK_F | RSS_F) \\\n+\tR(sec_mark_ptype, R_SEC_F | MARK_F | PTYPE_F) \\\n+\tR(sec_mark_ptype_rss, R_SEC_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(sec_mark_cksum, R_SEC_F | MARK_F | CKSUM_F) \\\n+\tR(sec_mark_cksum_rss, R_SEC_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(sec_mark_cksum_ptype, R_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_mark_cksum_ptype_rss, \\\n+\t R_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_80_95 \\\n+\tR(sec_ts, R_SEC_F | TS_F) \\\n+\tR(sec_ts_rss, R_SEC_F | TS_F | RSS_F) \\\n+\tR(sec_ts_ptype, R_SEC_F | TS_F | PTYPE_F) \\\n+\tR(sec_ts_ptype_rss, R_SEC_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(sec_ts_cksum, R_SEC_F | TS_F | CKSUM_F) \\\n+\tR(sec_ts_cksum_rss, R_SEC_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(sec_ts_cksum_ptype, R_SEC_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_ts_cksum_ptype_rss, R_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(sec_ts_mark, R_SEC_F | TS_F | MARK_F) \\\n+\tR(sec_ts_mark_rss, R_SEC_F | TS_F | MARK_F | RSS_F) \\\n+\tR(sec_ts_mark_ptype, R_SEC_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(sec_ts_mark_ptype_rss, R_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(sec_ts_mark_cksum, R_SEC_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(sec_ts_mark_cksum_rss, R_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(sec_ts_mark_cksum_ptype, \\\n+\t R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_ts_mark_cksum_ptype_rss, \\\n+\t R_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_96_111 \\\n+\tR(sec_vlan, R_SEC_F | RX_VLAN_F) \\\n+\tR(sec_vlan_rss, R_SEC_F | RX_VLAN_F | RSS_F) \\\n+\tR(sec_vlan_ptype, R_SEC_F | RX_VLAN_F | PTYPE_F) \\\n+\tR(sec_vlan_ptype_rss, R_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_cksum, R_SEC_F | RX_VLAN_F | CKSUM_F) \\\n+\tR(sec_vlan_cksum_rss, R_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \\\n+\tR(sec_vlan_cksum_ptype, R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_vlan_cksum_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_mark, R_SEC_F | RX_VLAN_F | MARK_F) \\\n+\tR(sec_vlan_mark_rss, R_SEC_F | RX_VLAN_F | MARK_F | RSS_F) \\\n+\tR(sec_vlan_mark_ptype, R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F) \\\n+\tR(sec_vlan_mark_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_mark_cksum, R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F) \\\n+\tR(sec_vlan_mark_cksum_rss, \\\n+\t R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(sec_vlan_mark_cksum_ptype, \\\n+\t R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_vlan_mark_cksum_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES_112_127 \\\n+\tR(sec_vlan_ts, R_SEC_F | RX_VLAN_F | TS_F) \\\n+\tR(sec_vlan_ts_rss, R_SEC_F | RX_VLAN_F | TS_F | RSS_F) \\\n+\tR(sec_vlan_ts_ptype, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F) \\\n+\tR(sec_vlan_ts_ptype_rss, R_SEC_F | RX_VLAN_F | TS_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_ts_cksum, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F) \\\n+\tR(sec_vlan_ts_cksum_rss, R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | RSS_F) \\\n+\tR(sec_vlan_ts_cksum_ptype, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_vlan_ts_cksum_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_ts_mark, R_SEC_F | RX_VLAN_F | TS_F | MARK_F) \\\n+\tR(sec_vlan_ts_mark_rss, R_SEC_F | RX_VLAN_F | TS_F | MARK_F | RSS_F) \\\n+\tR(sec_vlan_ts_mark_ptype, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F) \\\n+\tR(sec_vlan_ts_mark_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | PTYPE_F | RSS_F) \\\n+\tR(sec_vlan_ts_mark_cksum, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F) \\\n+\tR(sec_vlan_ts_mark_cksum_rss, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | RSS_F) \\\n+\tR(sec_vlan_ts_mark_cksum_ptype, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \\\n+\tR(sec_vlan_ts_mark_cksum_ptype_rss, \\\n+\t R_SEC_F | RX_VLAN_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F)\n+\n+#define NIX_RX_FASTPATH_MODES \\\n+\tNIX_RX_FASTPATH_MODES_0_15 \\\n+\tNIX_RX_FASTPATH_MODES_16_31 \\\n+\tNIX_RX_FASTPATH_MODES_32_47 \\\n+\tNIX_RX_FASTPATH_MODES_48_63 \\\n+\tNIX_RX_FASTPATH_MODES_64_79 \\\n+\tNIX_RX_FASTPATH_MODES_80_95 \\\n+\tNIX_RX_FASTPATH_MODES_96_111 \\\n+\tNIX_RX_FASTPATH_MODES_112_127\n+\n+#define R(name, flags) \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n-\t\t\t\t\t\t\t\t\t \\\n+ \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n-\t\t\t\t\t\t\t\t\t \\\n+ \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts); \\\n-\t\t\t\t\t\t\t\t\t \\\n+ \\\n \tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \\\n \t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts);\n \n NIX_RX_FASTPATH_MODES\n #undef R\n \n+#define NIX_RX_RECV(fn, flags) \\\n+\tuint16_t __rte_noinline __rte_hot fn( \\\n+\t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n+\t{ \\\n+\t\treturn cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, (flags)); \\\n+\t}\n+\n+#define NIX_RX_RECV_MSEG(fn, flags) NIX_RX_RECV(fn, flags | NIX_RX_MULTI_SEG_F)\n+\n+#define NIX_RX_RECV_VEC(fn, flags) \\\n+\tuint16_t __rte_noinline __rte_hot fn( \\\n+\t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n+\t{ \\\n+\t\treturn cn10k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \\\n+\t\t\t\t\t\t (flags), NULL, NULL, 0); \\\n+\t}\n+\n+#define NIX_RX_RECV_VEC_MSEG(fn, flags) \\\n+\tNIX_RX_RECV_VEC(fn, flags | NIX_RX_MULTI_SEG_F)\n+\n #endif /* __CN10K_RX_H__ */\ndiff --git a/drivers/net/cnxk/cn10k_rx_mseg.c b/drivers/net/cnxk/cn10k_rx_mseg.c\ndeleted file mode 100644\nindex e7c2321f6e..0000000000\n--- a/drivers/net/cnxk/cn10k_rx_mseg.c\n+++ /dev/null\n@@ -1,17 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_rx.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_mseg_##name( \\\n-\t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n-\t{ \\\n-\t\treturn cn10k_nix_recv_pkts(rx_queue, rx_pkts, pkts, \\\n-\t\t\t\t\t (flags) | NIX_RX_MULTI_SEG_F); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/net/cnxk/cn10k_rx_select.c b/drivers/net/cnxk/cn10k_rx_select.c\nnew file mode 100644\nindex 0000000000..da9aa81fbb\n--- /dev/null\n+++ b/drivers/net/cnxk/cn10k_rx_select.c\n@@ -0,0 +1,67 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2021 Marvell.\n+ */\n+\n+#include \"cn10k_ethdev.h\"\n+#include \"cn10k_rx.h\"\n+\n+static inline void\n+pick_rx_func(struct rte_eth_dev *eth_dev,\n+\t const eth_rx_burst_t rx_burst[NIX_RX_OFFLOAD_MAX])\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\t/* [VLAN] [TSP] [MARK] [CKSUM] [PTYPE] [RSS] */\n+\teth_dev->rx_pkt_burst =\n+\t\trx_burst[dev->rx_offload_flags & (NIX_RX_OFFLOAD_MAX - 1)];\n+\n+\trte_atomic_thread_fence(__ATOMIC_RELEASE);\n+}\n+\n+void\n+cn10k_eth_set_rx_function(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);\n+\n+\tconst eth_rx_burst_t nix_eth_rx_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_nix_recv_pkts_##name,\n+\n+\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t};\n+\n+\tconst eth_rx_burst_t nix_eth_rx_burst_mseg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_nix_recv_pkts_mseg_##name,\n+\n+\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t};\n+\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_nix_recv_pkts_vec_##name,\n+\n+\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t};\n+\n+\tconst eth_rx_burst_t nix_eth_rx_vec_burst_mseg[NIX_RX_OFFLOAD_MAX] = {\n+#define R(name, flags) [flags] = cn10k_nix_recv_pkts_vec_mseg_##name,\n+\n+\t\tNIX_RX_FASTPATH_MODES\n+#undef R\n+\t};\n+\n+\t/* Copy multi seg version with no offload for tear down sequence */\n+\tif (rte_eal_process_type() == RTE_PROC_PRIMARY)\n+\t\tdev->rx_pkt_burst_no_offload = nix_eth_rx_burst_mseg[0];\n+\n+\tif (dev->scalar_ena) {\n+\t\tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n+\t\t\treturn pick_rx_func(eth_dev, nix_eth_rx_burst_mseg);\n+\t\treturn pick_rx_func(eth_dev, nix_eth_rx_burst);\n+\t}\n+\n+\tif (dev->rx_offloads & DEV_RX_OFFLOAD_SCATTER)\n+\t\treturn pick_rx_func(eth_dev, nix_eth_rx_vec_burst_mseg);\n+\treturn pick_rx_func(eth_dev, nix_eth_rx_vec_burst);\n+}\ndiff --git a/drivers/net/cnxk/cn10k_rx_vec.c b/drivers/net/cnxk/cn10k_rx_vec.c\ndeleted file mode 100644\nindex 0ccc4df8ac..0000000000\n--- a/drivers/net/cnxk/cn10k_rx_vec.c\n+++ /dev/null\n@@ -1,19 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_rx.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags)\t\t\t \\\n-\tuint16_t __rte_noinline __rte_hot\t\t\t\t \\\n-\t\tcn10k_nix_recv_pkts_vec_##name(void *rx_queue, \\\n-\t\t\t\t\t struct rte_mbuf **rx_pkts, \\\n-\t\t\t\t\t uint16_t pkts) \\\n-\t{ \\\n-\t\treturn cn10k_nix_recv_pkts_vector(rx_queue, rx_pkts, pkts, \\\n-\t\t\t\t\t\t (flags), NULL, NULL, 0); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/net/cnxk/cn10k_rx_vec_mseg.c b/drivers/net/cnxk/cn10k_rx_vec_mseg.c\ndeleted file mode 100644\nindex 38e0ec36a3..0000000000\n--- a/drivers/net/cnxk/cn10k_rx_vec_mseg.c\n+++ /dev/null\n@@ -1,18 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(C) 2021 Marvell.\n- */\n-\n-#include \"cn10k_ethdev.h\"\n-#include \"cn10k_rx.h\"\n-\n-#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \\\n-\tuint16_t __rte_noinline __rte_hot cn10k_nix_recv_pkts_vec_mseg_##name( \\\n-\t\tvoid *rx_queue, struct rte_mbuf **rx_pkts, uint16_t pkts) \\\n-\t{ \\\n-\t\treturn cn10k_nix_recv_pkts_vector( \\\n-\t\t\trx_queue, rx_pkts, pkts, (flags) | NIX_RX_MULTI_SEG_F, \\\n-\t\t\tNULL, NULL, 0); \\\n-\t}\n-\n-NIX_RX_FASTPATH_MODES\n-#undef R\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex 01bd5442b5..1fd388a1f0 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -107,14 +107,46 @@ sources += files(\n 'cn10k_ethdev.c',\n 'cn10k_ethdev_sec.c',\n 'cn10k_rte_flow.c',\n- 'cn10k_rx.c',\n- 'cn10k_rx_mseg.c',\n- 'cn10k_rx_vec.c',\n- 'cn10k_rx_vec_mseg.c',\n 'cn10k_tx.c',\n 'cn10k_tx_mseg.c',\n 'cn10k_tx_vec.c',\n 'cn10k_tx_vec_mseg.c',\n+ 'cn10k_rx_select.c',\n+)\n+\n+sources += files(\n+ 'rx/cn10k/rx_0_15.c',\n+ 'rx/cn10k/rx_16_31.c',\n+ 'rx/cn10k/rx_32_47.c',\n+ 'rx/cn10k/rx_48_63.c',\n+ 'rx/cn10k/rx_64_79.c',\n+ 'rx/cn10k/rx_80_95.c',\n+ 'rx/cn10k/rx_96_111.c',\n+ 'rx/cn10k/rx_112_127.c',\n+ 'rx/cn10k/rx_0_15_mseg.c',\n+ 'rx/cn10k/rx_16_31_mseg.c',\n+ 'rx/cn10k/rx_32_47_mseg.c',\n+ 'rx/cn10k/rx_48_63_mseg.c',\n+ 'rx/cn10k/rx_64_79_mseg.c',\n+ 'rx/cn10k/rx_80_95_mseg.c',\n+ 'rx/cn10k/rx_96_111_mseg.c',\n+ 'rx/cn10k/rx_112_127_mseg.c',\n+ 'rx/cn10k/rx_0_15_vec.c',\n+ 'rx/cn10k/rx_16_31_vec.c',\n+ 'rx/cn10k/rx_32_47_vec.c',\n+ 'rx/cn10k/rx_48_63_vec.c',\n+ 'rx/cn10k/rx_64_79_vec.c',\n+ 'rx/cn10k/rx_80_95_vec.c',\n+ 'rx/cn10k/rx_96_111_vec.c',\n+ 'rx/cn10k/rx_112_127_vec.c',\n+ 'rx/cn10k/rx_0_15_vec_mseg.c',\n+ 'rx/cn10k/rx_16_31_vec_mseg.c',\n+ 'rx/cn10k/rx_32_47_vec_mseg.c',\n+ 'rx/cn10k/rx_48_63_vec_mseg.c',\n+ 'rx/cn10k/rx_64_79_vec_mseg.c',\n+ 'rx/cn10k/rx_80_95_vec_mseg.c',\n+ 'rx/cn10k/rx_96_111_vec_mseg.c',\n+ 'rx/cn10k/rx_112_127_vec_mseg.c',\n )\n \n deps += ['bus_pci', 'cryptodev', 'eventdev', 'security']\n", "prefixes": [ "6/8" ] }