Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/104004/?format=api
{ "id": 104004, "url": "http://patches.dpdk.org/api/patches/104004/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211108141131.16128-1-viacheslavo@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211108141131.16128-1-viacheslavo@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211108141131.16128-1-viacheslavo@nvidia.com", "date": "2021-11-08T14:11:31", "name": "[1/1] net/mlx5: fix modify field action conversion mask", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "3556786fb8d7ed63b188d9140127fddfa1b9bd7a", "submitter": { "id": 1926, "url": "http://patches.dpdk.org/api/people/1926/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211108141131.16128-1-viacheslavo@nvidia.com/mbox/", "series": [ { "id": 20394, "url": "http://patches.dpdk.org/api/series/20394/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20394", "date": "2021-11-08T14:11:31", "name": "[1/1] net/mlx5: fix modify field action conversion mask", "version": 1, "mbox": "http://patches.dpdk.org/series/20394/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/104004/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/104004/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 200B1A0C4D;\n\tMon, 8 Nov 2021 15:12:17 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A0D4241122;\n\tMon, 8 Nov 2021 15:12:16 +0100 (CET)", "from NAM02-DM3-obe.outbound.protection.outlook.com\n (mail-dm3nam07on2075.outbound.protection.outlook.com [40.107.95.75])\n by mails.dpdk.org (Postfix) with ESMTP id DB01B40E28\n for <dev@dpdk.org>; Mon, 8 Nov 2021 15:12:15 +0100 (CET)", "from BN0PR04CA0146.namprd04.prod.outlook.com (2603:10b6:408:ed::31)\n by DM6PR12MB3436.namprd12.prod.outlook.com (2603:10b6:5:11b::17) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4649.15; Mon, 8 Nov\n 2021 14:12:13 +0000", "from BN8NAM11FT016.eop-nam11.prod.protection.outlook.com\n (2603:10b6:408:ed:cafe::72) by BN0PR04CA0146.outlook.office365.com\n (2603:10b6:408:ed::31) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4669.11 via Frontend\n Transport; Mon, 8 Nov 2021 14:12:13 +0000", "from mail.nvidia.com (216.228.112.34) by\n BN8NAM11FT016.mail.protection.outlook.com (10.13.176.97) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id\n 15.20.4669.10 via Frontend Transport; Mon, 8 Nov 2021 14:12:12 +0000", "from nvidia.com (172.20.187.6) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Mon, 8 Nov\n 2021 14:11:47 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=eeuRVubW0P4KEFbeoBMEX0H4M6d1ahhELOCE64r8qGTqkC8jrSzzPQRZ0Y1Wm0E4CZHssOEQPS0BF/Rm7CvxtA4REy7U95LRCIxH53Q2IgMGclzKPAlNqhcVe0FLdzH5UJAzcADgUOPW7PVnpEr8X905PgFRo6J8JsfsQvBpjpdIl1NxhL/OdqAjrwqG1bCi9/hs8PTpaADBwneyepeexpnGlcuEYbwSnVRRV8v4kFN6AUE9omsPCFGZdb4lmXmT3XhfDTdurLEdqZK5uPKJVQOve3ICLvbpXDwUytIwRnWGDgwtNEo8E4h6j8kgMwqakDR4OF2GXeLJRQaF9bcBYg==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=FtbDq1Yo4pEt8FZuWiPog2hY0lssvq4tePl+pYcyAVA=;\n b=d92HiNsjnm77+FfR0N9L0wbS8Ts8uPga1oAk/XjRu79/kTkmkHFBR0wL0+jJEhzdCYgnRP2jVPRrYyeHUJ/8MchBYrNuNGVOCxjJzL1gMJeUaV+FWcK+c8/Hm6+FOUwW1rMVp5fOMAyOSoZwyCScvd4Wc2VHiuI0qOXc9cCxYoyrhbxfU0wbese4TPOCh9w/y4dUIkatcxYLnJC0a/gyg1D0hNXSAjchsHRI2ieYLnw8dEWNV2fdWJjTLGXLOmvV/YFdE8q9mq9I8Gcn1oL2GGfMvyD1jaFK97vHog94+38NCN8iMuD20mkVgzR+p43uQ6IZKZZySO3SeEp6CFibCw==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=quarantine pct=100) action=none\n header.from=nvidia.com; dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=FtbDq1Yo4pEt8FZuWiPog2hY0lssvq4tePl+pYcyAVA=;\n b=GlYHwpM5IATxuvFLB3Yni8BX6kDFKwIRml1lOfw6AdaNnd0KXzWN0o8uyk7y9z4pKqtyJw9q4vbJC7BDd2Kbg5le/+fkYGODDYmbo8oZZMWz1J3k1/pMwiq+N38Wu4k7vzUQA6WBfRAn0RdP4zfNR3gcaWKILceOBBHdJgkcdpNXqjfox4AlUr6LdRN0N0GfeO5sDO0f9WFbQaVGIgGklW+EjEe4CyRwLIS0UuCEgnpvkL7aeFHIMka7AacSAXF+fCgZ9PE9D9mgTnzylo440r+OrDOQwXjltRp+AwbKOJF8PRutqONS8bI5O/yWd82FUJ7RLM5wtlDYBbPbNdEGaw==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<rasland@nvidia.com>, <matan@nvidia.com>, <akozyrev@nvidia.com>", "Date": "Mon, 8 Nov 2021 16:11:31 +0200", "Message-ID": "<20211108141131.16128-1-viacheslavo@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL107.nvidia.com (172.20.187.13) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "680dd6b3-d94b-4b0c-f3d2-08d9a2c1c2bf", "X-MS-TrafficTypeDiagnostic": "DM6PR12MB3436:", "X-Microsoft-Antispam-PRVS": "\n <DM6PR12MB34363A833E285DB1B8674259DF919@DM6PR12MB3436.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:7219;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n VHGg2Mys1P6zKlYbxbISDNOCASmnh5CdT8ZyNytnMn6Icdx+/JKKhsbgqxlepyGthirkBq9Ekq6roO1rbJ34yUqzse6HaWJgJsE92Ix4YVtzRzDEvotxn+Y7bbPUY9Kd0EQc4x6cn2EZZUribTOdA9yPHs/gRUxZ7a0+Tmxr4lrVoCCG7YK9AklwVAiY5ilnrk+7ESASleO1as3gwlkjkJ2mEyRHUz4Q3jWOPrvNVFC+Um7PrcQZFlwUKXxV4BdJ1y6Htsc3J4uB2GDsEsdQNDWXEsLhcwU76IbtRDxb0spIo7qBbFUak9NHHvLlcHACygIHQw5coOTyjsAnWIzDlrvK1JVrZcfc028iOeUkcyC0xnRUHgFeGzv8179G9U06KUapsz7BzoP5g26RpkvwqVmU+mU6pWFNQEmU465HpBlGtDwcd3jz8NwipOYrzfedG3e7h7Yl8Qv624yXBRSALkVw9/R+vPi6dmX0CaChRb13MAxLuFIvAnaGLsnsSMiIm/ufwUqosnO+XVtBAJf/o5//0RLjxevxXf4ENXnUYgOqKjhpKyZIRDrOQvsuhX/i+tP10gwUXNzeSP0v5o7C46XjZxhkwJBotFWyYV4P/MG6AMQqRie6HzW2wcxaJi3lEk5lLuiMXUwry5Hf9dRJOWGIb/ssNk2m1xIgejj2xgKlOvUTKrqH6iK4bl7wR+uCAtbtD9JxdxuiKsnMgWDq2g==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(36840700001)(46966006)(54906003)(36756003)(186003)(83380400001)(6916009)(8676002)(70206006)(6666004)(316002)(36906005)(36860700001)(8936002)(7636003)(16526019)(6286002)(2906002)(356005)(26005)(107886003)(336012)(508600001)(7696005)(70586007)(5660300002)(82310400003)(86362001)(47076005)(1076003)(55016002)(4326008)(2616005)(426003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Nov 2021 14:12:12.7614 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 680dd6b3-d94b-4b0c-f3d2-08d9a2c1c2bf", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BN8NAM11FT016.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR12MB3436", "Subject": "[dpdk-dev] [PATCH 1/1] net/mlx5: fix modify field action conversion\n mask", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The routine converting RTE flow modify field action into\nfield driver's presentation did not specify the field mask\ncorrectly and this resulted into wrong conversion for\nthe actions with shifted fields.\n\nFixes: 40c8fb1fd3b3 (\"net/mlx5: update modify field action\")\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_dv.c | 46 ++++++++++++++++-----------------\n 1 file changed, 22 insertions(+), 24 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 842ada2ea9..de7923e288 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1470,11 +1470,11 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){2, 4,\n \t\t\t\t\t\tMLX5_MODI_OUT_DMAC_15_0};\n \t\t\t\tif (width < 16) {\n-\t\t\t\t\tmask[idx] = rte_cpu_to_be_16(0xffff >>\n+\t\t\t\t\tmask[1] = rte_cpu_to_be_16(0xffff >>\n \t\t\t\t\t\t\t\t (16 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE16(0xffff);\n+\t\t\t\t\tmask[1] = RTE_BE16(0xffff);\n \t\t\t\t\twidth -= 16;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1483,8 +1483,8 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t}\n \t\t\tinfo[idx] = (struct field_modify_info){4, 0,\n \t\t\t\t\t\tMLX5_MODI_OUT_DMAC_47_16};\n-\t\t\tmask[idx] = rte_cpu_to_be_32((0xffffffff >>\n-\t\t\t\t\t\t (32 - width)) << off);\n+\t\t\tmask[0] = rte_cpu_to_be_32((0xffffffff >>\n+\t\t\t\t\t\t (32 - width)) << off);\n \t\t} else {\n \t\t\tif (data->offset < 16)\n \t\t\t\tinfo[idx++] = (struct field_modify_info){2, 4,\n@@ -1500,11 +1500,11 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){2, 4,\n \t\t\t\t\t\tMLX5_MODI_OUT_SMAC_15_0};\n \t\t\t\tif (width < 16) {\n-\t\t\t\t\tmask[idx] = rte_cpu_to_be_16(0xffff >>\n+\t\t\t\t\tmask[1] = rte_cpu_to_be_16(0xffff >>\n \t\t\t\t\t\t\t\t (16 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE16(0xffff);\n+\t\t\t\t\tmask[1] = RTE_BE16(0xffff);\n \t\t\t\t\twidth -= 16;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1513,8 +1513,8 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t}\n \t\t\tinfo[idx] = (struct field_modify_info){4, 0,\n \t\t\t\t\t\tMLX5_MODI_OUT_SMAC_47_16};\n-\t\t\tmask[idx] = rte_cpu_to_be_32((0xffffffff >>\n-\t\t\t\t\t\t (32 - width)) << off);\n+\t\t\tmask[0] = rte_cpu_to_be_32((0xffffffff >>\n+\t\t\t\t\t\t (32 - width)) << off);\n \t\t} else {\n \t\t\tif (data->offset < 16)\n \t\t\t\tinfo[idx++] = (struct field_modify_info){2, 4,\n@@ -1582,12 +1582,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 12,\n \t\t\t\t\t\tMLX5_MODI_OUT_SIPV6_31_0};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[3] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[3] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1598,12 +1598,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 8,\n \t\t\t\t\t\tMLX5_MODI_OUT_SIPV6_63_32};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[2] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[2] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1614,12 +1614,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 4,\n \t\t\t\t\t\tMLX5_MODI_OUT_SIPV6_95_64};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[1] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[1] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1628,8 +1628,7 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t}\n \t\t\tinfo[idx] = (struct field_modify_info){4, 0,\n \t\t\t\t\t\tMLX5_MODI_OUT_SIPV6_127_96};\n-\t\t\tmask[idx] = rte_cpu_to_be_32(0xffffffff >>\n-\t\t\t\t\t\t (32 - width));\n+\t\t\tmask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));\n \t\t} else {\n \t\t\tif (data->offset < 32)\n \t\t\t\tinfo[idx++] = (struct field_modify_info){4, 12,\n@@ -1651,12 +1650,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 12,\n \t\t\t\t\t\tMLX5_MODI_OUT_DIPV6_31_0};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[3] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[3] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1667,12 +1666,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 8,\n \t\t\t\t\t\tMLX5_MODI_OUT_DIPV6_63_32};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[2] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[2] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1683,12 +1682,12 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t\tinfo[idx] = (struct field_modify_info){4, 4,\n \t\t\t\t\t\tMLX5_MODI_OUT_DIPV6_95_64};\n \t\t\t\tif (width < 32) {\n-\t\t\t\t\tmask[idx] =\n+\t\t\t\t\tmask[1] =\n \t\t\t\t\t\trte_cpu_to_be_32(0xffffffff >>\n \t\t\t\t\t\t\t\t (32 - width));\n \t\t\t\t\twidth = 0;\n \t\t\t\t} else {\n-\t\t\t\t\tmask[idx] = RTE_BE32(0xffffffff);\n+\t\t\t\t\tmask[1] = RTE_BE32(0xffffffff);\n \t\t\t\t\twidth -= 32;\n \t\t\t\t}\n \t\t\t\tif (!width)\n@@ -1697,8 +1696,7 @@ mlx5_flow_field_id_to_modify_info\n \t\t\t}\n \t\t\tinfo[idx] = (struct field_modify_info){4, 0,\n \t\t\t\t\t\tMLX5_MODI_OUT_DIPV6_127_96};\n-\t\t\tmask[idx] = rte_cpu_to_be_32(0xffffffff >>\n-\t\t\t\t\t\t (32 - width));\n+\t\t\tmask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));\n \t\t} else {\n \t\t\tif (data->offset < 32)\n \t\t\t\tinfo[idx++] = (struct field_modify_info){4, 12,\n", "prefixes": [ "1/1" ] }