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GET /api/patches/103805/?format=api
{ "id": 103805, "url": "http://patches.dpdk.org/api/patches/103805/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-20-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211104215846.58672-20-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211104215846.58672-20-ajit.khaparde@broadcom.com", "date": "2021-11-04T21:58:43", "name": "[v5,19/22] net/bnxt: add Tx TruFlow table config for P4 device", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "ae0d859bcedca5439f8de73eaeee33ed44739195", "submitter": { "id": 501, "url": "http://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "http://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211104215846.58672-20-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 20322, "url": "http://patches.dpdk.org/api/series/20322/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20322", "date": "2021-11-04T21:58:24", "name": "fixes and enhancements to Truflow", "version": 5, "mbox": "http://patches.dpdk.org/series/20322/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/103805/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/103805/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A1A51A0C5E;\n\tThu, 4 Nov 2021 23:01:11 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2BB7642808;\n\tThu, 4 Nov 2021 22:59:24 +0100 (CET)", "from mail-pl1-f174.google.com (mail-pl1-f174.google.com\n [209.85.214.174])\n by mails.dpdk.org (Postfix) with ESMTP id 80AFA427F2\n for <dev@dpdk.org>; Thu, 4 Nov 2021 22:59:18 +0100 (CET)", "by mail-pl1-f174.google.com with SMTP id t11so9519438plq.11\n for <dev@dpdk.org>; Thu, 04 Nov 2021 14:59:18 -0700 (PDT)", "from C02GC2QQMD6T.wifi.broadcom.net ([192.19.223.252])\n by smtp.gmail.com with ESMTPSA id pg5sm8532242pjb.26.2021.11.04.14.59.16\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Thu, 04 Nov 2021 14:59:16 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version; bh=oRyzOqdO3VpxYKq/IafPVlzQZreciqfqtUep92ISAgQ=;\n b=MAQkfLC8rxty60ZX6bHmxXu/t5CRQ4HC5u798FDQ+bheSKOe1JuBi4kVnzIc2Sml55\n jMLPXjnKrXjfw7WxhAxXZkTsUGaYOnWeSICxD28D9MY3z4TyNzttWyhuE/F6dLzEfibT\n x6SDFg5YfLT8Mb1xiASdo+bTMDfwMtcyheYqI=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references:mime-version;\n bh=oRyzOqdO3VpxYKq/IafPVlzQZreciqfqtUep92ISAgQ=;\n b=cI8g5vykvh19nCsAyrkaBlS0fpjWuse+aS1ukKXVDEnTGqV8sf+MZ7jlEq/CgaSEVO\n xYQP0AZkWR9Cs9SC8nt4zBGQOV03+O+ppJjeOf7QW6U1TAu4oyCAg3qyi+hJY+EH3Uha\n 1aDQPxjkUgxWnydQiSdBIgZ+unFA4b99PjiJwDIN/tX9R8kEexrT5Z0emEtm3mnkwODe\n y5QuLeDJnwiA2kVaPrgsiajCQhxOxVP6/lfBfI2VEJ5CsH0rLzIr34sW1mtlm+Ffzhgv\n gmay7Vp419eszlOuuIjA6xR9SuHaZr1bItjf5jydnNCLS4eKg24yJPL+tTIO4VN2bkP8\n 4GBQ==", "X-Gm-Message-State": "AOAM533cEP5OwgpQ3DIIGzNNjv41f5zHsI99gW6DAy/hM//WprEcjUMN\n 7RR/5XC5aAEVt6VJQ7E6eX0yuh6/rrr3sfwMOzb7Jmo9gEcWTzP6gU2IaeqgkuGTwb2KP7vts5c\n 7tSIm4wu1FOBDUjB9V+/gTY2BQHsBSKX5IxG2bZfg3AyJAicHkk5X9ZtTEmIk0lQ=", "X-Google-Smtp-Source": "\n ABdhPJzvYpjKEasVORoyh9d8udb+LWTDuTrUnVEjvMX2h7J9QnOx3cYhGYexox71x00kEifpHoWiHw==", "X-Received": "by 2002:a17:90b:3890:: with SMTP id\n mu16mr14760349pjb.73.1636063157537;\n Thu, 04 Nov 2021 14:59:17 -0700 (PDT)", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Jay Ding <jay.ding@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,\n Farah Smith <farah.smith@broadcom.com>,\n Randy Schacher <stuart.schacher@broadcom.com>", "Date": "Thu, 4 Nov 2021 14:58:43 -0700", "Message-Id": "<20211104215846.58672-20-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.30.1 (Apple Git-130)", "In-Reply-To": "<20211104215846.58672-1-ajit.khaparde@broadcom.com>", "References": "<20211103005251.25524-1-ajit.khaparde@broadcom.com>\n <20211104215846.58672-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Type": "multipart/signed; protocol=\"application/pkcs7-signature\";\n micalg=sha-256; boundary=\"0000000000005af03705cffda3c7\"", "X-Content-Filtered-By": "Mailman/MimeDel 2.1.29", "Subject": "[dpdk-dev] [PATCH v5 19/22] net/bnxt: add Tx TruFlow table config\n for P4 device", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Jay Ding <jay.ding@broadcom.com>\n\nAdd TX direction TruFlow table type config to be\ncompatible with other devices. For P4 device, the TX cfg\nis duplicated from RX.\n\nSigned-off-by: Jay Ding <jay.ding@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Farah Smith <farah.smith@broadcom.com>\nReviewed-by: Randy Schacher <stuart.schacher@broadcom.com>\nAcked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/tf_core/tf_device.c | 4 +-\n drivers/net/bnxt/tf_core/tf_device_p4.c | 107 ++++++++++++++++++++++++\n drivers/net/bnxt/tf_core/tf_device_p4.h | 58 +------------\n 3 files changed, 111 insertions(+), 58 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c\nindex 40db546604..4c416270b6 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.c\n+++ b/drivers/net/bnxt/tf_core/tf_device.c\n@@ -131,11 +131,11 @@ tf_dev_bind_p4(struct tf *tfp,\n \t}\n \n \trsv_cnt = tf_dev_reservation_check(TF_TBL_TYPE_MAX,\n-\t\t\t\t\t tf_tbl_p4,\n+\t\t\t\t\t tf_tbl_p4[TF_DIR_RX],\n \t\t\t\t\t (uint16_t *)resources->tbl_cnt);\n \tif (rsv_cnt) {\n \t\ttbl_cfg.num_elements = TF_TBL_TYPE_MAX;\n-\t\ttbl_cfg.cfg = tf_tbl_p4;\n+\t\ttbl_cfg.cfg = tf_tbl_p4[TF_DIR_RX];\n \t\ttbl_cfg.resources = resources;\n \t\trc = tf_tbl_bind(tfp, &tbl_cfg);\n \t\tif (rc) {\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex 244bd08914..a6a59b8a07 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -59,6 +59,113 @@ const char *tf_resource_str_p4[CFA_RESOURCE_TYPE_P4_LAST + 1] = {\n \t[CFA_RESOURCE_TYPE_P4_TBL_SCOPE] = \"tb_scope\",\n };\n \n+struct tf_rm_element_cfg tf_tbl_p4[TF_DIR_MAX][TF_TBL_TYPE_MAX] = {\n+\t[TF_DIR_RX][TF_TBL_TYPE_FULL_ACT_RECORD] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_MCAST_GROUPS] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_8B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_16B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_64B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_SP_SMAC] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_STATS_64] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_ACT_MODIFY_IPV4] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_METER_PROF] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_METER_INST] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_RX][TF_TBL_TYPE_MIRROR_CONFIG] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_FULL_ACT_RECORD] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_MCAST_GROUPS] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_ENCAP_8B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_ENCAP_16B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_ENCAP_64B] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_SP_SMAC] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_STATS_64] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_ACT_MODIFY_IPV4] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_METER_PROF] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_METER_INST] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER,\n+\t\t0, 0\n+\t},\n+\t[TF_DIR_TX][TF_TBL_TYPE_MIRROR_CONFIG] = {\n+\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR,\n+\t\t0, 0\n+\t},\n+};\n+\n /**\n * Device specific function that retrieves the MAX number of HCAPI\n * types the device supports.\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h\nindex e84c0f9e83..86de525995 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.h\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h\n@@ -12,6 +12,8 @@\n #include \"tf_if_tbl.h\"\n #include \"tf_global_cfg.h\"\n \n+extern struct tf_rm_element_cfg tf_tbl_p4[TF_DIR_MAX][TF_TBL_TYPE_MAX];\n+\n struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {\n \t[TF_IDENT_TYPE_L2_CTXT_HIGH] = {\n \t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP_HIGH,\n@@ -58,62 +60,6 @@ struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {\n \t},\n };\n \n-struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {\n-\t[TF_TBL_TYPE_FULL_ACT_RECORD] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_FULL_ACTION,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_MCAST_GROUPS] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MCG,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_ENCAP_8B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_8B,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_ENCAP_16B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_16B,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_ENCAP_64B] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_ENCAP_64B,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_SP_SMAC] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_SP_SMAC_IPV4] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_SP_SMAC_IPV6] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_STATS_64] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_COUNTER_64B,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_ACT_MODIFY_IPV4] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_NAT_IPV4,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_METER_PROF] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER_PROF,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_METER_INST] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_METER,\n-\t\t0, 0\n-\t},\n-\t[TF_TBL_TYPE_MIRROR_CONFIG] = {\n-\t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_MIRROR,\n-\t\t0, 0\n-\t},\n-\n-};\n-\n struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {\n \t[TF_EM_TBL_TYPE_TBL_SCOPE] = {\n \t\tTF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE,\n", "prefixes": [ "v5", "19/22" ] }