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GET /api/patches/103740/?format=api
{ "id": 103740, "url": "http://patches.dpdk.org/api/patches/103740/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211104112644.17278-2-bingz@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211104112644.17278-2-bingz@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211104112644.17278-2-bingz@nvidia.com", "date": "2021-11-04T11:26:41", "name": "[1/4] common/mlx5: support delay drop capabilities query", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d9801a92a7296efefc89090825bc1e07d3ce157a", "submitter": { "id": 1976, "url": "http://patches.dpdk.org/api/people/1976/?format=api", "name": "Bing Zhao", "email": "bingz@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211104112644.17278-2-bingz@nvidia.com/mbox/", "series": [ { "id": 20307, "url": "http://patches.dpdk.org/api/series/20307/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20307", "date": "2021-11-04T11:26:41", "name": "Add delay drop support for Rx queue", "version": 1, "mbox": "http://patches.dpdk.org/series/20307/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/103740/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/103740/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B4D88A0548;\n\tThu, 4 Nov 2021 12:27:08 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7CAD041144;\n\tThu, 4 Nov 2021 12:27:08 +0100 (CET)", "from NAM10-BN7-obe.outbound.protection.outlook.com\n (mail-bn7nam10on2073.outbound.protection.outlook.com [40.107.92.73])\n by mails.dpdk.org (Postfix) with ESMTP id 6CCD340DFD\n for <dev@dpdk.org>; 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mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=quarantine pct=100) action=none\n header.from=nvidia.com; dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=0J2KPwviFSQoAuW/dCgtLfLLs+Vv8+CtkVoaFb6WG20=;\n b=MM7//E1gcj/f35Bnwnr5t9jl+lybMY0FHIeQY95/srlY2IXBLLamHIFkxJ/aquvPYEeze/nEVDuxyw+G6PFk9yjrzARRG1/PM3IjS+/Wjn8euHg95c19mIWPOpIZMmde90teVwPAfaruH39N9icx0WgXr4zEB+XEqpjoqJbR5+0WMNO+FjEqmOWD+FBVBrwQfWA8BjNl1yknSECzdPB+G1KJhpZZ/lzzoDtfZ0vZK8fv9Fju+SPG39ljGrCZ+iAQHdVIJRU3/fMaxzxni8JM65/XPlNnvuQ+M+abO56DnZPA9YBUgH8y59gWAFt9F+j5nELMfe/11o3m5GlCA3GEYQ==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)\n header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Bing Zhao <bingz@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>, <thomas@monjalon.net>,\n <orika@nvidia.com>", "Date": "Thu, 4 Nov 2021 13:26:41 +0200", "Message-ID": "<20211104112644.17278-2-bingz@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20211104112644.17278-1-bingz@nvidia.com>", "References": "<20211104112644.17278-1-bingz@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.5]", "X-ClientProxiedBy": "HQMAIL101.nvidia.com (172.20.187.10) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "8984a557-77b0-4023-55c5-08d99f860719", "X-MS-TrafficTypeDiagnostic": "MW3PR12MB4524:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <MW3PR12MB45247528840EC79B9127CF4FD08D9@MW3PR12MB4524.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:2958;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n PpDNPxlBC+ZwVTb1e2w+CKwdJoHG7v/8qs67MW/U38sAae5y+tkYvszbI3B4Ox/JQc76PsYXCRJxskn4KG2EDvzUS1H6KoCy/IcG3Jb/wAh5xvnZxxCpWU0SpK9S4e9URqFtYFOubsPNR1dMIQrfLcmQZ3eJHziCKOxT2aX/BKPwc1yvZoHjjSQ42udDnHNBdVuq3wnUDHyGIhF6dpp4AP11mMPNnjT97zoNzr2ETssfSZ3F/9rx3v4raRvgjfeGcrw5mPhkXfFFOJo/OTcsDFbhBjKMHMc/t08vZ68ia/yD2z9wxI+rAa+NvxFyVv0zwBde9PNQf02B5rHMfa6Htqmb/+7b+hjrYwiDhgf1csiehJSYAvRZP8vY8L6swsOFNq5GSKOHLcSZppUm5j0GHZ86cSXMA9ef3LYGllxCTKhXsJksUX94Uvfm9aRCRbuRUsZJwct4H7CU5tezPUjORuWlaFMPKix4ZKGKCiDf29ievIvzCItEO9dTsnLXJY1fkMR3p2kwqIjTQ13PSQ+xIy0LyV3NLycWrp8ksPW94cI9OGZhwEDgKc9gpLpkwmd2NM4dQChWPYMrE4cZjVp3SAMuTZJBNW8cMyNLpyA1pztaTeKplkveE9gHH2HryVy3gRY2YvMAlFC8SJom1+QIEJvJkqhN6eGgLsopYor7QLZHrDGoE1y60GWk6uQrP6zdsOLlZdouIWYyrVMVpnqnHQ==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(1076003)(2906002)(7636003)(54906003)(8676002)(356005)(70206006)(36756003)(6666004)(5660300002)(70586007)(6636002)(8936002)(82310400003)(16526019)(186003)(36860700001)(2616005)(107886003)(426003)(508600001)(6286002)(86362001)(55016002)(47076005)(7696005)(26005)(4326008)(316002)(110136005)(336012);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "04 Nov 2021 11:27:04.2071 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 8984a557-77b0-4023-55c5-08d99f860719", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT064.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW3PR12MB4524", "Subject": "[dpdk-dev] [PATCH 1/4] common/mlx5: support delay drop capabilities\n query", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The \"rq_delay_drop\" capability in the HCA_CAP is checked and saved\nin the output data structure for the future usage.\n\nSigned-off-by: Bing Zhao <bingz@nvidia.com>\n---\n drivers/common/mlx5/mlx5_devx_cmds.c | 1 +\n drivers/common/mlx5/mlx5_devx_cmds.h | 1 +\n 2 files changed, 2 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c\nindex 12c114a91b..eaf1dd5046 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.c\n@@ -962,6 +962,7 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,\n \tattr->ct_offload = !!(MLX5_GET64(cmd_hca_cap, hcattr,\n \t\t\t\t\t general_obj_types) &\n \t\t\t MLX5_GENERAL_OBJ_TYPES_CAP_CONN_TRACK_OFFLOAD);\n+\tattr->rq_delay_drop = MLX5_GET(cmd_hca_cap, hcattr, rq_delay_drop);\n \tif (attr->qos.sup) {\n \t\thcattr = mlx5_devx_get_hca_cap(ctx, in, out, &rc,\n \t\t\t\tMLX5_GET_HCA_CAP_OP_MOD_QOS_CAP |\ndiff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h\nindex 2326f1e968..25e2814ac0 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.h\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.h\n@@ -176,6 +176,7 @@ struct mlx5_hca_attr {\n \tuint32_t swp_csum:1;\n \tuint32_t swp_lso:1;\n \tuint32_t lro_max_msg_sz_mode:2;\n+\tuint32_t rq_delay_drop:1;\n \tuint32_t lro_timer_supported_periods[MLX5_LRO_NUM_SUPP_PERIODS];\n \tuint16_t lro_min_mss_size;\n \tuint32_t flex_parser_protocols;\n", "prefixes": [ "1/4" ] }