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GET /api/patches/103619/?format=api
{ "id": 103619, "url": "http://patches.dpdk.org/api/patches/103619/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211103075838.1486056-11-xuemingl@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211103075838.1486056-11-xuemingl@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211103075838.1486056-11-xuemingl@nvidia.com", "date": "2021-11-03T07:58:34", "name": "[v3,10/14] net/mlx5: remove port info from shareable Rx queue", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "771e36b4ab7f96866539ef16738e637d27543816", "submitter": { "id": 1904, "url": "http://patches.dpdk.org/api/people/1904/?format=api", "name": "Xueming Li", "email": "xuemingl@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211103075838.1486056-11-xuemingl@nvidia.com/mbox/", "series": [ { "id": 20258, "url": "http://patches.dpdk.org/api/series/20258/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=20258", "date": "2021-11-03T07:58:24", "name": "net/mlx5: support shared Rx queue", "version": 3, "mbox": "http://patches.dpdk.org/series/20258/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/103619/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/103619/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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SFS:(4636009)(36840700001)(46966006)(6286002)(36756003)(16526019)(186003)(426003)(2616005)(8936002)(36860700001)(26005)(6916009)(55016002)(316002)(54906003)(107886003)(336012)(6666004)(70206006)(86362001)(508600001)(4326008)(83380400001)(7636003)(7696005)(1076003)(70586007)(47076005)(2906002)(82310400003)(5660300002)(8676002)(356005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "03 Nov 2021 08:01:21.8027 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5a4954fa-2746-41fd-2437-08d99ea0200a", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT023.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW3PR12MB4505", "Subject": "[dpdk-dev] [PATCH v3 10/14] net/mlx5: remove port info from\n shareable Rx queue", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "To prepare for shared Rx queue, removes port info from shareable Rx\nqueue control.\n\nSigned-off-by: Xueming Li <xuemingl@nvidia.com>\n---\n drivers/net/mlx5/mlx5_devx.c | 2 +-\n drivers/net/mlx5/mlx5_rx.c | 15 +++--------\n drivers/net/mlx5/mlx5_rx.h | 7 ++++--\n drivers/net/mlx5/mlx5_rxq.c | 43 ++++++++++++++++++++++----------\n drivers/net/mlx5/mlx5_rxtx_vec.c | 2 +-\n drivers/net/mlx5/mlx5_trigger.c | 13 +++++-----\n 6 files changed, 47 insertions(+), 35 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex 443252df05d..8b3651f5034 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -918,7 +918,7 @@ mlx5_rxq_devx_obj_drop_create(struct rte_eth_dev *dev)\n \t}\n \trxq->rxq_ctrl = rxq_ctrl;\n \trxq_ctrl->type = MLX5_RXQ_TYPE_STANDARD;\n-\trxq_ctrl->priv = priv;\n+\trxq_ctrl->sh = priv->sh;\n \trxq_ctrl->obj = rxq;\n \trxq_data = &rxq_ctrl->rxq;\n \t/* Create CQ using DevX API. */\ndiff --git a/drivers/net/mlx5/mlx5_rx.c b/drivers/net/mlx5/mlx5_rx.c\nindex 258a6453144..d41905a2a04 100644\n--- a/drivers/net/mlx5/mlx5_rx.c\n+++ b/drivers/net/mlx5/mlx5_rx.c\n@@ -118,15 +118,7 @@ int\n mlx5_rx_descriptor_status(void *rx_queue, uint16_t offset)\n {\n \tstruct mlx5_rxq_data *rxq = rx_queue;\n-\tstruct mlx5_rxq_ctrl *rxq_ctrl =\n-\t\t\tcontainer_of(rxq, struct mlx5_rxq_ctrl, rxq);\n-\tstruct rte_eth_dev *dev = ETH_DEV(rxq_ctrl->priv);\n \n-\tif (dev->rx_pkt_burst == NULL ||\n-\t dev->rx_pkt_burst == removed_rx_burst) {\n-\t\trte_errno = ENOTSUP;\n-\t\treturn -rte_errno;\n-\t}\n \tif (offset >= (1 << rxq->cqe_n)) {\n \t\trte_errno = EINVAL;\n \t\treturn -rte_errno;\n@@ -438,10 +430,10 @@ mlx5_rx_err_handle(struct mlx5_rxq_data *rxq, uint8_t vec)\n \t\tsm.is_wq = 1;\n \t\tsm.queue_id = rxq->idx;\n \t\tsm.state = IBV_WQS_RESET;\n-\t\tif (mlx5_queue_state_modify(ETH_DEV(rxq_ctrl->priv), &sm))\n+\t\tif (mlx5_queue_state_modify(RXQ_DEV(rxq_ctrl), &sm))\n \t\t\treturn -1;\n \t\tif (rxq_ctrl->dump_file_n <\n-\t\t rxq_ctrl->priv->config.max_dump_files_num) {\n+\t\t RXQ_PORT(rxq_ctrl)->config.max_dump_files_num) {\n \t\t\tMKSTR(err_str, \"Unexpected CQE error syndrome \"\n \t\t\t \"0x%02x CQN = %u RQN = %u wqe_counter = %u\"\n \t\t\t \" rq_ci = %u cq_ci = %u\", u.err_cqe->syndrome,\n@@ -478,8 +470,7 @@ mlx5_rx_err_handle(struct mlx5_rxq_data *rxq, uint8_t vec)\n \t\t\tsm.is_wq = 1;\n \t\t\tsm.queue_id = rxq->idx;\n \t\t\tsm.state = IBV_WQS_RDY;\n-\t\t\tif (mlx5_queue_state_modify(ETH_DEV(rxq_ctrl->priv),\n-\t\t\t\t\t\t &sm))\n+\t\t\tif (mlx5_queue_state_modify(RXQ_DEV(rxq_ctrl), &sm))\n \t\t\t\treturn -1;\n \t\t\tif (vec) {\n \t\t\t\tconst uint32_t elts_n =\ndiff --git a/drivers/net/mlx5/mlx5_rx.h b/drivers/net/mlx5/mlx5_rx.h\nindex b21918223b8..c04c0c73349 100644\n--- a/drivers/net/mlx5/mlx5_rx.h\n+++ b/drivers/net/mlx5/mlx5_rx.h\n@@ -22,6 +22,10 @@\n /* Support tunnel matching. */\n #define MLX5_FLOW_TUNNEL 10\n \n+#define RXQ_PORT(rxq_ctrl) LIST_FIRST(&(rxq_ctrl)->owners)->priv\n+#define RXQ_DEV(rxq_ctrl) ETH_DEV(RXQ_PORT(rxq_ctrl))\n+#define RXQ_PORT_ID(rxq_ctrl) PORT_ID(RXQ_PORT(rxq_ctrl))\n+\n /* First entry must be NULL for comparison. */\n #define mlx5_mr_btree_len(bt) ((bt)->len - 1)\n \n@@ -152,7 +156,6 @@ struct mlx5_rxq_ctrl {\n \tLIST_HEAD(priv, mlx5_rxq_priv) owners; /* Owner rxq list. */\n \tstruct mlx5_rxq_obj *obj; /* Verbs/DevX elements. */\n \tstruct mlx5_dev_ctx_shared *sh; /* Shared context. */\n-\tstruct mlx5_priv *priv; /* Back pointer to private data. */\n \tenum mlx5_rxq_type type; /* Rxq type. */\n \tunsigned int socket; /* CPU socket ID for allocations. */\n \tuint32_t share_group; /* Group ID of shared RXQ. */\n@@ -318,7 +321,7 @@ mlx5_rx_addr2mr(struct mlx5_rxq_data *rxq, uintptr_t addr)\n \t */\n \trxq_ctrl = container_of(rxq, struct mlx5_rxq_ctrl, rxq);\n \tmp = mlx5_rxq_mprq_enabled(rxq) ? rxq->mprq_mp : rxq->mp;\n-\treturn mlx5_mr_mempool2mr_bh(&rxq_ctrl->priv->sh->cdev->mr_scache,\n+\treturn mlx5_mr_mempool2mr_bh(&rxq_ctrl->sh->cdev->mr_scache,\n \t\t\t\t mr_ctrl, mp, addr);\n }\n \ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 7b637fda643..5a20966e2ca 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -148,8 +148,14 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)\n \n \t\tbuf = rte_pktmbuf_alloc(seg->mp);\n \t\tif (buf == NULL) {\n-\t\t\tDRV_LOG(ERR, \"port %u empty mbuf pool\",\n-\t\t\t\tPORT_ID(rxq_ctrl->priv));\n+\t\t\tif (rxq_ctrl->share_group == 0)\n+\t\t\t\tDRV_LOG(ERR, \"port %u queue %u empty mbuf pool\",\n+\t\t\t\t\tRXQ_PORT_ID(rxq_ctrl),\n+\t\t\t\t\trxq_ctrl->rxq.idx);\n+\t\t\telse\n+\t\t\t\tDRV_LOG(ERR, \"share group %u queue %u empty mbuf pool\",\n+\t\t\t\t\trxq_ctrl->share_group,\n+\t\t\t\t\trxq_ctrl->share_qid);\n \t\t\trte_errno = ENOMEM;\n \t\t\tgoto error;\n \t\t}\n@@ -193,11 +199,16 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)\n \t\tfor (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)\n \t\t\t(*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;\n \t}\n-\tDRV_LOG(DEBUG,\n-\t\t\"port %u SPRQ queue %u allocated and configured %u segments\"\n-\t\t\" (max %u packets)\",\n-\t\tPORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx, elts_n,\n-\t\telts_n / (1 << rxq_ctrl->rxq.sges_n));\n+\tif (rxq_ctrl->share_group == 0)\n+\t\tDRV_LOG(DEBUG,\n+\t\t\t\"port %u SPRQ queue %u allocated and configured %u segments (max %u packets)\",\n+\t\t\tRXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx, elts_n,\n+\t\t\telts_n / (1 << rxq_ctrl->rxq.sges_n));\n+\telse\n+\t\tDRV_LOG(DEBUG,\n+\t\t\t\"share group %u SPRQ queue %u allocated and configured %u segments (max %u packets)\",\n+\t\t\trxq_ctrl->share_group, rxq_ctrl->share_qid, elts_n,\n+\t\t\telts_n / (1 << rxq_ctrl->rxq.sges_n));\n \treturn 0;\n error:\n \terr = rte_errno; /* Save rte_errno before cleanup. */\n@@ -207,8 +218,12 @@ rxq_alloc_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)\n \t\t\trte_pktmbuf_free_seg((*rxq_ctrl->rxq.elts)[i]);\n \t\t(*rxq_ctrl->rxq.elts)[i] = NULL;\n \t}\n-\tDRV_LOG(DEBUG, \"port %u SPRQ queue %u failed, freed everything\",\n-\t\tPORT_ID(rxq_ctrl->priv), rxq_ctrl->rxq.idx);\n+\tif (rxq_ctrl->share_group == 0)\n+\t\tDRV_LOG(DEBUG, \"port %u SPRQ queue %u failed, freed everything\",\n+\t\t\tRXQ_PORT_ID(rxq_ctrl), rxq_ctrl->rxq.idx);\n+\telse\n+\t\tDRV_LOG(DEBUG, \"share group %u SPRQ queue %u failed, freed everything\",\n+\t\t\trxq_ctrl->share_group, rxq_ctrl->share_qid);\n \trte_errno = err; /* Restore rte_errno. */\n \treturn -rte_errno;\n }\n@@ -284,8 +299,12 @@ rxq_free_elts_sprq(struct mlx5_rxq_ctrl *rxq_ctrl)\n \tuint16_t used = q_n - (elts_ci - rxq->rq_pi);\n \tuint16_t i;\n \n-\tDRV_LOG(DEBUG, \"port %u Rx queue %u freeing %d WRs\",\n-\t\tPORT_ID(rxq_ctrl->priv), rxq->idx, q_n);\n+\tif (rxq_ctrl->share_group == 0)\n+\t\tDRV_LOG(DEBUG, \"port %u Rx queue %u freeing %d WRs\",\n+\t\t\tRXQ_PORT_ID(rxq_ctrl), rxq->idx, q_n);\n+\telse\n+\t\tDRV_LOG(DEBUG, \"share group %u Rx queue %u freeing %d WRs\",\n+\t\t\trxq_ctrl->share_group, rxq_ctrl->share_qid, q_n);\n \tif (rxq->elts == NULL)\n \t\treturn;\n \t/**\n@@ -1630,7 +1649,6 @@ mlx5_rxq_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,\n \t\t(!!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS));\n \ttmpl->rxq.port_id = dev->data->port_id;\n \ttmpl->sh = priv->sh;\n-\ttmpl->priv = priv;\n \ttmpl->rxq.mp = rx_seg[0].mp;\n \ttmpl->rxq.elts_n = log2above(desc);\n \ttmpl->rxq.rq_repl_thresh =\n@@ -1690,7 +1708,6 @@ mlx5_rxq_hairpin_new(struct rte_eth_dev *dev, struct mlx5_rxq_priv *rxq,\n \ttmpl->rxq.rss_hash = 0;\n \ttmpl->rxq.port_id = dev->data->port_id;\n \ttmpl->sh = priv->sh;\n-\ttmpl->priv = priv;\n \ttmpl->rxq.mp = NULL;\n \ttmpl->rxq.elts_n = log2above(desc);\n \ttmpl->rxq.elts = NULL;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec.c b/drivers/net/mlx5/mlx5_rxtx_vec.c\nindex ecd273e00a8..511681841ca 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec.c\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec.c\n@@ -550,7 +550,7 @@ mlx5_rxq_check_vec_support(struct mlx5_rxq_data *rxq)\n \tstruct mlx5_rxq_ctrl *ctrl =\n \t\tcontainer_of(rxq, struct mlx5_rxq_ctrl, rxq);\n \n-\tif (!ctrl->priv->config.rx_vec_en || rxq->sges_n != 0)\n+\tif (!RXQ_PORT(ctrl)->config.rx_vec_en || rxq->sges_n != 0)\n \t\treturn -ENOTSUP;\n \tif (rxq->lro)\n \t\treturn -ENOTSUP;\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex a124f74fcda..caafdf27e8f 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -131,9 +131,11 @@ mlx5_rxq_mempool_register_cb(struct rte_mempool *mp, void *opaque,\n * 0 on success, (-1) on failure and rte_errno is set.\n */\n static int\n-mlx5_rxq_mempool_register(struct mlx5_rxq_ctrl *rxq_ctrl)\n+mlx5_rxq_mempool_register(struct rte_eth_dev *dev,\n+\t\t\t struct mlx5_rxq_ctrl *rxq_ctrl)\n {\n-\tstruct mlx5_priv *priv = rxq_ctrl->priv;\n+\tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_dev_ctx_shared *sh = rxq_ctrl->sh;\n \tstruct rte_mempool *mp;\n \tuint32_t s;\n \tint ret = 0;\n@@ -148,9 +150,8 @@ mlx5_rxq_mempool_register(struct mlx5_rxq_ctrl *rxq_ctrl)\n \t}\n \tfor (s = 0; s < rxq_ctrl->rxq.rxseg_n; s++) {\n \t\tmp = rxq_ctrl->rxq.rxseg[s].mp;\n-\t\tret = mlx5_mr_mempool_register(&priv->sh->cdev->mr_scache,\n-\t\t\t\t\t priv->sh->cdev->pd, mp,\n-\t\t\t\t\t &priv->mp_id);\n+\t\tret = mlx5_mr_mempool_register(&sh->cdev->mr_scache,\n+\t\t\t\t\t sh->cdev->pd, mp, &priv->mp_id);\n \t\tif (ret < 0 && rte_errno != EEXIST)\n \t\t\treturn ret;\n \t\trte_mempool_mem_iter(mp, mlx5_rxq_mempool_register_cb,\n@@ -213,7 +214,7 @@ mlx5_rxq_start(struct rte_eth_dev *dev)\n \t\t\t * the implicit registration is enabled or not,\n \t\t\t * Rx mempool destruction is tracked to free MRs.\n \t\t\t */\n-\t\t\tif (mlx5_rxq_mempool_register(rxq_ctrl) < 0)\n+\t\t\tif (mlx5_rxq_mempool_register(dev, rxq_ctrl) < 0)\n \t\t\t\tgoto error;\n \t\t\tret = rxq_alloc_elts(rxq_ctrl);\n \t\t\tif (ret)\n", "prefixes": [ "v3", "10/14" ] }