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GET /api/patches/101455/?format=api
{ "id": 101455, "url": "http://patches.dpdk.org/api/patches/101455/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211013182720.32486-2-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211013182720.32486-2-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211013182720.32486-2-hemant.agrawal@nxp.com", "date": "2021-10-13T18:27:06", "name": "[v3,01/15] crypto: change sgl to src_sgl in vector", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e950891aa9a2bc168a7bc70a0f9e4790f95fe968", "submitter": { "id": 477, "url": "http://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211013182720.32486-2-hemant.agrawal@nxp.com/mbox/", "series": [ { "id": 19612, "url": "http://patches.dpdk.org/api/series/19612/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19612", "date": "2021-10-13T18:27:05", "name": "crypto: add raw vector support in DPAAx", "version": 3, "mbox": "http://patches.dpdk.org/series/19612/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/101455/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/101455/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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b=aY81My5+ZvTjDLmWtach7bxmr++y5eIA0TJNn5z+wMRvuS5biJQzKyKHfCIWqe75XvAmKE6ddjrZfBe+ZUfnl4aFys0inQvgEZfTJvRp1L4kYElRDEATbZQWoiSpbzOMY5Q4CPT4LCT8lLnac/MM14644z6B6R2C+2TLQQfaCtQ=", "Authentication-Results": "dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=nxp.com;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "dev@dpdk.org,\n\tgakhil@marvell.com", "Cc": "roy.fan.zhang@intel.com,\n\tkonstantin.ananyev@intel.com", "Date": "Wed, 13 Oct 2021 23:57:06 +0530", "Message-Id": "<20211013182720.32486-2-hemant.agrawal@nxp.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20211013182720.32486-1-hemant.agrawal@nxp.com>", "References": "<20211013182720.32486-1-hemant.agrawal@nxp.com>", "Content-Type": "text/plain", "X-ClientProxiedBy": "SG3P274CA0016.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:be::28)\n To DU2PR04MB8630.eurprd04.prod.outlook.com\n (2603:10a6:10:2dd::15)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", 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Sww1Bz/Ho1Kp2g0ESQIghgr07+9VMMigJZobWGij/VccrgPKSE0wfryaqMZVI5V6AllZ6kKIZ42yn4IApbZUT4pne0NnVYB+PJfOJ576Y/CobegCq85xVFjnHQBisNUfxQj5d6GIyOI+dormzpMQoMfrFf55Fl0gGxkrBZG45kbS105+URZMnTT9pH4LyEOKIteMAXs2UAb+COGIDOkcXK17u1/TLMAsHAsTrfka5OBpjurC6RxPiv0vvxQIr/I+ORZxU2cJLP2BKc6U8RyK3eo5Wua7wRYgAZ0NCwTzK3uViVCqcM7yzIcBxHWQ5h1BR0SkTpd6UE2vEaoLlbm9dzAf7NmqBLHB/jEk/7X5t4b4AVLkSEc3L6kkDVRSBLo0T8WdRG67fH6H7JZbWr/+6HtYyx7UyzGp4OVPmUJPnUsi1yr3zDv1QkGZleYnhR0GaT9szdqKxjnbSsi4EY3c3N37/5Cpdsa89IDT3dyz6H46am6L29lBw/spo9Y3MtaGDe1MdNl0HbcF8Sm0VZK68F6/1hIjTnw3mBw2K9bmtPQ5U5KQVokmMGY26m43WtV6aq/0Wd377LvDYa77+kUVZtmC74wPz4en9MY7iN7Vg839rnRH0Ur1mheuIoIFzo9LGnX+7m9xiU7iEI9Y+VvbP81s8Sjp1qGJz0JdisllbsALYcsHzxaBZiVNFmWqR5ln1PfSMEzc7JXWaFQl/sgJo8DN4XGhJ1hDfCn3V5GQSU/x9GJYL+weIt6z483axjDj+J/m6SV6W0lVfDTh9crM8FhjkVIWObqAalV3KNWjc6on3A2NhgCKsptJNYzeOEZIldXxtRHn7ZDcefydsA7x4j2zd5jeDgzr6hgCOvRo79gDPZDi5G9sRqKCn8NeYq+wa+vsv+/NT7FRdvtxgpCvBGAwbu5ZoCHdz5lZiFTJFR1X0wgvHmj6WPaxOZuAK+/moGg9Xyq5ueD/yjmQZoNpAKcUjGb21d7OXdgShMjkX9T4xA6UzjOfU030Ib8rl7KQfocKS+Uug6NEOP0ylzZo/hPTmylUgXXE7qtYXk5lC3faUxEgYoUA4hS9ptGVYj4kUP2Fdfg9EOwWG9rgHeP7cIl3ucCkJm8oQ7YUM4AP4UGIBg/P6kh6pceLOK+YDybAs9u+UXd1H7Ge/zirRC8BIU4FsjzJF78NrYj5d09CXi1Wx7V/OzxlkK5Bq+Ojs0/KCp8e7Epq+b8XhAziuW6O8WJaJ3DZpGTQSGun7pTsTn8XliVO8y8lxZjgfrAdbDu8/dg9p6um2LHXnARbGsGWQOG2qLkGqA4D2Vm4ErCAqtV1JprHhnp5hV8yZmePF7/1", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9d9b0d52-6a81-4b83-4b74-08d98e77b8ed", "X-MS-Exchange-CrossTenant-AuthSource": "DU2PR04MB8630.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Oct 2021 18:31:50.6548 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n AQJ3pW4CaEKCFMCdbE6B/XRHn5a1fjLS6KNBZf1yZyhZ+x5SnP//M6NZYnv4RAsO9Y7SOpo/qQJNP066PLEqZg==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DU2PR04MB8597", "Subject": "[dpdk-dev] [PATCH v3 01/15] crypto: change sgl to src_sgl in vector", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch renames the sgl to src_sgl to help differentiating\nbetween source and destination sgl.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\nAcked-by: Akhil Goyal <gakhil@marvell.com>\nAcked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>\n---\n app/test/test_cryptodev.c | 6 ++---\n drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 12 +++++-----\n drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c | 6 ++---\n drivers/crypto/qat/qat_sym_hw_dp.c | 27 +++++++++++++---------\n lib/cryptodev/rte_crypto_sym.h | 2 +-\n lib/ipsec/misc.h | 4 ++--\n 6 files changed, 31 insertions(+), 26 deletions(-)", "diff": "diff --git a/app/test/test_cryptodev.c b/app/test/test_cryptodev.c\nindex e6ceeb487f..1e951981c2 100644\n--- a/app/test/test_cryptodev.c\n+++ b/app/test/test_cryptodev.c\n@@ -230,7 +230,7 @@ process_sym_raw_dp_op(uint8_t dev_id, uint16_t qp_id,\n \tdigest.va = NULL;\n \tsgl.vec = data_vec;\n \tvec.num = 1;\n-\tvec.sgl = &sgl;\n+\tvec.src_sgl = &sgl;\n \tvec.iv = &cipher_iv;\n \tvec.digest = &digest;\n \tvec.aad = &aad_auth_iv;\n@@ -394,7 +394,7 @@ process_cpu_aead_op(uint8_t dev_id, struct rte_crypto_op *op)\n \n \tsgl.vec = vec;\n \tsgl.num = n;\n-\tsymvec.sgl = &sgl;\n+\tsymvec.src_sgl = &sgl;\n \tsymvec.iv = &iv_ptr;\n \tsymvec.digest = &digest_ptr;\n \tsymvec.aad = &aad_ptr;\n@@ -440,7 +440,7 @@ process_cpu_crypt_auth_op(uint8_t dev_id, struct rte_crypto_op *op)\n \n \tsgl.vec = vec;\n \tsgl.num = n;\n-\tsymvec.sgl = &sgl;\n+\tsymvec.src_sgl = &sgl;\n \tsymvec.iv = &iv_ptr;\n \tsymvec.digest = &digest_ptr;\n \tsymvec.status = &st;\ndiff --git a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\nindex 330aad8157..d0368828e9 100644\n--- a/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n+++ b/drivers/crypto/aesni_gcm/aesni_gcm_pmd.c\n@@ -535,7 +535,7 @@ aesni_gcm_sgl_encrypt(struct aesni_gcm_session *s,\n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n \t\taesni_gcm_process_gcm_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i].va,\n+\t\t\t&vec->src_sgl[i], vec->iv[i].va,\n \t\t\tvec->aad[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_encryption(s,\n \t\t\tgdata_ctx, vec->digest[i].va);\n@@ -554,7 +554,7 @@ aesni_gcm_sgl_decrypt(struct aesni_gcm_session *s,\n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n \t\taesni_gcm_process_gcm_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i].va,\n+\t\t\t&vec->src_sgl[i], vec->iv[i].va,\n \t\t\tvec->aad[i].va);\n \t\t vec->status[i] = aesni_gcm_sgl_op_finalize_decryption(s,\n \t\t\tgdata_ctx, vec->digest[i].va);\n@@ -572,13 +572,13 @@ aesni_gmac_sgl_generate(struct aesni_gcm_session *s,\n \n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n-\t\tif (vec->sgl[i].num != 1) {\n+\t\tif (vec->src_sgl[i].num != 1) {\n \t\t\tvec->status[i] = ENOTSUP;\n \t\t\tcontinue;\n \t\t}\n \n \t\taesni_gcm_process_gmac_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i].va);\n+\t\t\t&vec->src_sgl[i], vec->iv[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_encryption(s,\n \t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\n@@ -595,13 +595,13 @@ aesni_gmac_sgl_verify(struct aesni_gcm_session *s,\n \n \tprocessed = 0;\n \tfor (i = 0; i < vec->num; ++i) {\n-\t\tif (vec->sgl[i].num != 1) {\n+\t\tif (vec->src_sgl[i].num != 1) {\n \t\t\tvec->status[i] = ENOTSUP;\n \t\t\tcontinue;\n \t\t}\n \n \t\taesni_gcm_process_gmac_sgl_op(s, gdata_ctx,\n-\t\t\t&vec->sgl[i], vec->iv[i].va);\n+\t\t\t&vec->src_sgl[i], vec->iv[i].va);\n \t\tvec->status[i] = aesni_gcm_sgl_op_finalize_decryption(s,\n \t\t\tgdata_ctx, vec->digest[i].va);\n \t\tprocessed += (vec->status[i] == 0);\ndiff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\nindex 60963a8208..2419adc699 100644\n--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c\n@@ -2002,14 +2002,14 @@ aesni_mb_cpu_crypto_process_bulk(struct rte_cryptodev *dev,\n \tfor (i = 0, j = 0, k = 0; i != vec->num; i++) {\n \n \n-\t\tret = check_crypto_sgl(sofs, vec->sgl + i);\n+\t\tret = check_crypto_sgl(sofs, vec->src_sgl + i);\n \t\tif (ret != 0) {\n \t\t\tvec->status[i] = ret;\n \t\t\tcontinue;\n \t\t}\n \n-\t\tbuf = vec->sgl[i].vec[0].base;\n-\t\tlen = vec->sgl[i].vec[0].len;\n+\t\tbuf = vec->src_sgl[i].vec[0].base;\n+\t\tlen = vec->src_sgl[i].vec[0].len;\n \n \t\tjob = IMB_GET_NEXT_JOB(mb_mgr);\n \t\tif (job == NULL) {\ndiff --git a/drivers/crypto/qat/qat_sym_hw_dp.c b/drivers/crypto/qat/qat_sym_hw_dp.c\nindex 36d11e0dc9..12825e448b 100644\n--- a/drivers/crypto/qat/qat_sym_hw_dp.c\n+++ b/drivers/crypto/qat/qat_sym_hw_dp.c\n@@ -181,8 +181,9 @@ qat_sym_dp_enqueue_cipher_jobs(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec,\n-\t\t\tvec->sgl[i].num);\n+\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req,\n+\t\t\tvec->src_sgl[i].vec,\n+\t\t\tvec->src_sgl[i].num);\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\treq->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i];\n@@ -302,8 +303,9 @@ qat_sym_dp_enqueue_auth_jobs(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec,\n-\t\t\tvec->sgl[i].num);\n+\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req,\n+\t\t\tvec->src_sgl[i].vec,\n+\t\t\tvec->src_sgl[i].num);\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\treq->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i];\n@@ -484,14 +486,16 @@ qat_sym_dp_enqueue_chain_jobs(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec,\n-\t\t\tvec->sgl[i].num);\n+\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req,\n+\t\t\tvec->src_sgl[i].vec,\n+\t\t\tvec->src_sgl[i].num);\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\treq->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i];\n-\t\tif (unlikely(enqueue_one_chain_job(ctx, req, vec->sgl[i].vec,\n-\t\t\tvec->sgl[i].num, &vec->iv[i], &vec->digest[i],\n-\t\t\t\t&vec->auth_iv[i], ofs, (uint32_t)data_len)))\n+\t\tif (unlikely(enqueue_one_chain_job(ctx, req,\n+\t\t\tvec->src_sgl[i].vec, vec->src_sgl[i].num,\n+\t\t\t&vec->iv[i], &vec->digest[i],\n+\t\t\t&vec->auth_iv[i], ofs, (uint32_t)data_len)))\n \t\t\tbreak;\n \n \t\ttail = (tail + tx_queue->msg_size) & tx_queue->modulo_mask;\n@@ -688,8 +692,9 @@ qat_sym_dp_enqueue_aead_jobs(void *qp_data, uint8_t *drv_ctx,\n \t\t\t(uint8_t *)tx_queue->base_addr + tail);\n \t\trte_mov128((uint8_t *)req, (const uint8_t *)&(ctx->fw_req));\n \n-\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req, vec->sgl[i].vec,\n-\t\t\tvec->sgl[i].num);\n+\t\tdata_len = qat_sym_dp_parse_data_vec(qp, req,\n+\t\t\tvec->src_sgl[i].vec,\n+\t\t\tvec->src_sgl[i].num);\n \t\tif (unlikely(data_len < 0))\n \t\t\tbreak;\n \t\treq->comn_mid.opaque_data = (uint64_t)(uintptr_t)user_data[i];\ndiff --git a/lib/cryptodev/rte_crypto_sym.h b/lib/cryptodev/rte_crypto_sym.h\nindex 58c0724743..dcc0bd5933 100644\n--- a/lib/cryptodev/rte_crypto_sym.h\n+++ b/lib/cryptodev/rte_crypto_sym.h\n@@ -69,7 +69,7 @@ struct rte_crypto_sym_vec {\n \t/** number of operations to perform */\n \tuint32_t num;\n \t/** array of SGL vectors */\n-\tstruct rte_crypto_sgl *sgl;\n+\tstruct rte_crypto_sgl *src_sgl;\n \t/** array of pointers to cipher IV */\n \tstruct rte_crypto_va_iova_ptr *iv;\n \t/** array of pointers to digest */\ndiff --git a/lib/ipsec/misc.h b/lib/ipsec/misc.h\nindex 79b9a20762..58ff538141 100644\n--- a/lib/ipsec/misc.h\n+++ b/lib/ipsec/misc.h\n@@ -136,7 +136,7 @@ cpu_crypto_bulk(const struct rte_ipsec_session *ss,\n \t\t/* not enough space in vec[] to hold all segments */\n \t\tif (vcnt < 0) {\n \t\t\t/* fill the request structure */\n-\t\t\tsymvec.sgl = &vecpkt[j];\n+\t\t\tsymvec.src_sgl = &vecpkt[j];\n \t\t\tsymvec.iv = &iv[j];\n \t\t\tsymvec.digest = &dgst[j];\n \t\t\tsymvec.aad = &aad[j];\n@@ -160,7 +160,7 @@ cpu_crypto_bulk(const struct rte_ipsec_session *ss,\n \t}\n \n \t/* fill the request structure */\n-\tsymvec.sgl = &vecpkt[j];\n+\tsymvec.src_sgl = &vecpkt[j];\n \tsymvec.iv = &iv[j];\n \tsymvec.aad = &aad[j];\n \tsymvec.digest = &dgst[j];\n", "prefixes": [ "v3", "01/15" ] }