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GET /api/patches/100650/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 100650,
    "url": "http://patches.dpdk.org/api/patches/100650/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211006192008.23369-1-david.marchand@redhat.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20211006192008.23369-1-david.marchand@redhat.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20211006192008.23369-1-david.marchand@redhat.com",
    "date": "2021-10-06T19:20:08",
    "name": "eal/x86: fix some CPU extended features",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "6696a688bb60357c888ff3494a9963af523301b9",
    "submitter": {
        "id": 1173,
        "url": "http://patches.dpdk.org/api/people/1173/?format=api",
        "name": "David Marchand",
        "email": "david.marchand@redhat.com"
    },
    "delegate": {
        "id": 24651,
        "url": "http://patches.dpdk.org/api/users/24651/?format=api",
        "username": "dmarchand",
        "first_name": "David",
        "last_name": "Marchand",
        "email": "david.marchand@redhat.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211006192008.23369-1-david.marchand@redhat.com/mbox/",
    "series": [
        {
            "id": 19419,
            "url": "http://patches.dpdk.org/api/series/19419/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19419",
            "date": "2021-10-06T19:20:08",
            "name": "eal/x86: fix some CPU extended features",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/19419/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/100650/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/100650/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2467EA0C4D;\n\tWed,  6 Oct 2021 21:20:25 +0200 (CEST)",
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            "from dmarchan.remote.csb (unknown [10.40.192.122])\n by smtp.corp.redhat.com (Postfix) with ESMTP id D3F7A17C58;\n Wed,  6 Oct 2021 19:20:16 +0000 (UTC)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com;\n s=mimecast20190719; t=1633548023;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=Kp0TMJgx5A1g+iAsBNCpRZGfWrVjwdsJBHt+GToMZm0=;\n b=HJ0gEtOOL5lJ4U71GUx/ar2U5awV9TPgv4fHaxDnArbw0pgTxA4XBvDI5H/lxfXs4jXvr+\n 8vYM5EZj1yrU3Bu3M9JcBD2UDuF6X8NQF1kXRtrn1Y3z2M+Iqvw0sF58XbooCa3EJ3E0dm\n Gc+mb1jFYa97vsagnTRgrRG+LasbcuU=",
        "X-MC-Unique": "hjaLVh-qNs6hAE5O01uFyg-1",
        "From": "David Marchand <david.marchand@redhat.com>",
        "To": "dev@dpdk.org",
        "Cc": "stable@dpdk.org, Bruce Richardson <bruce.richardson@intel.com>,\n Konstantin Ananyev <konstantin.ananyev@intel.com>",
        "Date": "Wed,  6 Oct 2021 21:20:08 +0200",
        "Message-Id": "<20211006192008.23369-1-david.marchand@redhat.com>",
        "MIME-Version": "1.0",
        "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.11",
        "Authentication-Results": "relay.mimecast.com;\n auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david.marchand@redhat.com",
        "X-Mimecast-Spam-Score": "0",
        "X-Mimecast-Originator": "redhat.com",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain; charset=\"US-ASCII\"",
        "Subject": "[dpdk-dev] [PATCH] eal/x86: fix some CPU extended features",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Caught while checking CPUID related stuff in OVS.\n\nAccording to [1], for Structured Extended Feature Flags Enumeration Leaf\n(EAX = 0x07H, ECX = 0):\n\n- BMI1 is associated to EBX, bit 3 (was incorrectly 2),\n- SMEP is associated to EBX, bit 7 (was incorrectly 6),\n- BMI2 is associated to EBX, bit 8 (was incorrectly 7),\n- ERMS is associated to EBX, bit 9 (was incorrectly 8),\n\nThis patch then sorts the rest of the extended features (leaf 0) for\nreadability.\n\n1: https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf\n\nFixes: af75078fece3 (\"first public release\")\nCc: stable@dpdk.org\n\nSigned-off-by: David Marchand <david.marchand@redhat.com>\n---\n lib/eal/x86/rte_cpuflags.c | 46 +++++++++++++++++++-------------------\n 1 file changed, 23 insertions(+), 23 deletions(-)",
    "diff": "diff --git a/lib/eal/x86/rte_cpuflags.c b/lib/eal/x86/rte_cpuflags.c\nindex d339734a8c..d6b518251b 100644\n--- a/lib/eal/x86/rte_cpuflags.c\n+++ b/lib/eal/x86/rte_cpuflags.c\n@@ -100,18 +100,36 @@ const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(ENERGY_EFF, 0x00000006, 0, RTE_REG_ECX,  3)\n \n \tFEAT_DEF(FSGSBASE, 0x00000007, 0, RTE_REG_EBX,  0)\n-\tFEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX,  2)\n+\tFEAT_DEF(BMI1, 0x00000007, 0, RTE_REG_EBX,  3)\n \tFEAT_DEF(HLE, 0x00000007, 0, RTE_REG_EBX,  4)\n \tFEAT_DEF(AVX2, 0x00000007, 0, RTE_REG_EBX,  5)\n-\tFEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX,  6)\n-\tFEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX,  7)\n-\tFEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX,  8)\n+\tFEAT_DEF(SMEP, 0x00000007, 0, RTE_REG_EBX,  7)\n+\tFEAT_DEF(BMI2, 0x00000007, 0, RTE_REG_EBX,  8)\n+\tFEAT_DEF(ERMS, 0x00000007, 0, RTE_REG_EBX,  9)\n \tFEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10)\n \tFEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11)\n \tFEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16)\n+\tFEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)\n \tFEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18)\n+\tFEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)\n+\tFEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)\n+\tFEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)\n+\tFEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)\n+\n+\tFEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX,  1)\n+\tFEAT_DEF(WAITPKG, 0x00000007, 0, RTE_REG_ECX,  5)\n+\tFEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX,  6)\n+\tFEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX,  8)\n+\tFEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX,  9)\n+\tFEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)\n+\tFEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)\n+\tFEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)\n+\tFEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX, 14)\n+\tFEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)\n+\tFEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)\n+\tFEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)\n \n-\tFEAT_DEF(WAITPKG, 0x00000007, 0, RTE_REG_ECX, 5)\n+\tFEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX,  8)\n \n \tFEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX,  0)\n \tFEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX,  4)\n@@ -123,24 +141,6 @@ const struct feature_entry rte_cpu_feature_table[] = {\n \tFEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29)\n \n \tFEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX,  8)\n-\n-\tFEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)\n-\tFEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)\n-\tFEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)\n-\tFEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)\n-\tFEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)\n-\tFEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)\n-\tFEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)\n-\tFEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)\n-\tFEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)\n-\tFEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)\n-\tFEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)\n-\tFEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)\n-\tFEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX,  14)\n-\tFEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)\n-\tFEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)\n-\tFEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)\n-\tFEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)\n };\n \n int\n",
    "prefixes": []
}