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GET /api/patches/100630/?format=api
{ "id": 100630, "url": "http://patches.dpdk.org/api/patches/100630/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20211006120945.6612-8-talshn@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211006120945.6612-8-talshn@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211006120945.6612-8-talshn@nvidia.com", "date": "2021-10-06T12:09:40", "name": "[07/12] common/mlx5: read TSO capability from DevX", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "f01476a19329c38fbe97345737ad42fac2820b20", "submitter": { "id": 1893, "url": "http://patches.dpdk.org/api/people/1893/?format=api", "name": "Tal Shnaiderman", "email": "talshn@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20211006120945.6612-8-talshn@nvidia.com/mbox/", "series": [ { "id": 19415, "url": "http://patches.dpdk.org/api/series/19415/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=19415", "date": "2021-10-06T12:09:33", "name": "Expand NIC offloads support on Windows", "version": 1, "mbox": "http://patches.dpdk.org/series/19415/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/100630/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/100630/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C3716A0C41;\n\tWed, 6 Oct 2021 14:12:23 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D0F494116F;\n\tWed, 6 Oct 2021 14:10:59 +0200 (CEST)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2077.outbound.protection.outlook.com [40.107.94.77])\n by mails.dpdk.org (Postfix) with ESMTP id 26ACE410F2\n for <dev@dpdk.org>; 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mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.112.34) smtp.rcpttodomain=monjalon.net smtp.mailfrom=nvidia.com;\n dmarc=pass (p=quarantine sp=none pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=N79rasYftW9U2WIcVffu9tf7BHsu6g+HoBLeddmTgNE=;\n b=OWBxFaMMyfxGzeTAWrJyK/FzHZA/t+xUulhnXYg9heUbDD92DWs4yCiWAKZKfWNpxkHCb+61SyR9buEZ4lGgmD8QszYYKhrKuFT/HOGb2IkhEJYEdQzS9a3LOzQmiVJC5nmYofB1yKZVIc0WhTIrKh45WxEPmqPIC6dagz58DRumBZYzKOcyRZHU+MG6Mv4j0iJiUgQj/l1eRyXB0a0osFcCuL74egrqYfWP315kZyRJ1Oqu3H+yuEg6BCWxXmqI1YiZWHgrZdTujCL14kiw2cbU7+QFjVwyuWybcIt9NB+DMVDzJFFOJzYw9+lGFMDbRQOdjo80wWS0/MvZn1tNrg==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.112.34)\n smtp.mailfrom=nvidia.com; monjalon.net; dkim=none (message not signed)\n header.d=none;monjalon.net; dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.112.34 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.112.34; helo=mail.nvidia.com;", "From": "Tal Shnaiderman <talshn@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<thomas@monjalon.net>, <matan@nvidia.com>, <rasland@nvidia.com>,\n <asafp@nvidia.com>, <viacheslavo@nvidia.com>, <eilong@nvidia.com>,\n <kcollins@nvidia.com>, <idanhac@nvidia.com>", "Date": "Wed, 6 Oct 2021 15:09:40 +0300", "Message-ID": "<20211006120945.6612-8-talshn@nvidia.com>", "X-Mailer": "git-send-email 2.16.1.windows.4", "In-Reply-To": "<20211006120945.6612-1-talshn@nvidia.com>", "References": "<20211006120945.6612-1-talshn@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[172.20.187.6]", "X-ClientProxiedBy": "HQMAIL111.nvidia.com (172.20.187.18) To\n HQMAIL107.nvidia.com (172.20.187.13)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "6edf65fa-f91f-4cd4-01e6-08d988c259f3", "X-MS-TrafficTypeDiagnostic": "BY5PR12MB4950:", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BY5PR12MB49507A50F6EB5D145858B58FA4B09@BY5PR12MB4950.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:2733;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n TTE3q1B0stwhiQF82cEcbtgYX3JHrkjcjgfb8lcFojbA8m66bPncp2tPpnkfnAypQ3KEplfjwEqe2tNDnr5DJRgSa+w5EUIXoIq9RXGUIpQXKGaqO18pqR1WkaxVXQysyFGbZ8xS3s8YTNE4lwMAGOwRzDv7dA+Nuy884gmea81XqW6GUtWZSd7uS0eZ6Cdm3IMFEDYTWCHTcoSvf1dRYYS6IYQ8mNuF8G2pLxymiv6BtHsIOvOFQ8/9c4VJc86whotEtjBXSrxPl0B8gWF6DvCb8LHmGQudXpRR90mJ6VVS36IYP2II1Q1Tx9f/E2TftUe2RkFgnZ/LT9hB9Cd7LGn5aQa3/1pdMNU+i+pInc0KVUXmFA+iX5ddq+mjP8hAFn4PMIs9z+OdnWbK1CRyb3Cn57rIOG2BmsOU7EFLiqdghxDl1cfTpnlF/JbWw3xR1JB1as3zUfo45W2CIsxDszQX2iBsTO7HNB9AZCAr2M26yZKkUDFVAJn9DqKrRJetB14nNTs+cjJ0keDsX38kMB0EKNA2ieiQmtE+tbUG1Xvz3mAVzx6L+RgcOoK9XNDJ5unLb6fdHCiRea94SYc9+2hYWoaAAEL6PiHmBgd6b4SDOE84a/dH7nrlYpvc5AOE2YuGNnZ4yzSukKNqYhb9XluRCVcYuQZIodnWmFKbQI5CAmNk2V/RWwMvewhBdWN9n0LQhZSrvMrjw5HeDvG8Aw==", "X-Forefront-Antispam-Report": "CIP:216.228.112.34; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:schybrid03.nvidia.com; CAT:NONE;\n SFS:(4636009)(46966006)(36840700001)(1076003)(5660300002)(7696005)(70586007)(6286002)(8676002)(107886003)(82310400003)(2616005)(36860700001)(4326008)(47076005)(2906002)(8936002)(336012)(36756003)(426003)(356005)(70206006)(36906005)(6916009)(55016002)(26005)(508600001)(86362001)(186003)(16526019)(316002)(7636003)(54906003)(6666004);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "06 Oct 2021 12:10:56.2557 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 6edf65fa-f91f-4cd4-01e6-08d988c259f3", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.112.34];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT045.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BY5PR12MB4950", "Subject": "[dpdk-dev] [PATCH 07/12] common/mlx5: read TSO capability from DevX", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "mlx5 in Windows needs the hca capability max_lso_cap\nto query the NIC for TSO offloading support.\n\nAdded the capability as part of the capabilities\nqueried by the PMD using DevX.\n\nSigned-off-by: Tal Shnaiderman <talshn@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_devx_cmds.c | 2 ++\n drivers/common/mlx5/mlx5_devx_cmds.h | 1 +\n 2 files changed, 3 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c\nindex cd18ab584f..be3c3e61d1 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.c\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.c\n@@ -987,6 +987,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,\n \t\t\t\t\t hcattr, csum_cap);\n \tattr->lro_cap = MLX5_GET(per_protocol_networking_offload_caps, hcattr,\n \t\t\t\t lro_cap);\n+\tattr->max_lso_cap = MLX5_GET(per_protocol_networking_offload_caps,\n+\t\t\t\t hcattr, max_lso_cap);\n \tattr->tunnel_lro_gre = MLX5_GET(per_protocol_networking_offload_caps,\n \t\t\t\t\thcattr, tunnel_lro_gre);\n \tattr->tunnel_lro_vxlan = MLX5_GET(per_protocol_networking_offload_caps,\ndiff --git a/drivers/common/mlx5/mlx5_devx_cmds.h b/drivers/common/mlx5/mlx5_devx_cmds.h\nindex 893a24dd3c..7a0155558e 100644\n--- a/drivers/common/mlx5/mlx5_devx_cmds.h\n+++ b/drivers/common/mlx5/mlx5_devx_cmds.h\n@@ -113,6 +113,7 @@ struct mlx5_hca_attr {\n \tuint32_t tunnel_stateless_geneve_rx:1;\n \tuint32_t geneve_max_opt_len:1; /* 0x0: 14DW, 0x1: 63DW */\n \tuint32_t tunnel_stateless_gtp:1;\n+\tuint32_t max_lso_cap;\n \tuint32_t lro_cap:1;\n \tuint32_t tunnel_lro_gre:1;\n \tuint32_t tunnel_lro_vxlan:1;\n", "prefixes": [ "07/12" ] }