Show a cover letter.

GET /api/covers/680/?format=api
HTTP 200 OK
Allow: GET, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 680,
    "url": "http://patches.dpdk.org/api/covers/680/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/cover/20240223151255.3310490-1-ciara.power@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240223151255.3310490-1-ciara.power@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240223151255.3310490-1-ciara.power@intel.com",
    "date": "2024-02-23T15:12:51",
    "name": "[v2,0/4] add new QAT gen3 and gen5",
    "submitter": {
        "id": 978,
        "url": "http://patches.dpdk.org/api/people/978/?format=api",
        "name": "Ciara Power",
        "email": "ciara.power@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/cover/20240223151255.3310490-1-ciara.power@intel.com/mbox/",
    "series": [
        {
            "id": 31204,
            "url": "http://patches.dpdk.org/api/series/31204/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31204",
            "date": "2024-02-23T15:12:51",
            "name": "add new QAT gen3 and gen5",
            "version": 2,
            "mbox": "http://patches.dpdk.org/series/31204/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/covers/680/comments/",
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7F87C43B82;\n\tFri, 23 Feb 2024 16:13:11 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0B7E34027A;\n\tFri, 23 Feb 2024 16:13:11 +0100 (CET)",
            "from mgamail.intel.com (mgamail.intel.com [198.175.65.20])\n by mails.dpdk.org (Postfix) with ESMTP id 62AEF4021E\n for <dev@dpdk.org>; Fri, 23 Feb 2024 16:13:09 +0100 (CET)",
            "from fmviesa009.fm.intel.com ([10.60.135.149])\n by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Feb 2024 07:13:07 -0800",
            "from silpixa00401797.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.113])\n by fmviesa009.fm.intel.com with ESMTP; 23 Feb 2024 07:13:05 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1708701190; x=1740237190;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=t5FxCBqOscX0NbwWZ/R4kBJTQuCN66jdHQRwY6NsUH8=;\n b=Y7Iy0gZUu/SOcxRlcqyYBFAFGlATm8Ybr0AvWXGcyPnmGp0Om9oFtVQQ\n LPzy79SdqyBwBUnJYJTmDGlqpl7B0s9spFdwlneGk/H1o1cOAeAsJcd+f\n yBH+7ymBODXDMrXwTSuKUllKm/jGkHJY4mp8I04OokbROf0R15+aqfryW\n sTcSe6tuXBMLbkotL5iKKBg1FlaMvaaNKS5aEP1uKb+0eKCi0jIVQ1DnW\n Sn4B3U2qRegd0BV4J9AZLTKnzdz75QAVZlO3oqHv+ilGV+98tGGKHtlto\n Jc3c++gxK3uMYVqoOWqqCBSCkDSDcX1qOfdMCnkgUo0hkgi0E6rxd4v+w Q==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10993\"; a=\"2905930\"",
            "E=Sophos;i=\"6.06,180,1705392000\";\n   d=\"scan'208\";a=\"2905930\"",
            "E=Sophos;i=\"6.06,180,1705392000\";\n   d=\"scan'208\";a=\"5881542\""
        ],
        "X-ExtLoop1": "1",
        "From": "Ciara Power <ciara.power@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "gakhil@marvell.com, kai.ji@intel.com, arkadiuszx.kusztal@intel.com,\n Ciara Power <ciara.power@intel.com>",
        "Subject": "[PATCH v2 0/4] add new QAT gen3 and gen5",
        "Date": "Fri, 23 Feb 2024 15:12:51 +0000",
        "Message-Id": "<20240223151255.3310490-1-ciara.power@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20231219155124.4133385-1-ciara.power@intel.com>",
        "References": "<20231219155124.4133385-1-ciara.power@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patchset adds support for two new QAT devices.\nA new GEN3 device, and a GEN5 device, both of which have\nwireless slice support for algorithms such as ZUC-256.\n\nSymmetric, asymmetric and compression are all supported\nfor these devices.\n \nv2:\n  - New patch added for gen5 device that reuses gen4 code,\n    and new gen3 wireless slice changes.\n  - Removed patch to disable asymmetric and compression.\n  - Documentation updates added.\n  - Fixed ZUC-256 IV modification for raw API path.\n  - Fixed setting extended protocol flag bit position.\n  - Added check for ZUC-256 wireless slice in slice map.\n\nCiara Power (4):\n  common/qat: add new gen3 device\n  common/qat: add zuc256 wireless slice for gen3\n  common/qat: add new gen3 CMAC macros\n  common/qat: add gen5 device\n\n doc/guides/compressdevs/qat_comp.rst         |   1 +\n doc/guides/cryptodevs/qat.rst                |   6 +\n doc/guides/rel_notes/release_24_03.rst       |   7 +\n drivers/common/qat/dev/qat_dev_gen4.c        |  31 ++-\n drivers/common/qat/dev/qat_dev_gen5.c        |  51 ++++\n drivers/common/qat/dev/qat_dev_gens.h        |  54 ++++\n drivers/common/qat/meson.build               |   3 +\n drivers/common/qat/qat_adf/icp_qat_fw.h      |   6 +-\n drivers/common/qat/qat_adf/icp_qat_fw_la.h   |  24 ++\n drivers/common/qat/qat_adf/icp_qat_hw.h      |  26 +-\n drivers/common/qat/qat_common.h              |   1 +\n drivers/common/qat/qat_device.c              |  19 ++\n drivers/common/qat/qat_device.h              |   2 +\n drivers/compress/qat/dev/qat_comp_pmd_gen4.c |   8 +-\n drivers/compress/qat/dev/qat_comp_pmd_gen5.c |  73 +++++\n drivers/compress/qat/dev/qat_comp_pmd_gens.h |  14 +\n drivers/crypto/qat/dev/qat_crypto_pmd_gen2.c |   7 +-\n drivers/crypto/qat/dev/qat_crypto_pmd_gen3.c |  63 ++++-\n drivers/crypto/qat/dev/qat_crypto_pmd_gen4.c |   4 +-\n drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c | 278 +++++++++++++++++++\n drivers/crypto/qat/dev/qat_crypto_pmd_gens.h |  40 ++-\n drivers/crypto/qat/dev/qat_sym_pmd_gen1.c    |  43 +++\n drivers/crypto/qat/qat_sym_session.c         | 177 ++++++++++--\n drivers/crypto/qat/qat_sym_session.h         |   2 +\n 24 files changed, 889 insertions(+), 51 deletions(-)\n create mode 100644 drivers/common/qat/dev/qat_dev_gen5.c\n create mode 100644 drivers/compress/qat/dev/qat_comp_pmd_gen5.c\n create mode 100644 drivers/crypto/qat/dev/qat_crypto_pmd_gen5.c"
}