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{ "id": 65534, "url": "http://patches.dpdk.org/api/covers/65534/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20200204131258.17632-1-marcinx.smoczynski@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200204131258.17632-1-marcinx.smoczynski@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200204131258.17632-1-marcinx.smoczynski@intel.com", "date": "2020-02-04T13:12:50", "name": "[v6,0/8] Introduce CPU crypto mode", "submitter": { "id": 1293, "url": "http://patches.dpdk.org/api/people/1293/?format=api", "name": "Marcin Smoczynski", "email": "marcinx.smoczynski@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20200204131258.17632-1-marcinx.smoczynski@intel.com/mbox/", "series": [ { "id": 8413, "url": "http://patches.dpdk.org/api/series/8413/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=8413", "date": "2020-02-04T13:12:50", "name": "Introduce CPU crypto mode", "version": 6, "mbox": "http://patches.dpdk.org/series/8413/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/65534/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C7CC0A0534;\n\tTue, 4 Feb 2020 14:13:07 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EAE711C12D;\n\tTue, 4 Feb 2020 14:13:06 +0100 (CET)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by dpdk.org (Postfix) with ESMTP id 3D563397D\n for <dev@dpdk.org>; Tue, 4 Feb 2020 14:13:05 +0100 (CET)", "from fmsmga005.fm.intel.com ([10.253.24.32])\n by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 04 Feb 2020 05:13:04 -0800", "from msmoczyx-mobl.ger.corp.intel.com ([10.103.102.190])\n by fmsmga005.fm.intel.com with ESMTP; 04 Feb 2020 05:13:02 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,401,1574150400\"; d=\"scan'208\";a=\"429800365\"", "From": "Marcin Smoczynski <marcinx.smoczynski@intel.com>", "To": "akhil.goyal@nxp.com, konstantin.ananyev@intel.com,\n roy.fan.zhang@intel.com,\n declan.doherty@intel.com, radu.nicolau@intel.com,\n pablo.de.lara.guarch@intel.com", "Cc": "dev@dpdk.org,\n\tMarcin Smoczynski <marcinx.smoczynski@intel.com>", "Date": "Tue, 4 Feb 2020 14:12:50 +0100", "Message-Id": "<20200204131258.17632-1-marcinx.smoczynski@intel.com>", "X-Mailer": "git-send-email 2.21.0.windows.1", "In-Reply-To": "<20200128142220.16644-1-marcinx.smoczynski@intel.com>", "References": "<20200128142220.16644-1-marcinx.smoczynski@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v6 0/8] Introduce CPU crypto mode", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Originally both SW and HW crypto PMDs use rte_crypot_op based API to\nprocess the crypto workload asynchronously. This way provides uniformity\nto both PMD types, but also introduce unnecessary performance penalty to\nSW PMDs that have to \"simulate\" HW async behavior (crypto-ops\nenqueue/dequeue, HW addresses computations, storing/dereferencing user\nprovided data (mbuf) for each crypto-op, etc).\n\nThe aim is to introduce a new optional API for SW crypto-devices\nto perform crypto processing in a synchronous manner.\n\nv3 to v4 changes:\n - add feature discovery in the ipsec example application when\n using cpu-crypto\n - add gmac in aesni-gcm\n - add tests for aesni-gcm/cpu crypto mode\n - add documentation: pg and rel notes\n - remove xform flags as no longer needed\n - add some extra API comments\n - remove compilation error from v3\n\nv4 to v5 changes:\n - fixed build error for arm64 (missing header include)\n - update licensing information\n\nv5 to v6 changes:\n - unit tests integrated in the current test application for cryptodev\n - iova fix\n - moved mbuf to sgl helper function to crypo sym header\n\nMarcin Smoczynski (8):\n cryptodev: introduce cpu crypto support API\n crypto/aesni_gcm: cpu crypto support\n security: add cpu crypto action type\n test/crypto: add cpu crypto mode to tests\n ipsec: introduce support for cpu crypto mode\n examples/ipsec-secgw: cpu crypto support\n examples/ipsec-secgw: cpu crypto testing\n doc: add release notes for cpu crypto\n\n app/test/test_cryptodev.c | 161 ++++++++++++-\n doc/guides/cryptodevs/aesni_gcm.rst | 7 +-\n doc/guides/cryptodevs/features/aesni_gcm.ini | 1 +\n doc/guides/cryptodevs/features/default.ini | 1 +\n doc/guides/prog_guide/cryptodev_lib.rst | 33 ++-\n doc/guides/prog_guide/ipsec_lib.rst | 10 +-\n doc/guides/prog_guide/rte_security.rst | 15 +-\n doc/guides/rel_notes/release_20_02.rst | 7 +\n drivers/crypto/aesni_gcm/aesni_gcm_ops.h | 11 +-\n drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 222 +++++++++++++++++-\n drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 4 +-\n .../crypto/aesni_gcm/aesni_gcm_pmd_private.h | 13 +-\n examples/ipsec-secgw/ipsec.c | 25 +-\n examples/ipsec-secgw/ipsec_process.c | 136 +++++++----\n examples/ipsec-secgw/sa.c | 30 ++-\n examples/ipsec-secgw/test/common_defs.sh | 21 ++\n examples/ipsec-secgw/test/linux_test4.sh | 11 +-\n examples/ipsec-secgw/test/linux_test6.sh | 11 +-\n .../test/trs_3descbc_sha1_common_defs.sh | 8 +-\n .../test/trs_aescbc_sha1_common_defs.sh | 8 +-\n .../test/trs_aesctr_sha1_common_defs.sh | 8 +-\n .../test/tun_3descbc_sha1_common_defs.sh | 8 +-\n .../test/tun_aescbc_sha1_common_defs.sh | 8 +-\n .../test/tun_aesctr_sha1_common_defs.sh | 8 +-\n lib/librte_cryptodev/rte_crypto_sym.h | 128 +++++++++-\n lib/librte_cryptodev/rte_cryptodev.c | 35 ++-\n lib/librte_cryptodev/rte_cryptodev.h | 22 +-\n lib/librte_cryptodev/rte_cryptodev_pmd.h | 21 +-\n .../rte_cryptodev_version.map | 1 +\n lib/librte_ipsec/esp_inb.c | 156 ++++++++++--\n lib/librte_ipsec/esp_outb.c | 136 ++++++++++-\n lib/librte_ipsec/misc.h | 73 +++++-\n lib/librte_ipsec/rte_ipsec.h | 20 +-\n lib/librte_ipsec/sa.c | 114 +++++++--\n lib/librte_ipsec/sa.h | 19 +-\n lib/librte_ipsec/ses.c | 5 +-\n lib/librte_security/rte_security.h | 8 +-\n 37 files changed, 1311 insertions(+), 194 deletions(-)" }