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{ "id": 62976, "url": "http://patches.dpdk.org/api/covers/62976/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/1573715667-192995-1-git-send-email-rosen.xu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1573715667-192995-1-git-send-email-rosen.xu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1573715667-192995-1-git-send-email-rosen.xu@intel.com", "date": "2019-11-14T07:14:08", "name": "[v17,00/19] add PCIe AER disable and IRQ support for ipn3ke", "submitter": { "id": 946, "url": "http://patches.dpdk.org/api/people/946/?format=api", "name": "Xu, Rosen", "email": "rosen.xu@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/1573715667-192995-1-git-send-email-rosen.xu@intel.com/mbox/", "series": [ { "id": 7453, "url": "http://patches.dpdk.org/api/series/7453/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=7453", "date": "2019-11-14T07:14:08", "name": "add PCIe AER disable and IRQ support for ipn3ke", "version": 17, "mbox": "http://patches.dpdk.org/series/7453/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/62976/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 04E50A04C2;\n\tThu, 14 Nov 2019 08:16:04 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B5AB33423;\n\tThu, 14 Nov 2019 08:16:04 +0100 (CET)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by dpdk.org (Postfix) with ESMTP id 0BA242F42\n for <dev@dpdk.org>; Thu, 14 Nov 2019 08:16:02 +0100 (CET)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 13 Nov 2019 23:15:45 -0800", "from dpdk-rosen-02.sh.intel.com ([10.67.110.156])\n by orsmga006.jf.intel.com with ESMTP; 13 Nov 2019 23:15:43 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.68,302,1569308400\"; d=\"scan'208\";a=\"208041287\"", "From": "Rosen Xu <rosen.xu@intel.com>", "To": "dev@dpdk.org", "Cc": "rosen.xu@intel.com, tianfei.zhang@intel.com, andy.pei@intel.com,\n xiaolong.ye@intel.com, ferruh.yigit@intel.com", "Date": "Thu, 14 Nov 2019 15:14:08 +0800", "Message-Id": "<1573715667-192995-1-git-send-email-rosen.xu@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>", "References": "<1571917119-149534-2-git-send-email-andy.pei@intel.com>", "Subject": "[dpdk-dev] [PATCH v17 00/19] add PCIe AER disable and IRQ support\n\tfor ipn3ke", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This patch set adds PCIe AER disable and FPGA interrupt support for\nipn3ke. It also provides a small rework for port bonding between FPGA\nline side port and I40e PF port.\n\nWhat is the PCI Express AER(Advanced Error Reporting)?\nAdvanced Error Reporting capability is implemented with a PCI Express\nadvanced error reporting extended capability structure providing more\nrobust error reporting. It's also one of PCI Express error reporting\nparadigms. AER is supported by most of PCIe devices.\n\nIn PAC N3000 card, some uncertainty errors will cause FPGA reload,\nsuch as temperature is higher than threshold. From Software point of\nview, FPGA reload means FPGA unplug and plug. For avoiding system\ncrash we need to clear AER register before these errors occur.\n\nCurrently PAC N3000 card FME and AFU all provide interrupts, in ifpga\nrawdev driver, we implement a FME interrupt function to notify errors\nreported by FME. Besides this, OPAE share code also provide a common\nAFU interrupt API for users to register their own interrupt functions.\n\nv17 updates:\n=========\n- remove rte_panic.\n\nv16 updates:\n=========\n- rebase to DPDK 19.11 RC-2.\n\nv15 updates:\n=========\n- fix share library build issues.\n\nv14 updates:\n=========\n- fix coding style and remove unnecessary comments.\n\nv13 updates:\n=========\n- fix meson build issue.\n\nv12 updates:\n=========\n- fix meson build issue.\n \nv11 updates:\n=========\n- move symbol ifpga_rawdev_ge to the EXPERIMENTAL section of \n drivers/raw/ifpga/rte_rawdev_ifpga_version.map\n\nv10 updates:\n=========\n- introducing new irq API\n- fix meson build issue\n\nv9 updates:\n=========\n- Add mutex lock on do_transaction() function for SPI driver to avoid race\n condition.\n\nv8 updates:\n=========\n- add multiple cards support.\n\nv7 updates:\n==========\n- rename function i40e_set_switch_dev to rte_pmd_i40e_set_switch_dev\n and move it to rte_pmd_i40e.c since it is declared at rte_pmd_i40e.h\n- function rte_pmd_i40e_set_switch_dev works as an external API,\n use port_id but not rte_eth_dev as parameter.\n- add doxygen header here for the new API.\n- update the rte_pmd_i40e_version.map.\n- fix coding style issue.\n- enable CONFIG_RTE_EAL_VFIO in linux environment to build irq support.\n- for functions with a lot of similarity, extract out common function to reduce\n duplication.\n\nv6 updates:\n=========\n- correct author information.\n- correct typo in commit message and remove Gerrit Change-Id's before\n submitting upstream\n\nv5 updates:\n==========\n- add lightweight fpga image support. in lightweight fpga image mode,\n ipn3ke representor will not be probed.\n\nv4 updates:\n===========\n- align with new naming standard.\n\nv3 updates:\n===========\n- Add FPGA network side port MTU configuration\n\nv2 updates:\n===========\n- Add AUX feature support\n\nAndy Pei (2):\n net/i40e: i40e support ipn3ke FPGA port bonding\n raw/ifpga: add lightweight fpga image support\n\nRosen Xu (3):\n raw/ifpga: add SEU error handler\n raw/ifpga: add PCIe BDF devices tree scan\n net/ipn3ke: remove configuration for i40e port bonding\n\nTianfei zhang (14):\n raw/ifpga/base: add irq support\n raw/ifpga/base: clear pending bit\n raw/ifpga/base: add SEU error support\n raw/ifpga/base: add device tree support\n raw/ifpga/base: align the send buffer for SPI\n raw/ifpga/base: add sensor support\n raw/ifpga/base: introducing sensor APIs\n raw/ifpga/base: update SEU register definition\n raw/ifpga/base: add secure support\n raw/ifpga/base: configure FEC mode\n raw/ifpga/base: clean fme errors\n raw/ifpga/base: add new API get board info\n raw/ifpga/base: add multiple cards support\n raw/ifpga: introducing new irq API\n\n config/common_base | 4 +-\n config/common_linux | 6 +\n drivers/meson.build | 6 +-\n drivers/net/i40e/base/i40e_type.h | 3 +\n drivers/net/i40e/i40e_ethdev.c | 6 +\n drivers/net/i40e/rte_pmd_i40e.c | 21 +\n drivers/net/i40e/rte_pmd_i40e.h | 18 +\n drivers/net/i40e/rte_pmd_i40e_version.map | 8 +-\n drivers/net/ipn3ke/Makefile | 1 +\n drivers/net/ipn3ke/ipn3ke_ethdev.c | 292 ++-------\n drivers/net/ipn3ke/ipn3ke_flow.c | 6 +\n drivers/net/ipn3ke/ipn3ke_rawdev_api.h | 12 +\n drivers/net/ipn3ke/ipn3ke_representor.c | 10 +-\n drivers/net/ipn3ke/meson.build | 24 +-\n drivers/net/ipn3ke/rte_pmd_ipn3ke_version.map | 6 +\n drivers/raw/ifpga/Makefile | 5 +\n drivers/raw/ifpga/base/ifpga_api.c | 21 +\n drivers/raw/ifpga/base/ifpga_defines.h | 75 ++-\n drivers/raw/ifpga/base/ifpga_feature_dev.c | 59 ++\n drivers/raw/ifpga/base/ifpga_feature_dev.h | 3 +\n drivers/raw/ifpga/base/ifpga_fme.c | 166 ++++-\n drivers/raw/ifpga/base/ifpga_fme_error.c | 74 ++-\n drivers/raw/ifpga/base/ifpga_hw.h | 2 +-\n drivers/raw/ifpga/base/ifpga_port.c | 18 +\n drivers/raw/ifpga/base/ifpga_port_error.c | 19 +\n drivers/raw/ifpga/base/meson.build | 2 +-\n drivers/raw/ifpga/base/opae_debug.c | 3 +\n drivers/raw/ifpga/base/opae_hw_api.c | 137 ++++\n drivers/raw/ifpga/base/opae_hw_api.h | 26 +\n drivers/raw/ifpga/base/opae_i2c.c | 44 +-\n drivers/raw/ifpga/base/opae_i2c.h | 3 +-\n drivers/raw/ifpga/base/opae_ifpga_hw_api.h | 2 +\n drivers/raw/ifpga/base/opae_intel_max10.c | 599 ++++++++++++++++-\n drivers/raw/ifpga/base/opae_intel_max10.h | 157 ++++-\n drivers/raw/ifpga/base/opae_osdep.h | 7 +-\n drivers/raw/ifpga/base/opae_spi.c | 5 -\n drivers/raw/ifpga/base/opae_spi.h | 26 +-\n drivers/raw/ifpga/base/opae_spi_transaction.c | 84 ++-\n drivers/raw/ifpga/ifpga_rawdev.c | 903 +++++++++++++++++++++++++-\n drivers/raw/ifpga/ifpga_rawdev.h | 30 +\n drivers/raw/ifpga/meson.build | 26 +-\n mk/rte.app.mk | 2 +-\n 42 files changed, 2480 insertions(+), 441 deletions(-)" }