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{ "id": 189, "url": "http://patches.dpdk.org/api/covers/189/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20230926181703.2268199-1-yuying.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230926181703.2268199-1-yuying.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230926181703.2268199-1-yuying.zhang@intel.com", "date": "2023-09-26T18:16:55", "name": "[v7,0/8] add rte flow support for cpfl", "submitter": { "id": 1844, "url": "http://patches.dpdk.org/api/people/1844/?format=api", "name": "Zhang, Yuying", "email": "yuying.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20230926181703.2268199-1-yuying.zhang@intel.com/mbox/", "series": [ { "id": 29645, "url": "http://patches.dpdk.org/api/series/29645/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29645", "date": "2023-09-26T18:16:55", "name": "add rte flow support for cpfl", "version": 7, "mbox": "http://patches.dpdk.org/series/29645/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/189/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 500FA42646;\n\tTue, 26 Sep 2023 20:17:22 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DE3D540279;\n\tTue, 26 Sep 2023 20:17:21 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 7CA2D40269\n for <dev@dpdk.org>; Tue, 26 Sep 2023 20:17:19 +0200 (CEST)", "from fmsmga008.fm.intel.com ([10.253.24.58])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Sep 2023 11:17:18 -0700", "from dpdk-wenjing-02.sh.intel.com ([10.67.119.3])\n by fmsmga008.fm.intel.com with ESMTP; 26 Sep 2023 11:17:16 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1695752239; x=1727288239;\n h=from:to:subject:date:message-id:in-reply-to:references:\n mime-version:content-transfer-encoding;\n bh=/qLvEhKEEBkUTQ/Kw9FF1QPJ0kRhuzuYdko+rN+lako=;\n b=IKlVHCPzyj11qkMw5FPotv2GASnSr/a1fGEQ2FVzRqMzW+ZXHxQLNsJW\n Z5A4uGfcayFUKeWAYHUcdjuIbVQockG0ZoXdGINOQj5k1yeCicgMDA0tz\n zGwLUMHiWyK6R0IB5+HXE25Rga/jRFgKRwcjCUsjA97QOqYhKbKm24Gzp\n 0WxnA7haPqWde9w9I1MPbGXvZX6oMlvC2MrLLYPooDxksIKXnBd4obtf4\n FFWmT/SrmTjYchs9/TsL6m6EXvzB+LQFdRIET7COYBNUVZTQ4fyGtvzdA\n 1ySFVmHvFski9kG+ol404MYwBbPS3SRXnWebN2E7g4PbcrH29aNIIX19Q w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10845\"; a=\"412549658\"", "E=Sophos;i=\"6.03,178,1694761200\"; d=\"scan'208\";a=\"412549658\"", "E=McAfee;i=\"6600,9927,10845\"; a=\"814576792\"", "E=Sophos;i=\"6.03,178,1694761200\"; d=\"scan'208\";a=\"814576792\"" ], "X-ExtLoop1": "1", "From": "yuying.zhang@intel.com", "To": "yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com,\n jingjing.wu@intel.com, beilei.xing@intel.com", "Subject": "[PATCH v7 0/8] add rte flow support for cpfl", "Date": "Tue, 26 Sep 2023 18:16:55 +0000", "Message-Id": "<20230926181703.2268199-1-yuying.zhang@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20230822010226.17783-1-yuying.zhang@intel.com>", "References": "<20230822010226.17783-1-yuying.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Yuying <yuying.zhang@intel.com>\n\nThis patchset add rte flow support for cpfl driver.\nIt depends on the following patch set:\nhttp://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.xing@intel.com/\n\nWenjing Qiao (2):\n net/cpfl: add json parser for rte flow pattern rules\n net/cpfl: build action mapping rules from JSON\n\nYuying Zhang (6):\n net/cpfl: set up rte flow skeleton\n net/cpfl: set up control path\n net/cpfl: add FXP low level implementation\n net/cpfl: add fxp rule module\n net/cpfl: add fxp flow engine\n net/cpfl: add flow support for representor\n---\nv7:\n* refine commit log\n* fix compile issues\n\nv6:\n* use existed jansson instead of json-c library.\n* refine \"add FXP low level implementation\"\n\nV5:\n* Add input validation for some functions.\n\n\n doc/guides/nics/cpfl.rst | 53 +\n doc/guides/rel_notes/release_23_11.rst | 1 +\n drivers/net/cpfl/cpfl_actions.h | 858 +++++++++++\n drivers/net/cpfl/cpfl_controlq.c | 801 ++++++++++\n drivers/net/cpfl/cpfl_controlq.h | 75 +\n drivers/net/cpfl/cpfl_ethdev.c | 392 ++++-\n drivers/net/cpfl/cpfl_ethdev.h | 128 ++\n drivers/net/cpfl/cpfl_flow.c | 339 +++++\n drivers/net/cpfl/cpfl_flow.h | 85 ++\n drivers/net/cpfl/cpfl_flow_engine_fxp.c | 667 ++++++++\n drivers/net/cpfl/cpfl_flow_parser.c | 1839 +++++++++++++++++++++++\n drivers/net/cpfl/cpfl_flow_parser.h | 267 ++++\n drivers/net/cpfl/cpfl_fxp_rule.c | 296 ++++\n drivers/net/cpfl/cpfl_fxp_rule.h | 68 +\n drivers/net/cpfl/cpfl_representor.c | 29 +\n drivers/net/cpfl/cpfl_rules.c | 126 ++\n drivers/net/cpfl/cpfl_rules.h | 306 ++++\n drivers/net/cpfl/cpfl_vchnl.c | 144 ++\n drivers/net/cpfl/meson.build | 12 +\n 19 files changed, 6485 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/cpfl/cpfl_actions.h\n create mode 100644 drivers/net/cpfl/cpfl_controlq.c\n create mode 100644 drivers/net/cpfl/cpfl_controlq.h\n create mode 100644 drivers/net/cpfl/cpfl_flow.c\n create mode 100644 drivers/net/cpfl/cpfl_flow.h\n create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c\n create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c\n create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h\n create mode 100644 drivers/net/cpfl/cpfl_rules.c\n create mode 100644 drivers/net/cpfl/cpfl_rules.h" }