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{ "id": 141, "url": "http://patches.dpdk.org/api/covers/141/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20230915100047.90153-1-yuying.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230915100047.90153-1-yuying.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230915100047.90153-1-yuying.zhang@intel.com", "date": "2023-09-15T10:00:38", "name": "[v5,0/9] add rte flow support for cpfl", "submitter": { "id": 1844, "url": "http://patches.dpdk.org/api/people/1844/?format=api", "name": "Zhang, Yuying", "email": "yuying.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20230915100047.90153-1-yuying.zhang@intel.com/mbox/", "series": [ { "id": 29519, "url": "http://patches.dpdk.org/api/series/29519/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29519", "date": "2023-09-15T10:00:38", "name": "add rte flow support for cpfl", "version": 5, "mbox": "http://patches.dpdk.org/series/29519/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/141/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4A492425A3;\n\tFri, 15 Sep 2023 11:01:51 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D878340647;\n\tFri, 15 Sep 2023 11:01:50 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.55.52.120])\n by mails.dpdk.org (Postfix) with ESMTP id 58B764029E\n for <dev@dpdk.org>; Fri, 15 Sep 2023 11:01:49 +0200 (CEST)", "from orsmga004.jf.intel.com ([10.7.209.38])\n by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 15 Sep 2023 02:01:48 -0700", "from dpdk-pengyuan-mev.sh.intel.com ([10.67.119.128])\n by orsmga004.jf.intel.com with ESMTP; 15 Sep 2023 02:01:46 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1694768509; x=1726304509;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=z9r9jcae+3ZirOgo5iEEcEOnnAw3w9FNBXpMf1/ms88=;\n b=KhVPD8SdHMV6dzjpHdSKAhn8kjH4iHfeDtPy2or37afEJsH8OMg0/6Fn\n ZyMvom5nYln6oPFXG0UF8Csx1aO89oajn04+ex3SHKxGHdjuAXXmkJEFt\n jeiXUtC7TpD7rqZRl42FDEGXxoZ/Y7C5hSYI7zESdPB7mtfycz5K8YQm8\n g2XE4Z3wFsiz3/JGF7ObO6fu3SYcsd78hEgynFEcql2AmbCir1zkEFWBJ\n jouavQW01pFf04B6SkZIpsFvE469sLZwZZSK0qFoOYyHd5+bdq4nw6Vlg\n qLbZGwR9liUSlYm5bWX5S9hl/PPBxpNnG8llw9vCIktfbJFpun4ai/PhB g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10833\"; a=\"378117387\"", "E=Sophos;i=\"6.02,148,1688454000\"; d=\"scan'208\";a=\"378117387\"", "E=McAfee;i=\"6600,9927,10833\"; a=\"868630550\"", "E=Sophos;i=\"6.02,148,1688454000\"; d=\"scan'208\";a=\"868630550\"" ], "X-ExtLoop1": "1", "From": "\"Zhang, Yuying\" <yuying.zhang@intel.com>", "To": "yuying.zhang@intel.com, dev@dpdk.org, qi.z.zhang@intel.com,\n beilei.xing@intel.com, jingjing.wu@intel.com", "Cc": "mingxia.liu@intel.com", "Subject": "[PATCH v5 0/9] add rte flow support for cpfl", "Date": "Fri, 15 Sep 2023 10:00:38 +0000", "Message-Id": "<20230915100047.90153-1-yuying.zhang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230906093407.3635038-1-wenjing.qiao@intel.com>", "References": "<20230906093407.3635038-1-wenjing.qiao@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Yuying Zhang <yuying.zhang@intel.com>\n\nThis patchset add rte flow support for cpfl driver.\nIt depends on the following patch set:\nhttp://patchwork.dpdk.org/project/dpdk/cover/20230912173039.1612287-1-beilei.xing@intel.com/\n\nWenjing Qiao (2):\n net/cpfl: add json parser for rte flow pattern rules\n net/cpfl: add mod rule parser support for rte flow\n\nYuying Zhang (7):\n net/cpfl: set up rte flow skeleton\n net/cpfl: add FXP low level implementation\n net/cpfl: add fxp rule module\n net/cpfl: add fxp flow engine\n net/cpfl: add flow support for representor\n app/test-pmd: refine encap content\n net/cpfl: fix incorrect status calculation\n\n app/test-pmd/cmdline_flow.c | 12 +-\n doc/guides/nics/cpfl.rst | 43 +\n doc/guides/rel_notes/release_23_11.rst | 1 +\n drivers/net/cpfl/cpfl_actions.h | 858 +++++++++++\n drivers/net/cpfl/cpfl_controlq.c | 803 ++++++++++\n drivers/net/cpfl/cpfl_controlq.h | 75 +\n drivers/net/cpfl/cpfl_ethdev.c | 394 ++++-\n drivers/net/cpfl/cpfl_ethdev.h | 128 ++\n drivers/net/cpfl/cpfl_flow.c | 339 +++++\n drivers/net/cpfl/cpfl_flow.h | 85 ++\n drivers/net/cpfl/cpfl_flow_engine_fxp.c | 667 +++++++++\n drivers/net/cpfl/cpfl_flow_parser.c | 1834 +++++++++++++++++++++++\n drivers/net/cpfl/cpfl_flow_parser.h | 267 ++++\n drivers/net/cpfl/cpfl_fxp_rule.c | 296 ++++\n drivers/net/cpfl/cpfl_fxp_rule.h | 68 +\n drivers/net/cpfl/cpfl_representor.c | 29 +\n drivers/net/cpfl/cpfl_rules.c | 126 ++\n drivers/net/cpfl/cpfl_rules.h | 306 ++++\n drivers/net/cpfl/cpfl_vchnl.c | 144 ++\n drivers/net/cpfl/meson.build | 18 +\n 20 files changed, 6489 insertions(+), 4 deletions(-)\n create mode 100644 drivers/net/cpfl/cpfl_actions.h\n create mode 100644 drivers/net/cpfl/cpfl_controlq.c\n create mode 100644 drivers/net/cpfl/cpfl_controlq.h\n create mode 100644 drivers/net/cpfl/cpfl_flow.c\n create mode 100644 drivers/net/cpfl/cpfl_flow.h\n create mode 100644 drivers/net/cpfl/cpfl_flow_engine_fxp.c\n create mode 100644 drivers/net/cpfl/cpfl_flow_parser.c\n create mode 100644 drivers/net/cpfl/cpfl_flow_parser.h\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.c\n create mode 100644 drivers/net/cpfl/cpfl_fxp_rule.h\n create mode 100644 drivers/net/cpfl/cpfl_rules.c\n create mode 100644 drivers/net/cpfl/cpfl_rules.h" }