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{ "id": 126227, "url": "http://patches.dpdk.org/api/covers/126227/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20230418092325.2578712-1-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230418092325.2578712-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230418092325.2578712-1-suanmingm@nvidia.com", "date": "2023-04-18T09:23:20", "name": "[RFC,0/5] crypto/mlx5: support AES-GCM", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20230418092325.2578712-1-suanmingm@nvidia.com/mbox/", "series": [ { "id": 27756, "url": "http://patches.dpdk.org/api/series/27756/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27756", "date": "2023-04-18T09:23:20", "name": "crypto/mlx5: support AES-GCM", "version": 1, "mbox": "http://patches.dpdk.org/series/27756/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/126227/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 934554297B;\n\tTue, 18 Apr 2023 11:24:01 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 862BD410EA;\n\tTue, 18 Apr 2023 11:24:01 +0200 (CEST)", "from NAM10-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam10on2059.outbound.protection.outlook.com [40.107.94.59])\n by mails.dpdk.org (Postfix) with ESMTP id 74FB640698\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<matan@nvidia.com>", "CC": "<rasland@nvidia.com>, <mkashani@nvidia.com>, <dev@dpdk.org>", "Subject": "[RFC PATCH 0/5] crypto/mlx5: support AES-GCM", "Date": "Tue, 18 Apr 2023 12:23:20 +0300", "Message-ID": "<20230418092325.2578712-1-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.37]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT014:EE_|CH3PR12MB8536:EE_", "X-MS-Office365-Filtering-Correlation-Id": "5f22e6ee-bb8c-412a-34df-08db3feea346", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n wOv78P2na04FbxxiA/ZboXSxCIQT+6L25RQa9c6fFbgVNy+KlDTXpPXhgQj3bmI2/NBH/khuqIzz3MCPswhtXbN6RBN7FA5t+iBasoWDnKFnt9poKx6jA0vz1Ppn1zCp1wMNnKzn4CWf1K+5HaghAo6bepkB7J9kKLbkFBVzvS6KNMgMtDgfm6IK3v52t57R0oouZAHC4dGFdel2N02R3jdth6v7vt2Vm7wxfTm2EenWFYqKBs/H83AfvEsefAd0GpAJWDMyL/hiTZ6K0SBVa79mrboDQ4aq07rU/nLsoRZXqM6rg5A547UIwsF/JaDLnpsyBqsb0SpX3PR9QYVyDcOco8zaGOVP9iIVb2Z0F8v4ViS4B7oscCXfzNVpSpYTLpQAAbaOvxv/4NnKZczqseBWjb8nGDRCKxEuRnjCfTExsOG7tzI5Lw7gqMRozJ8cWnFo0oTFHXhbWswuyE4zOEb5daxbjSF+iumGIS8dfveaB73EPNh79iaGX2Q02s7FkJO0ZlHUXAp9zflVwhPe1KvvucOJK2r/K6ERS/sr5Sg9YkbaK7FjD74UcKrvBZ9/+ygn4tQHhyJflkDk7+4aY+ichJHugzUdcgsaPJ2jaqHTUk4yuhQ5J+kxEwYlHbrvKEldS1j2rt+W4mHpzHC7BrmNW5W9+lErT7+qohprq37Qh6O3yIWtkhpIEiz6O6cqfF/DFqhvqQt9BjnX/gXKgOjKSeVKhgrEZZsEkV4yzUy1IqQhU7J10L7BSP2Wi6lMM7pIsAgQ00tbF8JyGbZQK3jsV8TfOIOjemTBqEJvEvk=", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230028)(4636009)(346002)(39860400002)(376002)(396003)(136003)(451199021)(46966006)(40470700004)(36840700001)(36756003)(40460700003)(82310400005)(2906002)(5660300002)(6862004)(7636003)(8936002)(8676002)(41300700001)(356005)(55016003)(40480700001)(86362001)(478600001)(34020700004)(37006003)(2616005)(36860700001)(26005)(1076003)(54906003)(6636002)(186003)(6666004)(6286002)(16526019)(7696005)(336012)(4326008)(426003)(70206006)(70586007)(82740400003)(83380400001)(47076005)(316002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Apr 2023 09:23:57.5548 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 5f22e6ee-bb8c-412a-34df-08db3feea346", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT014.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH3PR12MB8536", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "AES-GCM provides both authenticated encryption and the ability to check\nthe integrity and authentication of additional authenticated data (AAD)\nthat is sent in the clear.\n\nThe crypto operations are performed with crypto WQE. If the input\nbuffers(AAD, mbuf, digest) are not contiguous, as the requirement\nfrom FW, an UMR WQE is needed to generate contiguous address space\nfor crypto WQE. The UMR WQE and crypto WQE are handled in two\ndifferent QPs.\n\nThe QP for UMR operation contains two types of WQE, UMR and SEND_EN\nWQE. The WQEs are built dynamically according to the crypto operation \nbuffer address. Crypto operation with non-contiguous buffers will\nhave its own UMR WQE, while the operation with contiguous buffers \ndoesn't need the UMR WQE. Once the all the operations WQE in the\nenqueue burst built finishes, if any UMR WQEs are built, additional\nSEND_EN WQE will be as the final WQE of the burst in the UMR QP.\nThe purpose of that SEND_EN WQE is to trigger the crypto QP processing\nwith the UMR ready input memory address space buffers.\n\nThe QP for crypto operations contains only the crypto WQE and the QP\nWQEs are built as fixed in QP setup. The QP processing is triggered\nby doorbell ring or the SEND_EN WQE from UMR QP.\n\nSuanming Mou (5):\n crypto/mlx5: add AES-GCM capability\n crypto/mlx5: add AES-GCM encryption key\n crypto/mlx5: add AES-GCM session configure\n crypto/mlx5: add queue pair setup\n crypto/mlx5: add enqueue and dequeue operations\n\n doc/guides/nics/mlx5.rst | 8 +\n drivers/common/mlx5/mlx5_devx_cmds.c | 29 +-\n drivers/common/mlx5/mlx5_devx_cmds.h | 18 +\n drivers/common/mlx5/mlx5_prm.h | 62 +-\n drivers/crypto/mlx5/meson.build | 1 +\n drivers/crypto/mlx5/mlx5_crypto.c | 64 +-\n drivers/crypto/mlx5/mlx5_crypto.h | 57 +-\n drivers/crypto/mlx5/mlx5_crypto_dek.c | 157 +++--\n drivers/crypto/mlx5/mlx5_crypto_gcm.c | 803 ++++++++++++++++++++++++++\n 9 files changed, 1139 insertions(+), 60 deletions(-)\n create mode 100644 drivers/crypto/mlx5/mlx5_crypto_gcm.c" }