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{ "id": 118435, "url": "http://patches.dpdk.org/api/covers/118435/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20221019003918.257506-1-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221019003918.257506-1-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221019003918.257506-1-hernan.vargas@intel.com", "date": "2022-10-19T00:38:48", "name": "[v4,00/30] baseband/acc100: changes for 22.11", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20221019003918.257506-1-hernan.vargas@intel.com/mbox/", "series": [ { "id": 25287, "url": "http://patches.dpdk.org/api/series/25287/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25287", "date": "2022-10-19T00:38:48", "name": "baseband/acc100: changes for 22.11", "version": 4, "mbox": "http://patches.dpdk.org/series/25287/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/118435/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 78F5DA0560;\n\tTue, 18 Oct 2022 18:42:49 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0E55540A8B;\n\tTue, 18 Oct 2022 18:42:49 +0200 (CEST)", "from mga06.intel.com (mga06b.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 384E040395\n for <dev@dpdk.org>; Tue, 18 Oct 2022 18:42:47 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 18 Oct 2022 09:42:46 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga005.jf.intel.com with ESMTP; 18 Oct 2022 09:42:45 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1666111367; x=1697647367;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=4XDekgY/dlkGiQX9PJj/OjC+Ms5KXp9T4aJ5BSCuL3w=;\n b=Ufs7WzW4r8QaB5dX/tg4RSogCYajwuRxxqwb2LUgNkFzjDdjZOYw3krb\n wvHdcjQFnMOxfVVNKdK1ucFLqSK+KNkaSwDwI6XT853QNFIP4iAa3KJmR\n PQ0Yth7aKB2Cgsww8iyTqM0g2RhwmsTCrg20n7QAc6jVZL0x+mzOpxGIn\n MtMrl7Y0Dq4nTs/xn2kbjwJVneCSkQVIgNtmLSxnDmEJ+tKrpxJSCX94U\n LwsvpHjtve4eASE5yTjpArQHO/E2q2vx3pilraTenNY551BOfyFzWSH9u\n a0keanuw+fMDkQ7xIEvZtfw/kicwi5awLjQUcN8IsUbIIho1JZTQ2Rf2Z g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10504\"; a=\"368192015\"", "E=Sophos;i=\"5.95,193,1661842800\"; d=\"scan'208\";a=\"368192015\"", "E=McAfee;i=\"6500,9779,10504\"; a=\"803835973\"", "E=Sophos;i=\"5.95,193,1661842800\"; d=\"scan'208\";a=\"803835973\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>", "Subject": "[PATCH v4 00/30] baseband/acc100: changes for 22.11", "Date": "Tue, 18 Oct 2022 17:38:48 -0700", "Message-Id": "<20221019003918.257506-1-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "v4: Rebased code to use the latest ACC common API and implemented review comment changes.\nv3: Code refactor based on comments and grouping fixes at beginning of series.\nv2: Rebased code to use ACC common API.\nv1: Upstreaming ACC100 changes for 22.11.\nThis patch series is dependant on series:\nhttps://patches.dpdk.org/project/dpdk/list/?series=25191\n\nHernan Vargas (30):\n baseband/acc100: fix ring availability calculation\n baseband/acc100: add function to check AQ availability\n baseband/acc100: memory leak fix\n baseband/acc100: add LDPC encoder padding function\n baseband/acc100: check turbo dec/enc input\n baseband/acc100: check for unlikely operation vals\n baseband/acc100: enforce additional check on FCW\n baseband/acc100: allocate ring/queue mem when NULL\n baseband/acc100: reduce input length for CRC24B\n baseband/acc100: fix clearing PF IR outside handler\n baseband/acc100: set device min alignment to 1\n baseband/acc100: add protection for NULL HARQ input\n baseband/acc100: reset pointer after rte_free\n baseband/acc100: fix debug print for LDPC FCW\n baseband/acc100: add enqueue status\n baseband/acc100: add scatter-gather support\n baseband/acc100: add HARQ index helper function\n baseband/acc100: enable input validation by default\n baseband/acc100: added LDPC transport block support\n baseband/acc100: update validate LDPC enc/dec\n baseband/acc100: implement configurable queue depth\n baseband/acc100: add queue stop operation\n baseband/acc100: update uplink CB input length\n baseband/acc100: update log messages\n baseband/acc100: store FCW from first CB descriptor\n baseband/acc100: update device info\n baseband/acc100: add ring companion address\n baseband/acc100: add workaround for deRM corner cases\n baseband/acc100: configure PMON control registers\n baseband/acc100: update guide docs\n\n doc/guides/bbdevs/acc100.rst | 9 +\n drivers/baseband/acc/acc100_pmd.h | 5 +\n drivers/baseband/acc/acc_common.h | 10 +\n drivers/baseband/acc/meson.build | 21 +\n drivers/baseband/acc/rte_acc100_pmd.c | 1216 ++++++++++++++++++++-----\n 5 files changed, 1032 insertions(+), 229 deletions(-)" }