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{ "id": 117210, "url": "http://patches.dpdk.org/api/covers/117210/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220930125315.5079-1-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220930125315.5079-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220930125315.5079-1-suanmingm@nvidia.com", "date": "2022-09-30T12:52:58", "name": "[v3,00/17] net/mlx5: HW steering PMD update", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220930125315.5079-1-suanmingm@nvidia.com/mbox/", "series": [ { "id": 24935, "url": "http://patches.dpdk.org/api/series/24935/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24935", "date": "2022-09-30T12:52:58", "name": "net/mlx5: HW steering PMD update", "version": 3, "mbox": "http://patches.dpdk.org/series/24935/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/117210/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1998AA00C4;\n\tFri, 30 Sep 2022 14:53:37 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B67D540684;\n\tFri, 30 Sep 2022 14:53:36 +0200 (CEST)", "from NAM12-MW2-obe.outbound.protection.outlook.com\n (mail-mw2nam12on2062.outbound.protection.outlook.com [40.107.244.62])\n by mails.dpdk.org (Postfix) with ESMTP id 0C0EC4003F\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>, <orika@nvidia.com>", "Subject": "[PATCH v3 00/17] net/mlx5: HW steering PMD update", "Date": "Fri, 30 Sep 2022 15:52:58 +0300", "Message-ID": "<20220930125315.5079-1-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "In-Reply-To": "<20220923144334.27736-1-suanmingm@nvidia.com>", "References": "<20220923144334.27736-1-suanmingm@nvidia.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT104:EE_|CH0PR12MB5251:EE_", "X-MS-Office365-Filtering-Correlation-Id": "edd4fb65-48ba-40cb-51c8-08daa2e2c84b", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 1767II5KchK4bEQ6gXrFDnqFafKL3gSkPByFljUgt3rVrNxQ/HKCkrSUD29N6Ep2QMvImf3H+WaUhEygazJ+UhYw4yGa+2eC/nTBbtQzS/FpNhlrZak/Zo9NezHvBbG1OUIfxVcFzeSBSgrsDRlgPwkIDbv8TEmOsaXNj9EAuQtiwF0BDiQGSUJoEOakCpa3YDpRTt2Ox3xtTHWOBmCw5AZaLr0YN0JP9TJD3YiPfL//9SCoJGZs6AeTr7zHadTv6BXH5e8Z8OR4YWfdDTNcWFx4EuDSP7iw1S3Eixz3/CZH8BgPY2wVw3h68G3g4p0bFstmiBLREAIlxeJ16iWbrvvToFNAtEiihcp38NcqyTyoy2E1KU2gXu+/cQuvsyj94K2PMuXHP0o/ERneBTq5ZbBVPZJuxQThumTj/V58ywynSRxJTcyHpMUG6Cb/HEzeH862ivUoxQyLrEoA6UYhejK7EU1X4+laMHADLPdH01Tt+/8+1LJKiGBnnfKBuLeg6tVAALAwOcXiTPArvW6V43wjxA/wpNWB4v69NRCfpNZ9U1nHf7IdxReiWoKX74orAUqRZvvPesf7xYDns4uCfUyeq/6ls/0u9PEMbtA1Aj01jNnolrHUiyuCR9m9pqtGvtkkUFZpDSqaDqB4shwbmhyOOqu+xHmYjk7lRCn+dxjprr+cD5+slX9nsmtyudZeRUniaXeXfPSok/Jv/ja67UQXNAEfi1C9Bc67be5c8EzxTWZdTM8jF4bF6c8sli6lVSMiFt2FVdmqA0wlnvgCnbAoJK5evjuV8Ct35M3uI9aRnKXQFTK2KtybNHUmsY4g8Rtk64MkCFClHg42smq9sR0yiZv7/bSZe1ZvU2KzDCPSCTSNBNQCLfuiTFhlZtzy", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(396003)(136003)(39860400002)(346002)(376002)(451199015)(40470700004)(46966006)(36840700001)(15650500001)(83380400001)(2906002)(16526019)(1076003)(186003)(2616005)(426003)(47076005)(336012)(82310400005)(356005)(82740400003)(7636003)(40460700003)(86362001)(55016003)(40480700001)(36756003)(36860700001)(70206006)(70586007)(966005)(6286002)(316002)(54906003)(109986005)(7696005)(41300700001)(478600001)(6666004)(107886003)(26005)(8936002)(5660300002)(4326008)(8676002)(266003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "30 Sep 2022 12:53:33.1472 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n edd4fb65-48ba-40cb-51c8-08daa2e2c84b", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT104.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH0PR12MB5251", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The skeleton of mlx5 HW steering(HWS) has been updated into\nupstream for pretty a long time, but not updated anymore due\nto missing of the low-level steering layer code. Luckily,\nbetter late than never, the steering layer finnaly comes[1].\n\nThis series will add more features to the existing PMD code:\n - FDB and metadata copy.\n - Modify field.\n - Meter color.\n - Counter.\n - Aging.\n - Action template pre-parser optimization.\n - Connection tracking.\n\nSome features such as meter/aging/ct touches the public API,\nand public API changes have been sent to ML much earily in\nother threads in order not to be swallowed by this big series.\n\nThe dpends patches as below:\n [1]https://inbox.dpdk.org/dev/20220922190345.394-1-valex@nvidia.com/\n [2]https://inbox.dpdk.org/dev/20220921145409.511328-1-michaelba@nvidia.com/\n\n---\n\n v3:\n - Fixed flow can't be aged out.\n - Fix error not be filled properly while table creat failed.\n - Remove transfer_mode in flow attributes before ethdev layer applied.\n https://patches.dpdk.org/project/dpdk/patch/20220928092425.68214-1-rongweil@nvidia.com/\n\n v2:\n - Remove the rte_flow patches as they will be integrated in other thread.\n - Fix compilation issues.\n - Make the patches be better organized.\n \n---\n\nAlexander Kozyrev (2):\n net/mlx5: add HW steering meter action\n net/mlx5: implement METER MARK indirect action for HWS\n\nBing Zhao (1):\n net/mlx5: add extended metadata mode for hardware steering\n\nDariusz Sosnowski (4):\n net/mlx5: add HW steering port action\n net/mlx5: support DR action template API\n net/mlx5: support device control for E-Switch default rule\n net/mlx5: support device control of representor matching\n\nGregory Etelson (2):\n net/mlx5: add HW steering VLAN push, pop and VID modify flow actions\n net/mlx5: support flow integrity in HWS group 0\n\nMichael Baum (1):\n net/mlx5: add HWS AGE action support\n\nSuanming Mou (6):\n net/mlx5: fix invalid flow attributes\n net/mlx5: fix IPv6 and TCP RSS hash fields\n net/mlx5: add shared header reformat support\n net/mlx5: add modify field hws support\n net/mlx5: add HW steering connection tracking support\n net/mlx5: add async action push and pull support\n\nXiaoyu Min (1):\n net/mlx5: add HW steering counter action\n\n doc/guides/nics/mlx5.rst | 9 +\n drivers/common/mlx5/mlx5_devx_cmds.c | 50 +\n drivers/common/mlx5/mlx5_devx_cmds.h | 27 +\n drivers/common/mlx5/mlx5_prm.h | 64 +-\n drivers/common/mlx5/version.map | 1 +\n drivers/net/mlx5/linux/mlx5_os.c | 76 +-\n drivers/net/mlx5/meson.build | 1 +\n drivers/net/mlx5/mlx5.c | 126 +-\n drivers/net/mlx5/mlx5.h | 318 +-\n drivers/net/mlx5/mlx5_defs.h | 5 +\n drivers/net/mlx5/mlx5_flow.c | 415 +-\n drivers/net/mlx5/mlx5_flow.h | 312 +-\n drivers/net/mlx5/mlx5_flow_aso.c | 793 ++-\n drivers/net/mlx5/mlx5_flow_dv.c | 1169 ++--\n drivers/net/mlx5/mlx5_flow_hw.c | 7898 +++++++++++++++++++++++---\n drivers/net/mlx5/mlx5_flow_meter.c | 771 ++-\n drivers/net/mlx5/mlx5_flow_verbs.c | 8 +-\n drivers/net/mlx5/mlx5_hws_cnt.c | 1198 ++++\n drivers/net/mlx5/mlx5_hws_cnt.h | 703 +++\n drivers/net/mlx5/mlx5_trigger.c | 254 +-\n drivers/net/mlx5/mlx5_tx.h | 1 +\n drivers/net/mlx5/mlx5_txq.c | 47 +\n drivers/net/mlx5/rte_pmd_mlx5.h | 17 +\n drivers/net/mlx5/version.map | 1 +\n 24 files changed, 12619 insertions(+), 1645 deletions(-)\n create mode 100644 drivers/net/mlx5/mlx5_hws_cnt.c\n create mode 100644 drivers/net/mlx5/mlx5_hws_cnt.h" }